{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,18]],"date-time":"2025-05-18T05:22:06Z","timestamp":1747545726764},"reference-count":38,"publisher":"Springer Science and Business Media LLC","issue":"3","license":[{"start":{"date-parts":[[1994,10,1]],"date-time":"1994-10-01T00:00:00Z","timestamp":780969600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Journal of VLSI Signal Processing"],"published-print":{"date-parts":[[1994,10]]},"DOI":"10.1007\/bf02106447","type":"journal-article","created":{"date-parts":[[2005,9,13]],"date-time":"2005-09-13T00:22:27Z","timestamp":1126570947000},"page":"209-225","source":"Crossref","is-referenced-by-count":6,"title":["Learning capacitive weights in analog CMOS neural networks"],"prefix":"10.1007","volume":"8","author":[{"given":"H. C.","family":"Card","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"C. R.","family":"Schneider","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"R. S.","family":"Schneider","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[1994,10,1]]},"reference":[{"key":"BF02106447_CR1","first-page":"1032","volume-title":"Advances in Neural Information Processing Systems 3","author":"H.P. Graf","year":"1991","unstructured":"H.P. Graf, R. Janow, D. Henderson, and R. Lee, \u201cReconfigurable Neural Net Chip with 32 K Connections,\u201dAdvances in Neural Information Processing Systems 3, D.S. Touretzky, J. Moody and R. Lippmann, editors, San Mateo, CA: Morgan Kaufmann, pp. 1032\u20131038, 1991."},{"key":"BF02106447_CR2","doi-asserted-by":"crossref","first-page":"2017","DOI":"10.1109\/4.104196","volume":"26","author":"B.E. Boser","year":"1991","unstructured":"B.E. Boser, E. Sackinger, J. Bromley, Y. Le Cun, and L.D. Jackel, \u201cAn Analog Neural Network Processor with Programmable Topology,\u201dIEEE J. Solid St. Ccts., Vol. 26, pp. 2017\u20132025, 1991.","journal-title":"IEEE J. Solid St. Ccts."},{"key":"BF02106447_CR3","doi-asserted-by":"crossref","first-page":"533","DOI":"10.1038\/323533a0","volume":"323","author":"D.E. Rumelhart","year":"1986","unstructured":"D.E. Rumelhart, G.E. Hinton, and R.W. Williams, \u201cLearning representations by back-propagating errors,\u201dNature, Vol. 323, pp. 533\u2013536, 1986.","journal-title":"Nature"},{"key":"BF02106447_CR4","doi-asserted-by":"crossref","first-page":"1464","DOI":"10.1109\/5.58325","volume":"78","author":"T. Kohonen","year":"1990","unstructured":"T. Kohonen, \u201cThe Self Organizing Map,\u201dProc. IEEE, Vol. 78, pp. 1464\u20131480, 1990.","journal-title":"Proc. IEEE"},{"key":"BF02106447_CR5","doi-asserted-by":"crossref","first-page":"3088","DOI":"10.1073\/pnas.81.10.3088","volume":"81","author":"J. Hopfield","year":"1984","unstructured":"J. Hopfield, \u201cNeurons with graded response have collective computational properties like those of two-state neurons,\u201dProc. Natl. Acad. Sci., Vol. 81, pp. 3088\u20133092, 1984.","journal-title":"Proc. Natl. Acad. Sci."},{"key":"BF02106447_CR6","volume-title":"Organization of behaviour","author":"D.O. Hebb","year":"1949","unstructured":"D.O. Hebb,Organization of behaviour, New York: John Wiley, 1949."},{"key":"BF02106447_CR7","first-page":"501","volume":"III","author":"J. Raffel","year":"1987","unstructured":"J. Raffel, J. Mann, R. Berger, A. Soares and S. Gilbert, \u201cA Generic Architecture for Wafer Scale Neuromorphic Systems,\u201dProc. IEEE Int. Conf. Neural Networks, Vol. III, pp. 501\u2013513, 1987.","journal-title":"Proc. IEEE Int. Conf. Neural Networks"},{"key":"BF02106447_CR8","doi-asserted-by":"crossref","first-page":"1313","DOI":"10.1049\/el:19870908","volume":"23","author":"Y. Tsividis","year":"1987","unstructured":"Y. Tsividis and S. Satyanarayana, \u201cAnalogue circuits for variable synapse electronic neural networks,\u201dElec. Lett., Vol. 23, pp. 1313\u20131314, 1987.","journal-title":"Elec. Lett."},{"key":"BF02106447_CR9","doi-asserted-by":"crossref","unstructured":"M. Holler, S. Tam, H. Castro, and R. Benson, \u201cAn electrically trainable artificial neural network with 10240 floating gate synapses,\u201dProc. IJCNN-89, Part II, pp. 191\u2013196, 1989.","DOI":"10.1109\/IJCNN.1989.118698"},{"key":"BF02106447_CR10","volume-title":"Analog VLSI and Neural Systems","author":"C.A. Mead","year":"1988","unstructured":"Mead, C.A.,Analog VLSI and Neural Systems, Reading: Addison-Wesley, 1988."},{"key":"BF02106447_CR11","doi-asserted-by":"crossref","first-page":"313","DOI":"10.1109\/4.18590","volume":"24","author":"D.B. Schwartz","year":"1989","unstructured":"D.B. Schwartz, R.E. Howard, and W.E. Hubbard, \u201cA Programmable Analog Neural Network Chip,\u201dIEEE J. Solid State Circuits, Vol. 24, pp. 313\u2013319, 1989.","journal-title":"IEEE J. Solid State Circuits"},{"key":"BF02106447_CR12","doi-asserted-by":"crossref","first-page":"185","DOI":"10.1016\/0004-3702(89)90049-0","volume":"40","author":"G.E. Hinton","year":"1989","unstructured":"G.E. Hinton, \u201cConnectionist learning procedures,\u201dArtificial Intelligence, Vol. 40, pp. 185\u2013234, 1989.","journal-title":"Artificial Intelligence"},{"key":"BF02106447_CR13","unstructured":"S. Satyanarayana, Y.P. Tsividis, and H.P. Graf, \u201cA reconfigurable analog VLSI neural network chip,\u201dAdvances in Neural Information Processing Systems 2, D. Touretzky, editor, Morgan Kaufmann, 1990."},{"key":"BF02106447_CR14","first-page":"739","volume-title":"Advances in Neural Information Processing Systems I","author":"J.R. Mann","year":"1990","unstructured":"J.R. Mann and S. Gilbert, \u201cAn Analog Self-Organizing Neural Network Chip,\u201d inAdvances in Neural Information Processing Systems I, D.S. Touretzky, editor, San Mateo, CA: Morgan Kaufmann, pp. 739\u2013747, 1990."},{"key":"BF02106447_CR15","doi-asserted-by":"crossref","first-page":"193","DOI":"10.1109\/72.80329","volume":"2","author":"A.F. Murray","year":"1991","unstructured":"A.F. Murray, D. Del Corso, and L. Tarassenko, \u201cPulse Stream VLSI Neural Networks Mixing Analog and Digital Techniques,\u201dIEEE Trans. on Neural Networks, Vol. 2, pp. 193\u2013204, 1991.","journal-title":"IEEE Trans. on Neural Networks"},{"key":"BF02106447_CR16","doi-asserted-by":"crossref","unstructured":"A. Agarnat and A. Yariv, \u201cA New Architecture for a Microelectronic Implementation of Neural Network Models\u201d,Proc. Ist Int. Conf. on Neural Networks, San Diego, June 1987.","DOI":"10.1049\/el:19870416"},{"key":"BF02106447_CR17","first-page":"13","volume":"138","author":"H.C. Card","year":"1991","unstructured":"H.C. Card, C. Schneider and W.R. Moore, \u201cHebbian plasticity in MOS synapses,\u201dIEE Proc. F, Vol. 138, pp. 13\u201316, Feb. 1991.","journal-title":"IEE Proc. F"},{"key":"BF02106447_CR18","doi-asserted-by":"crossref","first-page":"785","DOI":"10.1049\/el:19910489","volume":"27","author":"C.R. Schneider","year":"1991","unstructured":"C.R. Schneider, and H.C. Card, \u201cAnalog CMOS Hebbian Synapses,\u201dElec. Lett., Vol. 27, pp. 785\u2013786, 1991.","journal-title":"Elec. Lett."},{"key":"BF02106447_CR19","doi-asserted-by":"crossref","first-page":"907","DOI":"10.1109\/4.231327","volume":"28","author":"C.R. Schneider","year":"1993","unstructured":"C.R. Schneider and H.C. Card, \u201cAnalog CMOS Deterministic Boltzmann Circuits,\u201dIEEE J. Solid St. Ccts., Vol. 28, pp. 907\u2013914, Aug. 1993.","journal-title":"IEEE J. Solid St. Ccts."},{"key":"BF02106447_CR20","volume-title":"Analogue IC Design: the Current Mode Approach","year":"1990","unstructured":"C. Toumazou, F.J. Lidgey, and D.G. Haigh, editors,Analogue IC Design: the Current Mode Approach, London: P. Peregrinus, 1990."},{"key":"BF02106447_CR21","first-page":"118","volume":"II","author":"J.J. Clark","year":"1990","unstructured":"J.J. Clark, \u201cAn analog CMOS implementation of a self organizing feedforward network,\u201dProc. 1990 Int. Joint Conf. on Neural Networks, Washington, D.C., Vol. II, pp. 118\u2013121, 1990.","journal-title":"Proc. 1990 Int. Joint Conf. on Neural Networks"},{"key":"BF02106447_CR22","doi-asserted-by":"crossref","unstructured":"H.C. Card and C.R. Schneider, \u201cAnalog VLSI Models of Mean Field Networks,\u201dProc. of Oxford Workshop, Sept. 5\u20137, 1990, to be published asVLSI for AI and Neural Networks, W.R. Moore and J. Delgado-Frias, editors, 1991.","DOI":"10.1007\/978-1-4615-3752-6_18"},{"key":"BF02106447_CR23","first-page":"313","volume-title":"Advanced Research in VLSI","author":"J. Alspector","year":"1987","unstructured":"J. Alspector and R.B. Allen, \u201cA Neuromorphic VLSI Learning System,\u201d inAdvanced Research in VLSI, Proc. of 1987 Stanford Conf., P. Losleben, editor, Cambridge: MIT Press, pp. 313\u2013349, 1987."},{"key":"BF02106447_CR24","doi-asserted-by":"crossref","first-page":"109","DOI":"10.1109\/31.101308","volume":"38","author":"J. Alspector","year":"1991","unstructured":"J. Alspector, J.W. Gannett, S. Haber, M.B. Parker, and R. Chu, \u201cA VLSI-Efficient Technique for Generating Multiple Uncorrelated Noise Sources and its Applications to Stochastic Neural Networks,\u201dIEEE Trans. Ccts. and Syst., Vol. 38, pp. 109\u2013123, 1991.","journal-title":"IEEE Trans. Ccts. and Syst."},{"key":"BF02106447_CR25","volume-title":"Advances in Neural Information Processing Systems 3","author":"J. Alspector","year":"1991","unstructured":"J. Alspector, R.B. Allen, A. Jayakumar, T. Zeppenfeld, and R. Meir, \u201cRelaxation networks for large supervised learning problems,\u201dAdvances in Neural Information Processing Systems 3, D.S. Touretzky, J. Moody and R. Lippmann, editors, San Mateo, CA: Morgan Kaufmann, Apr. 1991."},{"key":"BF02106447_CR26","doi-asserted-by":"crossref","unstructured":"T. Shima, T. Kimura, Y. Kamatani, T. Itakura, Y. Fujita, and T. Lida, \u201cNeuro Chips with On-Chip Backprop and\/or Hebbian Learning,\u201dProc. IEEE Int. Solid State Ccts. Conf. (ISSCC-92), San Francisco, Paper TP8.4, Feb 19\u201321, 1992.","DOI":"10.1109\/ISSCC.1992.200450"},{"key":"BF02106447_CR27","doi-asserted-by":"crossref","first-page":"607","DOI":"10.1109\/4.75062","volume":"26","author":"Y. Arima","year":"1991","unstructured":"Y. Arima, K. Mashiko, K. Okada, T. Yamada, A. Maeda, H. Kondoh, and S. Kayano, \u201cA Self Learning Neural Network Chip with 125 Neurons and 10 K Self Organizing Synapses,IEEE J. Solid St. Ccts., Vol. 26, pp. 607\u2013611, 1991.","journal-title":"IEEE J. Solid St. Ccts."},{"key":"BF02106447_CR28","doi-asserted-by":"crossref","first-page":"1637","DOI":"10.1109\/4.98984","volume":"26","author":"Y. Arima","year":"1991","unstructured":"Y. Arima, K. Mashiko, K. Okada, T. Yamada, A. Maeda, H. Notani, H. Kondoh, and S. Kayano, \u201cA 336-Neuron, 28 K Synapse, Self-Learning Neural Network Chip with Branch-Neuron-Unit Architecture,\u201dIEEE. J. Solid St. Ccts., Vol. 26, pp. 1637\u20131644, 1991.","journal-title":"IEEE. J. Solid St. Ccts."},{"key":"BF02106447_CR29","doi-asserted-by":"crossref","unstructured":"Y. Arima, M. Murasaki, T. Yamada, A. Maeda, and H. Shinohara, \u201cA Refreshable Analog VLSI Neural Network Chip with 400 Neurons and 40 K Synapses,\u201dProc. IEEE Int. Solid State Ccts. Conf. (ISSCC-92), San Francisco, Paper TP8.1, Feb 19\u201321, 1992.","DOI":"10.1109\/ISSCC.1992.200447"},{"key":"BF02106447_CR30","unstructured":"M. Sivilotti, M. Emerling, and C.A. Mead \u201cA novel associative memory implemented using collective computation,\u201dProc. Chapel Hill Conf. on VLSI, pp. 329\u2013342, 1985."},{"key":"BF02106447_CR31","doi-asserted-by":"crossref","first-page":"475","DOI":"10.1016\/0893-6080(89)90045-2","volume":"2","author":"C.P. Peterson","year":"1989","unstructured":"C.P. Peterson and E. Hartman, \u201cExplorations of the Mean Field Theory Learning Algorithm,\u201dNeural Networks, Vol. 2, pp. 475\u2013494, 1989.","journal-title":"Neural Networks"},{"key":"BF02106447_CR32","doi-asserted-by":"crossref","first-page":"143","DOI":"10.1162\/neco.1989.1.1.143","volume":"1","author":"G.E. Hinton","year":"1989","unstructured":"G.E. Hinton, \u201cDeterministic Boltzmann Learning Performs Steepest Descent in Weight Space,\u201dNeural Computation, vol. 1, pp. 143\u2013150, 1989.","journal-title":"Neural Computation"},{"key":"BF02106447_CR33","doi-asserted-by":"crossref","unstructured":"J.R. Movellan, \u201cContrastive Hebbian Learning in the Continuous Hopfield Model,\u201dConnectionist Models: Proceedings of the 1990 Summer School, D.S. Touretzky et al., editors, pp. 10\u201317, 1990.","DOI":"10.1016\/B978-1-4832-1448-1.50007-X"},{"key":"BF02106447_CR34","doi-asserted-by":"crossref","first-page":"147","DOI":"10.1207\/s15516709cog0901_7","volume":"9","author":"D.H. Ackley","year":"1985","unstructured":"D.H. Ackley, G.E. Hinton, and T.J. Sejnowski, \u201cA learning algorithm for Boltzmann machines,\u201dCognitive Science, Vol. 9, pp. 147\u2013169, 1985.","journal-title":"Cognitive Science"},{"key":"BF02106447_CR35","doi-asserted-by":"crossref","first-page":"105","DOI":"10.1109\/2.36","volume":"21","author":"R. Linsker","year":"1988","unstructured":"R. Linsker, \u201cSelf Organization in a Perceptual Network,\u201dIEEE Computer, Vol. 21, pp. 105\u2013117, March, 1988.","journal-title":"IEEE Computer"},{"key":"BF02106447_CR36","doi-asserted-by":"crossref","first-page":"402","DOI":"10.1162\/neco.1989.1.3.402","volume":"1","author":"R. Linsker","year":"1989","unstructured":"R. Linsker, \u201cHow to Generate Ordered Maps by Maximizing the Mutual Information Between Input and Output Signals,\u201dNeural Computation, Vol. 1, pp. 402\u2013411, 1989.","journal-title":"Neural Computation"},{"key":"BF02106447_CR37","first-page":"218","volume":"1","author":"S. Becker","year":"1990","unstructured":"S. Becker and G.E. Hinton, \u201cAn Unsupervised Learning Procedure that Discovers Surfaces in Random-Dot Stereograms,\u201dProc. Int. Joint Conf. on Neural Networks, Washington, D.C., Vol. 1, pp. 218\u2013222, Jan. 1990.","journal-title":"Proc. Int. Joint Conf. on Neural Networks, Washington, D.C."},{"key":"BF02106447_CR38","doi-asserted-by":"crossref","first-page":"907","DOI":"10.1109\/4.231327","volume":"28","author":"C.R. Schneider","year":"1993","unstructured":"C.R. Schneider and H.C. Card, \u201cAnalog CMOS Deterministic Boltzmann Circuits,\u201dIEEE J. Solid St. Ccts., Vol. 28, pp. 907\u2013914, Aug. 1993.","journal-title":"IEEE J. Solid St. Ccts."}],"container-title":["Journal of VLSI signal processing systems for signal, image and video technology"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF02106447.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF02106447\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF02106447","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,4,9]],"date-time":"2020-04-09T11:19:55Z","timestamp":1586431195000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF02106447"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1994,10]]},"references-count":38,"journal-issue":{"issue":"3","published-print":{"date-parts":[[1994,10]]}},"alternative-id":["BF02106447"],"URL":"https:\/\/doi.org\/10.1007\/bf02106447","relation":{},"ISSN":["0922-5773"],"issn-type":[{"value":"0922-5773","type":"print"}],"subject":[],"published":{"date-parts":[[1994,10]]}}}