{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,1]],"date-time":"2022-04-01T20:16:18Z","timestamp":1648844178104},"reference-count":21,"publisher":"Springer Science and Business Media LLC","issue":"3","license":[{"start":{"date-parts":[[1994,10,1]],"date-time":"1994-10-01T00:00:00Z","timestamp":780969600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Journal of VLSI Signal Processing"],"published-print":{"date-parts":[[1994,10]]},"DOI":"10.1007\/bf02106454","type":"journal-article","created":{"date-parts":[[2005,9,13]],"date-time":"2005-09-13T00:22:27Z","timestamp":1126570947000},"page":"305-318","source":"Crossref","is-referenced-by-count":3,"title":["A fast VLSI systolic array for large modulus residue addition"],"prefix":"10.1007","volume":"8","author":[{"given":"S.","family":"Bandyopadhyay","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G. A.","family":"Jullien","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Sengupta","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[1994,10,1]]},"reference":[{"key":"BF02106454_CR1","unstructured":"M.A. Soderstrand, W.K. Jenkins, G.A. Jullien, and F.J. Taylor,Residue Number System Arithmetic: Modern Applications in Digital Signal Processing IEEE Press, 1986."},{"key":"BF02106454_CR2","doi-asserted-by":"crossref","first-page":"50","DOI":"10.1109\/MC.1984.1659138","volume":"17","author":"F.J. Taylor","year":"1984","unstructured":"F.J. Taylor, \u201cResidue Arithmetic: A Tutorial with Examples,\u201dIEEE Computer Magazine, 17, pp. 50\u201362, 1984.","journal-title":"IEEE Computer Magazine"},{"key":"BF02106454_CR3","volume-title":"Residue Arithmetic and its Applications to Computer Technology","author":"N.S. Szabo","year":"1967","unstructured":"N.S. Szabo and R.I. Tanaka,Residue Arithmetic and its Applications to Computer Technology. New York: McGraw-Hill, 1967."},{"key":"BF02106454_CR4","doi-asserted-by":"crossref","first-page":"762","DOI":"10.1109\/TC.1973.5009155","volume":"C-22","author":"W.K. Jenkins","year":"1973","unstructured":"W.K. Jenkins, \u201cA Technique for the Efficient Generation of Projections for Error Correcting Residue Codes,\u201dIEEE Trans. Comput., C-22, pp. 762\u2013767, 1973.","journal-title":"IEEE Trans. Comput."},{"key":"BF02106454_CR5","doi-asserted-by":"crossref","first-page":"555","DOI":"10.1109\/TCS.1978.1084495","volume":"CAS-25","author":"W.K. Jenkins","year":"1978","unstructured":"W.K. Jenkins, \u201cTechniques for Residue-to-Analog Conversion for Residue-Encoded Digital Filters,\u201dIEEE Trans. Circuits Syst., CAS-25, pp. 555\u2013562, 1978.","journal-title":"IEEE Trans. Circuits Syst."},{"key":"BF02106454_CR6","doi-asserted-by":"crossref","first-page":"935","DOI":"10.1109\/TCS.1978.1084399","volume":"CAS-25","author":"A. Baraniecka","year":"1978","unstructured":"A. Baraniecka, and G.A. Jullien, \u201cOn Decoding Techniques for Residue Number System Realizations of Digital Signal Processing Hardware,\u201dIEEE Trans. Circuits Syst., CAS-25, pp. 935\u2013936, 1978.","journal-title":"IEEE Trans. Circuits Syst."},{"key":"BF02106454_CR7","doi-asserted-by":"crossref","first-page":"1164","DOI":"10.1109\/TCS.1981.1084942","volume":"CAS-28","author":"F.J. Taylor","year":"1981","unstructured":"F.J. Taylor and A.S. Ramnarayanan, \u201cAn Efficient Residue-to-Decimal Converter,\u201dIEEE Trans. Circuits Syst., CAS-28, pp. 1164\u20131169, 1981.","journal-title":"IEEE Trans. Circuits Syst."},{"key":"BF02106454_CR8","doi-asserted-by":"crossref","first-page":"903","DOI":"10.1109\/TCS.1983.1085311","volume":"CAS-30","author":"M.A. Soderstrand","year":"1983","unstructured":"M.A. Soderstrand, C. Vernia, and J.H. Chang, \u201cAn Improved Residue Number System Digital-to-Analog Converter,\u201dIEEE Trans. Circuits Syst., CAS-30, pp. 903\u2013907, 1983.","journal-title":"IEEE Trans. Circuits Syst."},{"key":"BF02106454_CR9","doi-asserted-by":"crossref","first-page":"646","DOI":"10.1109\/TC.1985.1676602","volume":"C-34","author":"T.V. Vu","year":"1985","unstructured":"T.V. Vu, \u201cEfficient Implementations of the Chinese Remainder Theorem for Sign Detection and Residue Decoding,\u201dIEEE Trans. Comput., C-34, pp. 646\u2013651, 1985.","journal-title":"IEEE Trans. Comput."},{"key":"BF02106454_CR10","doi-asserted-by":"crossref","first-page":"325","DOI":"10.1109\/TC.1978.1675105","volume":"C-27","author":"G.A. Jullien","year":"1978","unstructured":"G.A. Jullien, \u201cResidue Number Scaling and Other Operations Using ROM Arrays,\u201dIEEE Trans. Comput., C-27, pp. 325\u2013336, 1978.","journal-title":"IEEE Trans. Comput."},{"key":"BF02106454_CR11","doi-asserted-by":"crossref","first-page":"604","DOI":"10.1109\/TCS.1987.1086188","volume":"CAS-34","author":"M.A. Bayoumi","year":"1987","unstructured":"M.A. Bayoumi, G.A. Jullien, and W.C. Miller, \u201cA Look Up Table Methodology for RNS Structures Used in DSP Applications,\u201dIEEE Trans. CAS, CAS-34, pp. 604\u2013616, 1987.","journal-title":"IEEE Trans. CAS"},{"key":"BF02106454_CR12","unstructured":"K. Hwang,Computer Arithmetic: Principles, Architecture and Design. John Wiley, 1979."},{"key":"BF02106454_CR13","unstructured":"S. Bandyopadhyay, G.A. Jullien, and M. Bayoumi, \u201cSystolic arrays over finite rings with applications to digital signal processing,\u201dSystolic Array Workshop, Oxford, pp. 123\u2013131, 1986."},{"key":"BF02106454_CR14","doi-asserted-by":"crossref","unstructured":"K.M. Elleithy, M. Bayoumi, and K.P. Lee, \u201cO(logN) Architectures for RNS Arithmetic Decoding,\u201d9th IEEE Symposium on Computer Arithmetic, pp. 202\u2013209, 1989.","DOI":"10.1109\/ARITH.1989.72827"},{"key":"BF02106454_CR15","doi-asserted-by":"crossref","unstructured":"G.A. Jullien, W.C. Miller, R. Grondin, Z. Wang, D. Zhang, L. Del Pup, and S. Bizzan, \u201cWoodChuck: A Low-Level Synthesizer for Dynamic Pipelined DSP Arithmetic Logic Blocks,\u201d1992 IEEE Int. Symp. on Circuits and Systems, San Diego, pp. 176\u2013179, 1992.","DOI":"10.1109\/ISCAS.1992.229985"},{"key":"BF02106454_CR16","doi-asserted-by":"crossref","first-page":"62","DOI":"10.1109\/4.16303","volume":"24","author":"J. Yuan","year":"1989","unstructured":"J. Yuan and C. Svensson, \u201cHigh-Speed CMOS Circuit Technique,\u201dIEEE. J. Solid-State Circuits, 24, pp. 62\u201370, 1989.","journal-title":"IEEE. J. Solid-State Circuits"},{"key":"BF02106454_CR17","doi-asserted-by":"crossref","unstructured":"N.M. Wigley, G.A. Jullien, D. Reaume, and W.C. Miller, \u201cSmall Moduli Replications in the MMRNS,\u201d10th IEEE Symposium on Computer Arithmetic, Grenoble, pp. 92\u201399, 1991.","DOI":"10.1109\/ARITH.1991.145539"},{"key":"BF02106454_CR18","unstructured":"C.N. Zhang, B. Shirazi, and D.Y.Y. Yun, \u201cParallel Designs for Chinese Remainder Conversion,\u201dInternational Conference on Parallel Processing, Chicago, pp. 557\u2013559, 1987."},{"key":"BF02106454_CR19","doi-asserted-by":"crossref","unstructured":"M. Griffin, F. Taylor, and M. Sousa, \u201cNew Scaling Algorithms for the Chinese Remainder Theorem,\u201d22nd Asilomar Conference on Signals, Systems and Computers, pp. 375\u2013378, 1988.","DOI":"10.1109\/ACSSC.1988.754020"},{"key":"BF02106454_CR20","unstructured":"S. Bandyopadhyay, G.A. Jullien, and A. Sengupta. \u201cA systolic architecture for implementing the Chinese Remainder Theorem,\u201dInternational Conference on Parallel Processing, Chicago, pp. 924\u2013931. (This paper was inadvertently omitted from the Conference Proceedings. Copies of the paper may be obtained from the first author.), 1987."},{"key":"BF02106454_CR21","doi-asserted-by":"crossref","unstructured":"S. Bandyopadhyay, G.A. Jullien, and A. Sengupta, \u201cA systolic array for fault tolerant digital signal processing using a residue number system approach,\u201dInternational Conference on Systolic Arrays, pp. 577\u2013586, 1988.","DOI":"10.1109\/ARRAYS.1988.18094"}],"container-title":["Journal of VLSI signal processing systems for signal, image and video technology"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF02106454.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF02106454\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF02106454","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,14]],"date-time":"2019-05-14T15:02:15Z","timestamp":1557846135000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF02106454"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1994,10]]},"references-count":21,"journal-issue":{"issue":"3","published-print":{"date-parts":[[1994,10]]}},"alternative-id":["BF02106454"],"URL":"https:\/\/doi.org\/10.1007\/bf02106454","relation":{},"ISSN":["0922-5773"],"issn-type":[{"value":"0922-5773","type":"print"}],"subject":[],"published":{"date-parts":[[1994,10]]}}}