{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,1]],"date-time":"2022-04-01T06:25:08Z","timestamp":1648794308351},"reference-count":7,"publisher":"Springer Science and Business Media LLC","issue":"3","license":[{"start":{"date-parts":[[1997,5,1]],"date-time":"1997-05-01T00:00:00Z","timestamp":862444800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J. of Comput. Sci. & Technol."],"published-print":{"date-parts":[[1997,5]]},"DOI":"10.1007\/bf02948977","type":"journal-article","created":{"date-parts":[[2008,9,12]],"date-time":"2008-09-12T20:45:46Z","timestamp":1221252346000},"page":"271-282","source":"Crossref","is-referenced-by-count":0,"title":["Path sensitization"],"prefix":"10.1007","volume":"12","author":[{"given":"Zhuxing","family":"Zhao","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yinghua","family":"Min","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhongcheng","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"BF02948977_CR1","doi-asserted-by":"crossref","unstructured":"Cheng S W, Chen H, Du D H C, Lim A. The role of long and short paths in circuit performance optimization.IEEE Trans. CAD, 1994, 13(7).","DOI":"10.1109\/43.293942"},{"key":"BF02948977_CR2","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4615-2688-9","volume-title":"Timed Boolean Functions","author":"W K C Lam","year":"1994","unstructured":"Lam W K C, Brayton R K. Timed Boolean Functions. KLUWER ACADEMIC PUBLISHER, USA, 1994."},{"key":"BF02948977_CR3","doi-asserted-by":"crossref","unstructured":"Gray C T, Liu W, Cavin R K. III, Timing constraints for wave-pipelined systems.IEEE Trans. CAD, 1994, 13(8).","DOI":"10.1109\/43.298035"},{"key":"BF02948977_CR4","unstructured":"Min Yinghua, Zhao Zhuxing, Li Zhongcheng. Boolean process \u2014 An analytical approach to circuit representation. InProc. ATS'95, India, 1995."},{"key":"BF02948977_CR5","unstructured":"Min Yinghua. Boolean process \u2014 An analytical approach to circuit representation. InProc. ATS'94, Japan, 1994."},{"key":"BF02948977_CR6","unstructured":"Young S. Logic synthesis and optimization benchmarks user guide version 3. Jan. 15, 1991."},{"key":"BF02948977_CR7","unstructured":"Min Yinghua, Zhao Zhuxing, Li Zhongcheng. An analytical delay model based-on Boolean process. InProc. The 9th International Conference on VLSI Design, India, 1996."}],"container-title":["Journal of Computer Science and Technology"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF02948977.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/BF02948977\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BF02948977","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,22]],"date-time":"2019-05-22T19:03:12Z","timestamp":1558551792000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BF02948977"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1997,5]]},"references-count":7,"journal-issue":{"issue":"3","published-print":{"date-parts":[[1997,5]]}},"alternative-id":["BF02948977"],"URL":"https:\/\/doi.org\/10.1007\/bf02948977","relation":{},"ISSN":["1000-9000","1860-4749"],"issn-type":[{"value":"1000-9000","type":"print"},{"value":"1860-4749","type":"electronic"}],"subject":[],"published":{"date-parts":[[1997,5]]}}}