{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T13:24:00Z","timestamp":1725456240849},"publisher-location":"Berlin, Heidelberg","reference-count":22,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540630913"},{"type":"electronic","value":"9783540691280"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1997]]},"DOI":"10.1007\/bfb0017251","type":"book-chapter","created":{"date-parts":[[2005,11,22]],"date-time":"2005-11-22T01:31:40Z","timestamp":1132623100000},"page":"154-174","source":"Crossref","is-referenced-by-count":1,"title":["Determining asynchronous pipeline execution times"],"prefix":"10.1007","author":[{"given":"Val","family":"Donaldson","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jeanne","family":"Ferrante","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2005,6,10]]},"reference":[{"key":"10_CR1","doi-asserted-by":"crossref","unstructured":"Alexander Aiken and Alexandru Nicolau. Optimal loop parallelization. Proc. SIG-PLAN '88 Conference on Programming Language Design and Implementation, Atlanta, GA, June 1988, pp. 308\u2013317.","DOI":"10.1145\/53990.54021"},{"issue":"8","key":"10_CR2","doi-asserted-by":"publisher","first-page":"1468","DOI":"10.1109\/78.388859","volume":"43","author":"S. Banerjee","year":"1995","unstructured":"Sati Banerjee, Takeo Hamada, Paul M. Chau, and Ronald D. Fellman. Macro pipelining based scheduling on high performance heterogeneous multiprocessor systems. IEEE Transactions on Signal Processing 43:8 (June 1995), pp. 1468\u20131484.","journal-title":"IEEE Transactions on Signal Processing"},{"key":"10_CR3","volume-title":"Ph.D. Thesis","author":"S. M. Burns","year":"1991","unstructured":"Steven M. Burns. Performance analysis and optimization of asynchronous circuits. Ph.D. Thesis, California Institute of Technology, Pasadena, California, 1991."},{"issue":"5","key":"10_CR4","doi-asserted-by":"crossref","first-page":"511","DOI":"10.1016\/S0022-0000(71)80013-2","volume":"5","author":"F. Commoner","year":"1971","unstructured":"F. Commoner, A. W. Holt, S. Even, and A. Pnueli. Marked directed graphs. Journal of Computer and System Sciences 5:5 (October 1971), pp. 511\u2013523.","journal-title":"Journal of Computer and System Sciences"},{"key":"10_CR5","volume-title":"Introduction to Algorithms","author":"T. H. Cormen","year":"1990","unstructured":"Thomas H. Cormen, Charles E. Leiserson, and Ronald L. Rivest. Introduction to Algorithms. MIT Press, Cambridge, MA, 1990."},{"key":"10_CR6","doi-asserted-by":"crossref","unstructured":"Val Donaldson and Jeanne Ferrante. Determining asynchronous acyclic pipeline execution times. Proc. 10th International Parallel Processing Symposium, Honolulu, HI, April 1996, pp. 568\u2013572.","DOI":"10.1109\/IPPS.1996.508113"},{"key":"10_CR7","volume-title":"Technical Report CS96-481","author":"V. Donaldson","year":"1996","unstructured":"Val Donaldson and Jeanne Ferrante. Determining asynchronous pipeline execution times. Technical Report CS96-481, Computer Science and Engineering Dept., University of California, San Diego, La Jolla, CA, April 1996."},{"key":"10_CR8","doi-asserted-by":"crossref","unstructured":"Franco Gasperoni and Uwe Schwiegeishohn. Scheduling loops on parallel processors: a simple algorithm with close to optimum performance. Second Joint International Conference on Vector and Parallel Processing (Parallel Processing: CON-PAR 92-VAPP V), Lyon, France, September 1992, pp. 625\u2013636.","DOI":"10.1007\/3-540-55895-0_463"},{"issue":"6","key":"10_CR9","doi-asserted-by":"crossref","first-page":"567","DOI":"10.1002\/net.3230230607","volume":"23","author":"M. Hartmann","year":"1993","unstructured":"Mark Hartmann and James B. Orlin. Finding minimum cost to time ratio cycles with small integral transit times. Networks 23:6 (September 1993), pp. 567\u201374.","journal-title":"Networks"},{"issue":"6","key":"10_CR10","doi-asserted-by":"publisher","first-page":"2225","DOI":"10.1109\/78.218149","volume":"41","author":"P. D. Hoang","year":"1993","unstructured":"Phu D. Hoang and Jan M. Rabaey. Scheduling of DSP programs onto multiprocessors for maximum throughput. IEEE Transactions on Signal Processing 41:6 (June 1993), pp. 2225\u20132235.","journal-title":"IEEE Transactions on Signal Processing"},{"issue":"1","key":"10_CR11","doi-asserted-by":"publisher","first-page":"77","DOI":"10.1137\/0204007","volume":"4","author":"D. B. Johnson","year":"1975","unstructured":"Donald B. Johnson. Finding all the elementary circuits of a directed graph. SIAM Journal on Computing 4:1 (March 1975), pp. 77\u201384.","journal-title":"SIAM Journal on Computing"},{"key":"10_CR12","volume-title":"The Architecture of Pipelined Computers","author":"P. M. Kogge","year":"1981","unstructured":"Peter M. Kogge. The Architecture of Pipelined Computers. Hemisphere Publishing, New York, 1981."},{"issue":"6","key":"10_CR13","doi-asserted-by":"publisher","first-page":"592","DOI":"10.1016\/0743-7315(87)90032-3","volume":"4","author":"S. Y. Kung","year":"1987","unstructured":"S. Y. Kung, P. S. Lewis, and S. C. Lo. Performance analysis and optimization of VLSI dataflow arrays. Journal of Parallel and Distributed Computing 4:6 (December 1987), pp. 592\u2013618.","journal-title":"Journal of Parallel and Distributed Computing"},{"key":"10_CR14","doi-asserted-by":"crossref","unstructured":"Monica Lam. Software pipelining: an effective scheduling technique for VLIW machines. Proc. SIGPLAN '88 Conference on Programming Language Design and Implementation, Atlanta, GA, June 1988, pp. 318\u2013328.","DOI":"10.1145\/53990.54022"},{"key":"10_CR15","volume-title":"Combinatorial Optimization: Networks and Matroids","author":"E. L. Lawler","year":"1976","unstructured":"Eugene L. Lawler. Combinatorial Optimization: Networks and Matroids. Holt, Rinehart, and Winston, New York, 1976."},{"key":"10_CR16","volume-title":"Introduction to Parallel Algorithms and Architectures: Arrays, Trees, Hypercubes","author":"F. T. Leighton","year":"1992","unstructured":"F. Thomson Leighton. Introduction to Parallel Algorithms and Architectures: Arrays, Trees, Hypercubes. Morgan Kaufmann, San Mateo, CA, 1992."},{"issue":"12","key":"10_CR17","doi-asserted-by":"publisher","first-page":"1184","DOI":"10.1145\/7902.7904","volume":"29","author":"D. A. Padua","year":"1986","unstructured":"David A. Padua and Michael J. Wolfe. Advanced compiler optimizations for supercomputers. Communications of the ACM 29:12 (December 1986), pp. 1184\u20131201.","journal-title":"Communications of the ACM"},{"issue":"5","key":"10_CR18","doi-asserted-by":"crossref","first-page":"440","DOI":"10.1109\/TSE.1980.230492","volume":"SE-6","author":"C. V. Ramamoorthy","year":"1980","unstructured":"C. V. Ramamoorthy and Gary S. Ho. Performance evaluation of asynchronous concurrent systems using Petri nets. IEEE Transactions on Software Engineering SE-6:5 (September 1980), pp. 440\u2013449.","journal-title":"IEEE Transactions on Software Engineering"},{"issue":"4","key":"10_CR19","doi-asserted-by":"publisher","first-page":"590","DOI":"10.1145\/321479.321485","volume":"15","author":"R. Reiter","year":"1968","unstructured":"Raymond Reiter. Scheduling parallel computations. Journal of the ACM 15:4 (October 1968), pp. 590\u2013599.","journal-title":"Journal of the ACM"},{"key":"10_CR20","volume-title":"Partitioning and Scheduling Parallel Programs for Multiprocessors","author":"V. Sarkar","year":"1989","unstructured":"Vivek Sarkar. Partitioning and Scheduling Parallel Programs for Multiprocessors. MIT Press, Cambridge, MA, 1989."},{"key":"10_CR21","first-page":"151","volume":"II","author":"T. Yang","year":"1995","unstructured":"Tao Yang, Cong Fu, Apostolos Gerasoulis, and Vivek Sarkar. Mapping iterative task graphs on distributed memory machines. Proc. 24th International Conference on Parallel Processing, Oconomowoc, WI, August 1995, Vol II, pp. 151\u2013158.","journal-title":"Proc. 24th International Conference on Parallel Processing, Oconomowoc, WI"},{"issue":"9","key":"10_CR22","doi-asserted-by":"publisher","first-page":"951","DOI":"10.1109\/71.308533","volume":"5","author":"T. Yang","year":"1994","unstructured":"Tao Yang and Apostolos Gerasoulis. DSC: scheduling parallel tasks on an unbounded number of processors. IEEE Transactions on Parallel and Distributed Systems 5:9 (September 1994), pp. 951\u2013967.","journal-title":"IEEE Transactions on Parallel and Distributed Systems"}],"container-title":["Lecture Notes in Computer Science","Languages and Compilers for Parallel Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BFb0017251","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,2,5]],"date-time":"2019-02-05T03:43:46Z","timestamp":1549338226000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BFb0017251"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1997]]},"ISBN":["9783540630913","9783540691280"],"references-count":22,"URL":"https:\/\/doi.org\/10.1007\/bfb0017251","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1997]]}}}