{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T13:30:26Z","timestamp":1725456626811},"publisher-location":"Berlin\/Heidelberg","reference-count":9,"publisher":"Springer-Verlag","isbn-type":[{"type":"print","value":"354056778X"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/bfb0021711","type":"book-chapter","created":{"date-parts":[[2005,11,23]],"date-time":"2005-11-23T04:47:42Z","timestamp":1132721262000},"page":"15-26","source":"Crossref","is-referenced-by-count":8,"title":["A Petri Net approach for the analysis of VHDL descriptions"],"prefix":"10.1007","author":[{"given":"S.","family":"Olcoz","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J. M.","family":"Colom","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"2_CR1","doi-asserted-by":"crossref","unstructured":"P. Camurati, P. Prinetto: Formal verification of Hardware Correctness: Introduction and Survey of current Research. IEEE Computer, July 1988, pp 8\u201319.","DOI":"10.1109\/2.65"},{"key":"2_CR2","volume-title":"Technical Report N. 41","author":"M. Gordon","year":"1984","unstructured":"M. Gordon: LCF-LSM. Technical Report N. 41, University of Cambridge (UK), 1984."},{"key":"2_CR3","doi-asserted-by":"crossref","unstructured":"M. Sheeran: \u03bcFP, a Language for VLSI design. Proc. ACM Symposium on LISP and Functional Programming, Austin, Texas (USA), 1984.","DOI":"10.1145\/800055.802026"},{"key":"2_CR4","doi-asserted-by":"crossref","unstructured":"R. Boute: System Semantics: principles, applications and implementation. ACM Transaction on Programming Languages and Systems, Vol. 10, N. 1, January 1988.","DOI":"10.1145\/42192.45067"},{"key":"2_CR5","unstructured":"A. Bartsch et al.: LOVERT \u2014 A logic verifier of Register\u2014Transfer Descriptions. Proc. IFIP International Workshop on Applied Formal Methods for Correct VLSI Design, Houthalen (Belgium), November 13\u201316, 1989."},{"key":"2_CR6","doi-asserted-by":"crossref","unstructured":"R. Piloty et al.:CONLAN Report, Springer Verlag, 1983.","DOI":"10.1007\/3-540-12275-3"},{"key":"2_CR7","unstructured":"J. Vantassel et al.: Toward a formal verification of VHDL specifications. Proc. IFIP W.G. 10.2 International Workshop on Applied Formal Methods for Correct VLSI Design, Houthalen (Belgium), November 13\u201316, 1989."},{"key":"2_CR8","unstructured":"IEEE Standard VHDL Language Reference Manual, IEEE, Inc. New York, NY, March, 1988."},{"issue":"No.4","key":"2_CR9","doi-asserted-by":"crossref","first-page":"541","DOI":"10.1109\/5.24143","volume":"77","author":"T. Murata","year":"1989","unstructured":"T. Murata: Petri nets: properties, analysis, and applications. Proceedings of the IEEE, Vol. 77, No. 4, April 1989, pp 541\u2013580.","journal-title":"Proceedings of the IEEE"}],"container-title":["Lecture Notes in Computer Science","Correct Hardware Design and Verification Methods"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/www.springerlink.com\/index\/pdf\/10.1007\/BFb0021711","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,4,11]],"date-time":"2020-04-11T00:49:58Z","timestamp":1586566198000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BFb0021711"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["354056778X"],"references-count":9,"URL":"https:\/\/doi.org\/10.1007\/bfb0021711","relation":{},"subject":[]}}