{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T13:31:45Z","timestamp":1725456705406},"publisher-location":"Berlin, Heidelberg","reference-count":11,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540644729"},{"type":"electronic","value":"9783540697886"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1998]]},"DOI":"10.1007\/bfb0032689","type":"book-chapter","created":{"date-parts":[[2005,12,1]],"date-time":"2005-12-01T09:59:57Z","timestamp":1133431197000},"page":"146-162","source":"Crossref","is-referenced-by-count":0,"title":["Program optimization for concurrent multithreaded architectures"],"prefix":"10.1007","author":[{"given":"Jenn-Yuan","family":"Tsait","sequence":"first","affiliation":[]},{"given":"Zhenzhen","family":"Jiang","sequence":"additional","affiliation":[]},{"given":"Pen-Chung","family":"Yew","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2005,6,9]]},"reference":[{"key":"10_CR1","doi-asserted-by":"crossref","unstructured":"Ding-Kai Chen and Pen-Chung Yew. Statement reordering for doacross loops. In Proceedings of International Conference on Parallel Processing, volume Vol. II, August 1994.","DOI":"10.1109\/ICPP.1994.186"},{"key":"10_CR2","unstructured":"Pradeep K. Dubey, Kevin O'Brien, Kathryn O'Brien, and Charles Barton. Singleprogram speculative multithreading (SPSM) architecture: Compiler-assisted finegrained multithreading. In Proceedings of the IFIP WG 10.3 Working Conference on Parallel Architectures and Compilation Techniques, PACT '95, pages 109\u2013121, June 27\u201329, 1995."},{"key":"10_CR3","doi-asserted-by":"crossref","unstructured":"Marco Fillo, Stephen W. Keckler, William J. Dally, Nicholas P. Carter, Andrew Chang, Yevgeny Gurevich, and Whay S. Lee. The m-machine multicomputer. In Proceedings of the 28th Annual International Symposium on Microarchitecture, pages 146\u2013156, November 29-December 1, 1995.","DOI":"10.1109\/MICRO.1995.476822"},{"key":"10_CR4","doi-asserted-by":"crossref","unstructured":"Manoj Franklin and Gurindar S. Sohi. The expandable split window paradigm for exploiting fine-grained parallelism. In Proceedings of the 19th Annual International Symposium on Computer Architecture, pages 58\u201367, May 19\u201321, 1992.","DOI":"10.1145\/139669.139703"},{"key":"10_CR5","doi-asserted-by":"crossref","unstructured":"Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yoshiyuki Mochizuki, Akio Nishimura, Yoshimori Nakase, and Teiji Nishizawa. An elementary processor architecture with simultaneous instruction issuing from multiple threads. In Proceedings of the 19th Annual International Symposium on Computer Architecture, pages 136\u2013145, May 19\u201321, 1992.","DOI":"10.1145\/139669.139710"},{"key":"10_CR6","doi-asserted-by":"crossref","unstructured":"Zhiyuan Li. Array privatization for parallel execution of loops. In Proceedings of the 6th ACM International Conference on Supercomputing, pages 313\u2013322, July 1992.","DOI":"10.1145\/143369.143426"},{"key":"10_CR7","unstructured":"M. D. Smith. Tracing with pixie. Technical report, Stanford University, Stanford, California 94305, November 1991. Technical Report CSL-TR-91-497."},{"key":"10_CR8","doi-asserted-by":"crossref","unstructured":"Gurindar S. Sohi, Scott E. Breach, and T. N. Vijaykumar. Multiscalar processors. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, pages 414\u2013425, June 22\u201324, 1995.","DOI":"10.1145\/223982.224451"},{"key":"10_CR9","doi-asserted-by":"crossref","unstructured":"Jenn-Yuan Tsai and Pen-Chung Yew. The superthreaded architecture: Thread pipelining with run-time data dependence checking and control speculation. In Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques, PACT '96, pages 35\u201346, October 20\u201323, 1996.","DOI":"10.1109\/PACT.1996.552553"},{"key":"10_CR10","doi-asserted-by":"crossref","unstructured":"Dean M. Tullsen, Susan J. Eggers, and Henry M. Levy. Simultaneous multithreading: Maximizing on-chip parallelism. In Proceedings of the 22nd Annual International Symposium on Computer Architecture, pages 392\u2013403, June 22\u201324, 1995.","DOI":"10.1145\/223982.224449"},{"key":"10_CR11","unstructured":"Michael J. Wolfe. Optimizing supercompilers for supercomputers. Technical report, University of Illinois, October 1982. Technical Report UIUCDCS-R-82-1105."}],"container-title":["Lecture Notes in Computer Science","Languages and Compilers for Parallel Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/BFb0032689","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,4,11]],"date-time":"2020-04-11T08:35:38Z","timestamp":1586594138000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/BFb0032689"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1998]]},"ISBN":["9783540644729","9783540697886"],"references-count":11,"URL":"https:\/\/doi.org\/10.1007\/bfb0032689","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1998]]}}}