{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,28]],"date-time":"2025-03-28T00:31:52Z","timestamp":1743121912937,"version":"3.40.3"},"publisher-location":"Berlin, Heidelberg","reference-count":12,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540649489"},{"type":"electronic","value":"9783540680666"}],"license":[{"start":{"date-parts":[[1998,1,1]],"date-time":"1998-01-01T00:00:00Z","timestamp":883612800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[1998,1,1]],"date-time":"1998-01-01T00:00:00Z","timestamp":883612800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1998]]},"DOI":"10.1007\/bfb0055228","type":"book-chapter","created":{"date-parts":[[2006,7,27]],"date-time":"2006-07-27T08:11:44Z","timestamp":1153987904000},"page":"9-18","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":15,"title":["Pebble: A language for parametrised and reconfigurable hardware design"],"prefix":"10.1007","author":[{"given":"Wayne","family":"Luk","sequence":"first","affiliation":[]},{"given":"Steve","family":"McKeever","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2006,5,27]]},"reference":[{"key":"2_CR1","doi-asserted-by":"crossref","unstructured":"P. Bellows and B. Hutchings, \u201cJHDL \u2014 an HDL for reconfigurable systems\u201d, in Proc. FCCM98, IEEE Computer Society Press, 1998.","DOI":"10.21236\/ADA450477"},{"key":"2_CR2","doi-asserted-by":"crossref","unstructured":"S. Gehring and S. Ludwig, \u201cThe Trianus system and its application to custom computing\u201d, in Field-Programmable Logic, Smart Applications, New Paradigms and Compilers, LNCS 1142, Springer, 1996.","DOI":"10.1007\/3-540-61730-2_18"},{"key":"2_CR3","unstructured":"M. Gokhale and E. Gomersall, \u201cHigh-Level compilation for fine-grained FPGAs\u201d, in Proc. FCCM97, IEEE Computer Society Press, 1997."},{"key":"2_CR4","unstructured":"M.J.C. Gordon, \u201cWhy Higher-Order Logic is a good formalism for specifying and verifying hardware\u201d, in Formal Aspects of VLSI Design, G. Milne and P.A. Subrahmanyam (eds.), North Holland, 1986."},{"key":"2_CR5","unstructured":"Y. Li and M. Leeser, \u201cHML: an innovative hardware description language and its translation to VHDL\u201d, in Proc. CHDL'95, 1995."},{"key":"2_CR6","doi-asserted-by":"crossref","unstructured":"W. Luk, \u201cSystematic serialization of array-based architectures\u201d, Integration, the VLSI Journal, 14(3), February 1993.","DOI":"10.1016\/0167-9260(93)90014-4"},{"key":"2_CR7","doi-asserted-by":"crossref","unstructured":"W. Luk, S. Guo, N. Shirazi and N. Zhuang, \u201cA framework for developing parametrised FPGA libraries\u201d, in Field-Programmable Logic, Smart Applications, New Paradigms and Compilers, LNCS 1142, Springer, 1996.","DOI":"10.1007\/3-540-61730-2_3"},{"key":"2_CR8","unstructured":"W. Luk, N. Shirazi and P.Y.K. Cheung, \u201cCompilation tools for run-time reconfigurable designs\u201d, in Proc. FCCM97, IEEE Computer Society Press, 1997."},{"key":"2_CR9","doi-asserted-by":"crossref","unstructured":"W. Luk, N. Shirazi, S. Guo and P.Y.K. Cheung, \u201cPipeline morphing and virtual pipelines\u201d, in Field Programmable Logic and Applications, LNCS 1304, Springer, 1997.","DOI":"10.1007\/3-540-63465-7_216"},{"key":"2_CR10","unstructured":"W. Luk, S. McKeever and M. Weinhardt, A Tutorial Introduction to Pebble, Technical Report, Imperial College, 1998."},{"key":"2_CR11","doi-asserted-by":"crossref","unstructured":"P. Lysaght and J. Stockwood, \u201cA simulation tool for dynamically reconfigurable field programmable gate arrays\u201d, IEEE Trans. VLSI, 4(3), September 1996.","DOI":"10.1109\/92.532038"},{"key":"2_CR12","unstructured":"S. Singh, Lava, http:\/\/www.dcs.gla.ac.uk\/~satnam\/lava\/main.html."}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic and Applications From FPGAs to Computing Paradigm"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/BFb0055228","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,7]],"date-time":"2022-07-07T12:33:07Z","timestamp":1657197187000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/BFb0055228"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1998]]},"ISBN":["9783540649489","9783540680666"],"references-count":12,"URL":"https:\/\/doi.org\/10.1007\/bfb0055228","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1998]]},"assertion":[{"value":"27 May 2006","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}