{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,28]],"date-time":"2025-03-28T09:38:21Z","timestamp":1743154701655,"version":"3.40.3"},"publisher-location":"Berlin, Heidelberg","reference-count":15,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540649489"},{"type":"electronic","value":"9783540680666"}],"license":[{"start":{"date-parts":[[1998,1,1]],"date-time":"1998-01-01T00:00:00Z","timestamp":883612800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[1998,1,1]],"date-time":"1998-01-01T00:00:00Z","timestamp":883612800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1998]]},"DOI":"10.1007\/bfb0055229","type":"book-chapter","created":{"date-parts":[[2006,7,27]],"date-time":"2006-07-27T08:11:44Z","timestamp":1153987904000},"page":"19-28","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Integrated development environment for logic synthesis based on dynamically reconfigurable FPGAs"],"prefix":"10.1007","author":[{"given":"Valery","family":"Sklyarov","sequence":"first","affiliation":[]},{"given":"Ricardo Sal","family":"Monteiro","sequence":"additional","affiliation":[]},{"given":"Nuno","family":"Lau","sequence":"additional","affiliation":[]},{"given":"Andreia","family":"Melo","sequence":"additional","affiliation":[]},{"given":"Arnaldo","family":"Oliveira","sequence":"additional","affiliation":[]},{"given":"Konstantin","family":"Kondratjuk","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2006,5,27]]},"reference":[{"key":"3_CR1","unstructured":"Giovanni De Micheli: Synthesis and Optimization of Digital Circuits. McGraw-Hill, Inc., (1994)"},{"key":"3_CR2","unstructured":"Xilinx: XC6200 Field Programmable Gate Arrays, Xilinx Product Description (Version 1.10). April 24 (1997)"},{"key":"3_CR3","unstructured":"Xilinx: XACTstep Series 6000 User Guide. (1997)"},{"issue":"no.3","key":"3_CR4","doi-asserted-by":"publisher","first-page":"366","DOI":"10.1109\/5.558710","volume":"85","author":"S. Edwards","year":"1997","unstructured":"Stepen Edwards, Luciano Lavagno, Edward A. Lee, Alberto Sangiovanny-Vincentelli: Design of Embedded Systems: Formal Models, Validation, and Synthesis. Proceeding of the IEEE, vol. 85, no. 3, March (1997) 366\u2013390","journal-title":"Proceeding of the IEEE"},{"key":"3_CR5","unstructured":"Valery Sklyarov, Nuno Lau, Ricardo Sal Monteiro, Andreia Melo, Arnaldo Oliveira, Konstantin Kondratjuk: Design of Virtual Digital Controllers Based on Dynamically Reconfigurable FPGAs. Proc. of Workshop on Digital System Design: Architectures. Methods and Tools, Vasteras, Sweden (1998)"},{"key":"3_CR6","doi-asserted-by":"crossref","unstructured":"S.Baranov: Logic Synthesis for Control Automata. Kluwer Academic Publishers (1994)","DOI":"10.1007\/978-1-4615-2692-6"},{"key":"3_CR7","doi-asserted-by":"crossref","unstructured":"Valery Sklyarov, Antonio Adrego da Rocha, Antonio de Brito Ferrari: Synthesis of Reconfigurable Control Devices Based on Object-Oriented Specifications. In: Advanced Techniques for Embedded Systems Design and Test. Kluwer Academic Publishers (1998) 151\u2013177","DOI":"10.1007\/978-1-4757-4419-4_7"},{"key":"3_CR8","unstructured":"Valery Sklyarov, Antonio de Brito Ferrari: Synthesis of Control Devices Described by Hierarchical Graph-Schemes. Springer-Verlag (1998) 181\u2013191"},{"key":"3_CR9","unstructured":"Antonio Adrego da Rocha, Valery Sklyarov, Antonio de Brito Ferrari: Hierarchical Description and Design of Control Circuits Based on Reconfigurable and Reprogrammable Elements. Proc. of the International Workshop on Logic and Architectural Synthesis \u2014 IWLAS'97, Grenoble, December (1997) 73\u201382"},{"key":"3_CR10","unstructured":"Xilinx: Velab, VHDL Elaborator for XC6200 (v0.52). Internet at URL http:\/\/www.xilinx.com\/apps\/velabrel.htm (1998)"},{"key":"3_CR11","unstructured":"Annapolis Micro Systems, Inc.: XC6200 PCI Board C++ Interface. Included in FireFly\u2133 Board Documentation."},{"key":"3_CR12","unstructured":"Valery Sklyarov, Antonio de Brito Ferrari: Design and Implementation of Control Circuits Based on Dynamically Reconfigurable FPGA. Proc. of IEEE International Conference on Electronics, Circuits and Systems, Lisbon (1998)"},{"key":"3_CR13","unstructured":"Valery Sklyarov, Antonio Adrego da Rocha, Antonio de Brito Ferrari: Applying Procedural and Object-Oriented Decomposition to the Logical Synthesis of Digital Devices. Proc. of the Second International Conference on Computer-Aided Design of Discrete Devices CADDD'97, Minsk (1997) 15\u201320."},{"key":"3_CR14","unstructured":"Annapolis Micro Systems, Inc.: FIREFLY\u2133 Tutorials. Included in FireFly\u2133 Board Documentation. November (1997)"},{"issue":"No2","key":"3_CR15","first-page":"261","volume":"2","author":"A. Zakrevskij","year":"1998","unstructured":"A.Zakrevskij: Combinatorial Problems over Logical Matrices in Logic Design and Artificial Intelligence. Electr\u00f3nica e Telecomunica\u00c7\u00d5es, vol. 2, No 2 (1998) 261\u2013268.","journal-title":"Electr\u00f3nica e Telecomunica\u00c7\u00d5es"}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic and Applications From FPGAs to Computing Paradigm"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/BFb0055229","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,7]],"date-time":"2022-07-07T12:34:07Z","timestamp":1657197247000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/BFb0055229"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1998]]},"ISBN":["9783540649489","9783540680666"],"references-count":15,"URL":"https:\/\/doi.org\/10.1007\/bfb0055229","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1998]]},"assertion":[{"value":"27 May 2006","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}