{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,30]],"date-time":"2025-03-30T18:02:42Z","timestamp":1743357762068,"version":"3.40.3"},"publisher-location":"Berlin, Heidelberg","reference-count":17,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540649489"},{"type":"electronic","value":"9783540680666"}],"license":[{"start":{"date-parts":[[1998,1,1]],"date-time":"1998-01-01T00:00:00Z","timestamp":883612800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[1998,1,1]],"date-time":"1998-01-01T00:00:00Z","timestamp":883612800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1998]]},"DOI":"10.1007\/bfb0055254","type":"book-chapter","created":{"date-parts":[[2006,7,27]],"date-time":"2006-07-27T08:11:44Z","timestamp":1153987904000},"page":"268-277","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":15,"title":["Mapping loops onto reconfigurable architectures"],"prefix":"10.1007","author":[{"given":"Kiran","family":"Bondalapati","sequence":"first","affiliation":[]},{"given":"Viktor K.","family":"Prasanna","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2006,5,27]]},"reference":[{"key":"28_CR1","unstructured":"K. Bondalapati and V.K. Prasanna. Reconfigurable Meshes: Theory and Practice. In Reconfigurable Architectures Workshop, RAW'97, Apr 1997."},{"key":"28_CR2","unstructured":"Kiran Bondalapati and Viktor K. Prasanna. The Hybrid System Architecture Model (HySAM) of Reconfigurable Architectures. Technical report, Department of Electrical Engineering-Systems, University of Southern California, 1998."},{"key":"28_CR3","unstructured":"D. A. Buell, J. M. Arnold, and W. J. Kleinfelder. Splash 2: FPGAs in a Custom Computing Machine. IEEE Computer Society Press, 1996."},{"key":"28_CR4","unstructured":"S. Choi and V.K. Prasanna. Configurable Hardware for Symbolic Search Operations. In International Conference on Parallel and Distributed Systems, Dec 1997."},{"key":"28_CR5","unstructured":"Y. Chung and V.K. Prasanna. Parallel Object Recognition on an FPGA-based Configurable Computing Platform. In International Workshop on Computer Architectures for Machine Perception, Oct 1997."},{"key":"28_CR6","doi-asserted-by":"crossref","unstructured":"A. Dandalis and V.K. Prasanna. Fast Parallel Implementation of DFT using Configurable Devices. In 7th International Workshop on Field-Programmable Logic and Applications, Sept 1997.","DOI":"10.1007\/3-540-63465-7_236"},{"key":"28_CR7","doi-asserted-by":"crossref","unstructured":"J. Hauser and J. Wawrzynek. Garp: A MIPS Processor with a Reconfigurable Coprocessor. In IEEE Symposium on FPGAs for Custom Computing Machines, pages 12\u201321, April 1997.","DOI":"10.1109\/FPGA.1997.624600"},{"key":"28_CR8","doi-asserted-by":"crossref","unstructured":"R. Kress, R.W. Hartenstein, and U. Nageldinger. An Operating System for Custom Computing Machines based on the Xputer Paradigm. In 7th International Workshop on Field-Programmable Logic and Applications, pages 304\u2013313, Sept 1997.","DOI":"10.1007\/3-540-63465-7_235"},{"key":"28_CR9","doi-asserted-by":"crossref","unstructured":"A. Lawrence, A. Kay, W. Luk, T. Nomura, and I. Page. Using reconfigurable hardware to speed up product development and performance. In 5th International Workshop on Field-Programmable Logic and Applications, 1995.","DOI":"10.1007\/3-540-60294-1_104"},{"key":"28_CR10","doi-asserted-by":"crossref","unstructured":"W. Luk, N. Shirazi, S.R. Guo, and P.Y.K. Cheung. Pipeline Morphing and Virtual Pipelines. In 7th International Workshop on Field-Programmable Logic and Applications, Sept 1997.","DOI":"10.1007\/3-540-63465-7_216"},{"key":"28_CR11","doi-asserted-by":"crossref","unstructured":"P. Lysaght and J. Stockwood. A Simulation Tool for Dynamically Reconfigurable FPGAs. IEEE Transactions on VLSI Systems, Sept 1996.","DOI":"10.1109\/92.532038"},{"key":"28_CR12","unstructured":"Xilinx DSP Application Notes. The Fastest FFT in the West, http:\/\/www.xilinx.com\/apps\/displit.htm."},{"key":"28_CR13","doi-asserted-by":"crossref","unstructured":"R.J. Petersen and B. Hutchings. An Assessment of the Suitability of FPGA-Based Systems for use in Digital Signal Processing. In 5th International Workshop on Field-Programmable Logic and Applications, 1995.","DOI":"10.1007\/3-540-60294-1_123"},{"key":"28_CR14","doi-asserted-by":"crossref","unstructured":"S. Trimberger, D. Carberry, A. Johnson, and J. Wong. A Time-Multiplexed FPGA. In IEEE Symposium on FPGAs for Custom Computing Machines, pages 22\u201328, April 1997.","DOI":"10.1109\/FPGA.1997.624601"},{"key":"28_CR15","unstructured":"NSC NAPA 1000 URL. http:\/\/www.national.com\/appinfo\/milaero\/napa1000\/."},{"issue":"1","key":"28_CR16","doi-asserted-by":"publisher","first-page":"56","DOI":"10.1109\/92.486081","volume":"4","author":"J. Vuillemin","year":"1996","unstructured":"J. Vuillemin, P. Bertin, D. Roncin, M. Shand, H. Touati, and P. Boucard. Programmable Active Memories: Reconfigurable Systems Come of Age. IEEE Transactions on VLSI Systems, 4(1):56\u201369, March 1996.","journal-title":"IEEE Transactions on VLSI Systems"},{"key":"28_CR17","unstructured":"M. Weinhardt. Compilation and Pipeline Synthesis for Reconfigurable Architectures. In Reconfigurable Architectures Workshop RAW'97. ITpress Verlag, Apr 1997."}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic and Applications From FPGAs to Computing Paradigm"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/BFb0055254","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,10]],"date-time":"2025-01-10T03:10:15Z","timestamp":1736478615000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/BFb0055254"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1998]]},"ISBN":["9783540649489","9783540680666"],"references-count":17,"URL":"https:\/\/doi.org\/10.1007\/bfb0055254","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1998]]},"assertion":[{"value":"27 May 2006","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}