{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,25]],"date-time":"2025-10-25T18:59:57Z","timestamp":1761418797760},"reference-count":33,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2012,7,21]],"date-time":"2012-07-21T00:00:00Z","timestamp":1342828800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Circuits Syst Signal Process"],"published-print":{"date-parts":[[2013,2]]},"DOI":"10.1007\/s00034-012-9458-2","type":"journal-article","created":{"date-parts":[[2012,7,21]],"date-time":"2012-07-21T02:59:03Z","timestamp":1342839543000},"page":"29-46","source":"Crossref","is-referenced-by-count":8,"title":["A Mixed Mode Neural Network Circuitry for Object Recognition Application"],"prefix":"10.1007","volume":"32","author":[{"given":"Burcu","family":"Erkmen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Revna Acar","family":"Vural","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Nihan","family":"Kahraman","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tulay","family":"Yildirim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2012,7,21]]},"reference":[{"key":"9458_CR1","volume-title":"CMOS Circuit Design, Layout, and Simulation","author":"J. Baker","year":"1997","unstructured":"J. Baker, CMOS Circuit Design, Layout, and Simulation, 2nd edn. (Wiley\/IEEE Press, New York, 1997)","edition":"2"},{"key":"9458_CR2","doi-asserted-by":"crossref","first-page":"3283","DOI":"10.1109\/ISCAS.1990.112713","volume-title":"IEEE Int. Symp. on Circuits and Systems","author":"S. Bibyk","year":"1990","unstructured":"S. Bibyk, M. Ismail, T. Borgstrom, K. Adkins, R. Kaul, N. Khachab, S. Dupuie, Current-mode neural network building blocks for analog MOS VLSI, in IEEE Int. Symp. on Circuits and Systems, vol.\u00a04 (1990), pp. 3283\u20133285"},{"key":"9458_CR3","first-page":"103","volume-title":"Proc. of 5th Int. Conf. on Microelectronics for Neural Networks","author":"G.M. Bo","year":"1996","unstructured":"G.M. Bo, D.D. Caviglia, M. Valle, A current mode CMOS multi-layer perceptron chip, in Proc. of 5th Int. Conf. on Microelectronics for Neural Networks (1996), pp. 103\u2013106"},{"key":"9458_CR4","doi-asserted-by":"crossref","first-page":"67","DOI":"10.1109\/ICMNN.1994.593184","volume-title":"Proc. of the 4th Int. Conf. on Microelectronics for Neural Networks and Fuzzy Systems","author":"G. Cairns","year":"1994","unstructured":"G. Cairns, L. Tarassenko, Learning with analogue VLSI MLPs, in Proc. of the 4th Int. Conf. on Microelectronics for Neural Networks and Fuzzy Systems (1994), pp. 67\u201376"},{"key":"9458_CR5","volume-title":"Learning on Silicon Adaptive VLSI Neural Systems","author":"G. Cauwenberghs","year":"1999","unstructured":"G. Cauwenberghs, M.A. Bayoumi, Learning on Silicon Adaptive VLSI Neural Systems (Kluwer Academic, Norwell, 1999)"},{"key":"9458_CR6","doi-asserted-by":"crossref","first-page":"1143","DOI":"10.1109\/TCSI.2009.2028751","volume":"57","author":"J. Chen","year":"2010","unstructured":"J. Chen, T. Shibata, A neuron-MOS-based VLSI implementation of pulse-coupled neural networks for image feature generation. IEEE Trans. Circuits Syst. I, Regul. Pap. 57, 1143\u20131153 (2010)","journal-title":"IEEE Trans. Circuits Syst. I, Regul. Pap."},{"key":"9458_CR7","doi-asserted-by":"crossref","first-page":"1713","DOI":"10.1109\/TCSI.2002.805697","volume":"49","author":"W. Chung-Yu","year":"2002","unstructured":"W. Chung-Yu, C. Chiu-Hung, A learnable cellular neural network structure with ratio memory for image processing. IEEE Trans. Circuits Syst. I, Fundam. Theory Appl. 49, 1713\u20131723 (2002)","journal-title":"IEEE Trans. Circuits Syst. I, Fundam. Theory Appl."},{"key":"9458_CR8","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"440","DOI":"10.1007\/3-540-48219-9_44","volume-title":"Multiple Classifier Systems","author":"S. Cohen","year":"2001","unstructured":"S. Cohen, N. Intrator, Automatic model selection in a hybrid perceptron\/radial network, in Multiple Classifier Systems. Lecture Notes in Computer Science, vol.\u00a02096 (2001), pp. 440\u2013454"},{"key":"9458_CR9","doi-asserted-by":"crossref","first-page":"511","DOI":"10.1080\/01969729408902340","volume":"25","author":"G. Dorffner","year":"1994","unstructured":"G. Dorffner, Unified frameworks for MLP and RBFNs: introducing conic section function networks. Cybern. Syst. 25, 511\u2013554 (1994)","journal-title":"Cybern. Syst."},{"key":"9458_CR10","first-page":"807","volume-title":"Proc. of the 18th European Conf. on Circuit Theory and Design","author":"B. Erkmen","year":"2007","unstructured":"B. Erkmen, T. Yildirim, Obtaining decision boundaries of CSFNN neurons using current mode analog circuitry, in Proc. of the 18th European Conf. on Circuit Theory and Design (2007), pp. 807\u2013810"},{"key":"9458_CR11","unstructured":"B. Erkmen, Mixed mode hardware realization of a general purposed artificial neural network. Ph.D. Thesis, Yildiz Technical University, Turkey (2007)"},{"issue":"4","key":"9458_CR12","doi-asserted-by":"crossref","first-page":"667","DOI":"10.1109\/TNN.2010.2040751","volume":"21","author":"B. Erkmen","year":"2010","unstructured":"B. Erkmen, N. Kahraman, R.A. Vural, T. Yildirim, Conic section function neural network circuitry for offline signature recognition. IEEE Trans. Neural Netw. 21(4), 667\u2013672 (2010)","journal-title":"IEEE Trans. Neural Netw."},{"key":"9458_CR13","doi-asserted-by":"crossref","first-page":"564","DOI":"10.1109\/ICM.2004.1434725","volume-title":"Proc. of the 16th Int. Conf. on Microelectronics","author":"H. Esmaelzadeh","year":"2004","unstructured":"H. Esmaelzadeh, C. Farshbaf, S.M. Lucas, S.M. Fakhraie, Digital implementation for conic section function networks, in Proc. of the 16th Int. Conf. on Microelectronics (2004), pp. 564\u2013567"},{"key":"9458_CR14","first-page":"363","volume-title":"Neural Networks. A Comprehensive Foundation","author":"S. Haykin","year":"1994","unstructured":"S. Haykin, Neural Networks. A Comprehensive Foundation (Macmillan, New York, 1994), pp. 363\u2013370"},{"key":"9458_CR15","volume-title":"Analog-to-Digital and Digital-to-Analog Conversion Techniques","author":"D.F. Hoeschele","year":"1994","unstructured":"D.F. Hoeschele, Analog-to-Digital and Digital-to-Analog Conversion Techniques, 2nd edn. (Wiley, New York, 1994)","edition":"2"},{"issue":"1","key":"9458_CR16","doi-asserted-by":"crossref","first-page":"32","DOI":"10.1109\/JSSC.2009.2031768","volume":"45","author":"J.-Y. Kim","year":"2010","unstructured":"J.-Y. Kim et al., A 201.4 GOPS 496 mW real-time multi-object recognition processor with bio-inspired neural perception engine. IEEE J. Solid-State Circuits 45(1), 32\u201345 (2010)","journal-title":"IEEE J. Solid-State Circuits"},{"key":"9458_CR17","first-page":"1350","volume-title":"Lecture Notes in Computer Science","author":"K.J. Kyoung","year":"2006","unstructured":"K.J. Kyoung, Fully-pipelining hardware implementation of neural network for text-based images retrieval, in Lecture Notes in Computer Science, vol.\u00a03973 (2006), pp. 1350\u20131356"},{"key":"9458_CR18","first-page":"97","volume-title":"Proc. of the Computer Vision and Pattern Recognition Conference","author":"Y. Lecun","year":"2004","unstructured":"Y. Lecun, F.J. Huang, L. Bottou, Learning methods for generic object recognition with invariance to pose and lighting, in Proc. of the Computer Vision and Pattern Recognition Conference, vol.\u00a02 (2004), pp. 97\u2013104"},{"key":"9458_CR19","doi-asserted-by":"crossref","first-page":"91","DOI":"10.1023\/B:VISI.0000029664.99615.94","volume":"60","author":"G. Lowe","year":"2004","unstructured":"G. Lowe, Distinctive image features from scale-invariant keypoints. Int. J. Comput. Vis. 60, 91\u2013110 (2004)","journal-title":"Int. J. Comput. Vis."},{"key":"9458_CR20","first-page":"573","volume-title":"IEEE Int. Symp. on Circuits and Systems","author":"C. Lu","year":"2001","unstructured":"C. Lu, B. Shi, L. Chen, A programmable on-chip BP learning neural network with enhanced neuron characteristics, in IEEE Int. Symp. on Circuits and Systems, May 2001, vol.\u00a03 (2001), pp. 573\u2013576"},{"key":"9458_CR21","first-page":"1854","volume-title":"IEEE Int. Conf. on Neural Networks","author":"P. Masa","year":"1994","unstructured":"P. Masa, K. Hoen, H. Wallinga, 70 input, 20 nanosecond pattern classifier, in IEEE Int. Conf. on Neural Networks (1994), pp. 1854\u20131859"},{"key":"9458_CR22","first-page":"1","volume-title":"Canadian Conf. on Electrical and Computer Engineering","author":"M. Mirhassani","year":"2003","unstructured":"M. Mirhassani, M. Ahmadi, W.C. Miller, A mixed-signal VLSI neural network with on-chip learning, in Canadian Conf. on Electrical and Computer Engineering (2003), pp. 1\u20134"},{"key":"9458_CR23","first-page":"300","volume-title":"The Microelectronic Engineering Journal","author":"M. Mirhassani","year":"2007","unstructured":"M. Mirhassani, M. Ahmadi, W.C. Miller, A feed-forward time-multiplexed neural network with mixed-signal neuron-synapse arrays, in The Microelectronic Engineering Journal, vol.\u00a084 (2007), pp.\u00a0300\u2013307. Special issue on VLSI Design and Test"},{"key":"9458_CR24","doi-asserted-by":"crossref","first-page":"413","DOI":"10.1109\/72.557695","volume":"8","author":"A.J. Montalvo","year":"1997","unstructured":"A.J. Montalvo, R.S. Gyurcsik, J.J. Paulos, Toward a general-purpose analog VLSI neural network with on-chip learning. IEEE Trans. Neural Netw. 8, 413\u2013423 (1997)","journal-title":"IEEE Trans. Neural Netw."},{"key":"9458_CR25","first-page":"1248","volume-title":"Proceedings of the IEEE","author":"P. Pavan","year":"1997","unstructured":"P. Pavan, R. Bez, P. Olivo, E. Zanoni, Flash memory cells: an overview, in Proceedings of the IEEE, vol.\u00a085 (1997), pp. 1248\u20131271"},{"key":"9458_CR26","first-page":"345","volume-title":"IEE Proc. on Circuits, Devices and Systems","author":"A. Schmid","year":"1999","unstructured":"A. Schmid, Y. Leblebici, D. Mlynek, Mixed analogue-digital artificial-neural-network architecture with on-chip learning, in IEE Proc. on Circuits, Devices and Systems, vol.\u00a0146 (1999), pp. 345\u2013349"},{"key":"9458_CR27","volume-title":"Advanced Semiconductor Memories, Architectures and Applications","author":"A.K. Sharma","year":"2003","unstructured":"A.K. Sharma, Advanced Semiconductor Memories, Architectures and Applications (Wiley-Interscience\/IEEE Press, Norwell, 2003)"},{"key":"9458_CR28","doi-asserted-by":"crossref","first-page":"3","DOI":"10.1007\/978-1-4615-2247-8_1","volume-title":"Neural Information Processing and VLSI","author":"B.J. Sheu","year":"1995","unstructured":"B.J. Sheu, J. Choi, Neural Information Processing and VLSI (Kluwer Academic, New York, 1995), pp. 3\u201316"},{"key":"9458_CR29","first-page":"1345","volume-title":"IEEE Int. Conf. on Industrial Technology","author":"F. Stupmann","year":"2002","unstructured":"F. Stupmann, S. Rode, G. Geske, Single chip-VLSI-realization of a neural net for image recognition, in IEEE Int. Conf. on Industrial Technology, vol.\u00a02 (2002), pp. 1345\u20131348"},{"key":"9458_CR30","first-page":"1","volume-title":"16th IEEE Signal Processing, Communication and Applications Conference","author":"R.A. Vural","year":"2008","unstructured":"R.A. Vural, N. Kahraman, B. Erkmen, T. Yildirim, Object recognition on general purposed conic section function neural network integrated circuit, in 16th IEEE Signal Processing, Communication and Applications Conference (2008), pp. 1\u20134"},{"key":"9458_CR31","doi-asserted-by":"crossref","first-page":"47","DOI":"10.1109\/NEBC.1992.285920","volume-title":"Proc. of the IEEE Bioengineering Conference Northeast","author":"S. Wolpert","year":"1992","unstructured":"S. Wolpert, L.A. Lee, J.F. Heisler, Circuits for a VLSI-based standalone backpropagation neural network, in Proc. of the IEEE Bioengineering Conference Northeast (1992), pp.\u00a047\u201348"},{"key":"9458_CR32","doi-asserted-by":"crossref","first-page":"1162","DOI":"10.1109\/TNN.2003.816035","volume":"14","author":"M.P. Yang","year":"2003","unstructured":"M.P. Yang, Implementation of an RBF neural network on embedded systems: real-time face tracking and identity verification. IEEE Trans. Neural Netw. 14, 1162\u20131175 (2003)","journal-title":"IEEE Trans. Neural Netw."},{"key":"9458_CR33","first-page":"156","volume-title":"Proc. 8th Int. Conf. on Neural Networks and Their Applications","author":"T. Y\u0131ld\u0131r\u0131m","year":"1995","unstructured":"T. Y\u0131ld\u0131r\u0131m, J.S. Marsland, An RBF\/MLP hybrid neural network implemented in VLSI hardware, in Proc. 8th Int. Conf. on Neural Networks and Their Applications (1995), pp. 156\u2013160"}],"container-title":["Circuits, Systems, and Signal Processing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-012-9458-2.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s00034-012-9458-2\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-012-9458-2","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T07:48:45Z","timestamp":1561967325000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s00034-012-9458-2"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,7,21]]},"references-count":33,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2013,2]]}},"alternative-id":["9458"],"URL":"https:\/\/doi.org\/10.1007\/s00034-012-9458-2","relation":{},"ISSN":["0278-081X","1531-5878"],"issn-type":[{"value":"0278-081X","type":"print"},{"value":"1531-5878","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,7,21]]}}}