{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,11,14]],"date-time":"2022-11-14T17:12:37Z","timestamp":1668445957101},"reference-count":26,"publisher":"Springer Science and Business Media LLC","issue":"9","license":[{"start":{"date-parts":[[2017,1,6]],"date-time":"2017-01-06T00:00:00Z","timestamp":1483660800000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"funder":[{"name":"the Fundamental Research Funds for the Central Universities of China","award":["JB150222"],"award-info":[{"award-number":["JB150222"]}]}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Circuits Syst Signal Process"],"published-print":{"date-parts":[[2017,9]]},"DOI":"10.1007\/s00034-016-0488-z","type":"journal-article","created":{"date-parts":[[2017,1,6]],"date-time":"2017-01-06T06:22:36Z","timestamp":1483683756000},"page":"3598-3615","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":6,"title":["A Novel Low Delay High-Voltage Level Shifter with Transient Performance Insensitive to Parasitic Capacitance and Transfer Voltage Level"],"prefix":"10.1007","volume":"36","author":[{"given":"Xinquan","family":"Lai","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Longjie","family":"Zhong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Donglai","family":"Xu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hongyi","family":"Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bing","family":"Yuan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Qinqin","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rui","family":"Ding","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jingxiang","family":"Zhao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2017,1,6]]},"reference":[{"issue":"11","key":"488_CR1","doi-asserted-by":"crossref","first-page":"817","DOI":"10.1049\/el.2015.0614","volume":"51","author":"M Abdelhamid","year":"2015","unstructured":"M. Abdelhamid, F. Hussien, M. Aboudina, Charge-compensated correlated level shiftering for single-stage opamps. Electron. Lett. 51(11), 817\u2013818 (2015)","journal-title":"Electron. Lett."},{"key":"488_CR2","unstructured":"L. Balogh, Design And Application Guide For High Speed MOSFET Gate Drive Circuits"},{"key":"488_CR3","unstructured":"R. Brodersen et al., Design issues for dynamic voltage scaling. in Proceedings of 2000 International Symposium Low Power Electronics and Design (ISLPED00) (2000), pp. 9\u201314"},{"key":"488_CR4","doi-asserted-by":"crossref","unstructured":"J. Buyle, V. De Gezelle, B. Bakeroot, J. Doutreloigne, A new type of level-shifter for n-type high-side switches used in high-voltage switching ADSL line drivers. in Proceedings of IEEE International Conference Electronics Circuits and Systems (2008), pp. 954\u2013957","DOI":"10.1109\/ICECS.2008.4675013"},{"key":"488_CR5","doi-asserted-by":"crossref","first-page":"992","DOI":"10.1109\/TCE.2009.5278054","volume":"55","author":"B Choi","year":"2009","unstructured":"B. Choi, Enhancement of current driving capability in data driver ICs for plasma display panels. IEEE Trans. Consum. Electron. 55, 992\u2013997 (2009)","journal-title":"IEEE Trans. Consum. Electron."},{"key":"488_CR6","unstructured":"M.J. Declerq, M. Schubert, F. Clement, 5V-to-75V CMOS output interface circuits. in IEEE International Solid-State Circuits Conference (ISSCC\u201993) Digest of Technical Papers (1993), pp. 162\u2013163"},{"key":"488_CR7","doi-asserted-by":"crossref","unstructured":"J. Doutreloigne, A fully integrated ultra-low-power high-voltage driver for bistable LCDs. in Proceedings of IEEE International Symposium VLSI Design Automation and Test (2006), pp. 1\u20134","DOI":"10.1109\/VDAT.2006.258180"},{"issue":"1","key":"488_CR8","doi-asserted-by":"crossref","first-page":"46","DOI":"10.1109\/81.260219","volume":"41","author":"IM Filanovsky","year":"1994","unstructured":"I.M. Filanovsky, H. Baltes, CMOS Schmitt trigger design. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 41(1), 46\u201349 (1994)","journal-title":"IEEE Trans. Circuits Syst. I Fundam. Theory Appl."},{"issue":"12","key":"488_CR9","doi-asserted-by":"crossref","first-page":"2620","DOI":"10.1109\/JSSC.2008.2006312","volume":"43","author":"BR Gregoire","year":"2008","unstructured":"B.R. Gregoire, U.K. Moon, An over-60 dB true rail-to-rail performance using correlated level shiftering and an opamp with only 30 dB loop gain. IEEE J. Solid-State Circuits 43(12), 2620\u20132630 (2008)","journal-title":"IEEE J. Solid-State Circuits"},{"key":"488_CR10","unstructured":"Y. Kanno, H. Mizuno, K. Tanaka, T. Watanabe, Level converters with high immunity to power supply bouncing for high-speed sub-1-V LSIs. in Symposium on VLSI Circuits (2000), pp. 202\u2013203"},{"key":"488_CR11","doi-asserted-by":"crossref","unstructured":"M. Khorasani, L. van den Berg, P. Marshall, M. Zargham, V. Gaudet, D. Elliott, S. Martel, Low-power static and dynamic high-voltage CMOS level-shifter circuits. in ISCAS IEEE International Symposium on Circuits and Systems (2008), pp. 1946\u20131949","DOI":"10.1109\/ISCAS.2008.4541825"},{"issue":"10","key":"488_CR12","doi-asserted-by":"crossref","first-page":"2303","DOI":"10.1109\/JSSC.2007.897148","volume":"42","author":"JP Kulkarni","year":"2007","unstructured":"J.P. Kulkarni, K. Kim, K. Roy, A 160 mV robust Schmitt trigger based subthreshold SRAM. IEEE J. Solid-State Circuits 42(10), 2303\u20132313 (2007)","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"2","key":"488_CR13","doi-asserted-by":"crossref","first-page":"319","DOI":"10.1109\/TVLSI.2010.2100834","volume":"20","author":"JP Kulkarni","year":"2012","unstructured":"J.P. Kulkarni, K. Roy, Ultralow-voltage process-variation-tolerant schmitt-trigger-based SRAM design. IEEE Trans. Very Large Scale Integr. Syst. 20(2), 319\u2013332 (2012)","journal-title":"IEEE Trans. Very Large Scale Integr. Syst."},{"key":"488_CR14","unstructured":"D.O. Larsen, P. Llimos Muntal, I.H.H. Jorgensen, E. Bruun, High-voltage pulse-triggered SR latch level-shifter design considerations. in NORCHIP (2014), pp. 1\u20136"},{"key":"488_CR15","unstructured":"Z. Liu, H. Lee, A 100V gate driver with sub-nanosecond-delay capacitive-coupled level shiftering and dynamic timing control for ZVS-based synchronous power converters. in IEEE Custom Integrated Circuits Conference (CICC) (2013), pp. 1\u20134"},{"issue":"6","key":"488_CR16","doi-asserted-by":"crossref","first-page":"1463","DOI":"10.1109\/JSSC.2015.2422075","volume":"50","author":"Z Liu","year":"2015","unstructured":"Z. Liu, L. Cong, H. Lee, Design of on-chip gate drivers with power-efficient high-speed level shiftering and dynamic timing control for high-voltage synchronous switching power converters. IEEE J. Solid-State Circuits 50(6), 1463\u20131477 (2015)","journal-title":"IEEE J. Solid-State Circuits"},{"issue":"2","key":"488_CR17","doi-asserted-by":"crossref","first-page":"485","DOI":"10.1109\/JSSC.2010.2091322","volume":"46","author":"Y Moghe","year":"2011","unstructured":"Y. Moghe, T. Lehmann, T. Piessens, Nanosecond delay floating high voltage level shifterers in a 0.35 m HV-CMOS technology. IEEE J. Solid-State Circuits 46(2), 485\u2013497 (2011)","journal-title":"IEEE J. Solid-State Circuits"},{"key":"488_CR18","unstructured":"D. Pan, H.W. Li, B.M. Wilamowski, A low voltage to high voltage level shifterer circuit for MEMS application. in University\/Government\/Industry Microelectronics Symposium (2003)"},{"key":"488_CR19","volume-title":"Design of Analog CMOS Integrated Circuits","author":"B Razavi","year":"2001","unstructured":"B. Razavi, Design of Analog CMOS Integrated Circuits (McGraw-Hill Inc., New York, 2001)"},{"key":"488_CR20","doi-asserted-by":"crossref","first-page":"774","DOI":"10.1109\/TVLSI.2015.2409051","volume":"24","author":"A Shapiro","year":"2015","unstructured":"A. Shapiro, E.G. Friedman, Power efficient level shifterer for 16 nm FinFET near threshold circuits. IEEE Trans. Very Large Scale Integr. Syst. 24, 774\u2013778 (2015)","journal-title":"IEEE Trans. Very Large Scale Integr. Syst."},{"issue":"12","key":"488_CR21","doi-asserted-by":"crossref","first-page":"857","DOI":"10.1109\/TCSII.2013.2281943","volume":"60","author":"E Tabasy","year":"2013","unstructured":"E. Tabasy, M. Kamarei, S. Ashtiani, S. Palermo, Sequential correlated level shiftering: a switched-capacitor approach for high-accuracy systems. IEEE Trans. Circuits Syst. II Express Briefs 60(12), 857\u2013861 (2013)","journal-title":"IEEE Trans. Circuits Syst. II Express Briefs"},{"issue":"16","key":"488_CR22","doi-asserted-by":"crossref","first-page":"876","DOI":"10.1049\/el:20020627","volume":"38","author":"SC Tan","year":"2002","unstructured":"S.C. Tan, X.W. Sun, Low power CMOS level shifterers by bootstrapping technique. Electron. Lett. 38(16), 876\u2013878 (2002)","journal-title":"Electron. Lett."},{"key":"488_CR23","unstructured":"Unisonic Technologies Co. Ltd. (UTC) 0.5um 5V\/40V\/100V BCD process SPICE model"},{"key":"488_CR24","doi-asserted-by":"crossref","unstructured":"J. Wittmann, T. Rosahl, B. Wicht, A 50V high-speed level shifterer with high dv\/dt immunity for multi-MHz DCDC converters. in European Solid State Circuits Conference (ESSCIRC) (ESSCIRC , 2014), pp. 151\u2013154","DOI":"10.1109\/ESSCIRC.2014.6942044"},{"issue":"4","key":"488_CR25","doi-asserted-by":"crossref","first-page":"290","DOI":"10.1109\/TCSII.2010.2043471","volume":"57","author":"SN Wooters","year":"2010","unstructured":"S.N. Wooters, B.H. Calhoun, T.N. Blalock, An energy-efficient subthreshold level converter in 130-nm CMOS. IEEE Trans. Circuits Syst. II. Express Briefs 57(4), 290\u2013294 (2010)","journal-title":"IEEE Trans. Circuits Syst. II. Express Briefs"},{"issue":"3","key":"488_CR26","doi-asserted-by":"crossref","first-page":"697","DOI":"10.1109\/TCSI.2014.2380691","volume":"62","author":"J Zhou","year":"2015","unstructured":"J. Zhou et al., An ultra-low voltage level shifterer using revised Wilson current mirror for fast and energy-efficient wide-range voltage conversion from sub-threshold to I\/O voltage. IEEE Trans. Circuits Syst. I 62(3), 697\u2013706 (2015)","journal-title":"IEEE Trans. Circuits Syst. I"}],"container-title":["Circuits, Systems, and Signal Processing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s00034-016-0488-z\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-016-0488-z.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-016-0488-z.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,17]],"date-time":"2019-09-17T06:33:02Z","timestamp":1568701982000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s00034-016-0488-z"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,1,6]]},"references-count":26,"journal-issue":{"issue":"9","published-print":{"date-parts":[[2017,9]]}},"alternative-id":["488"],"URL":"https:\/\/doi.org\/10.1007\/s00034-016-0488-z","relation":{},"ISSN":["0278-081X","1531-5878"],"issn-type":[{"value":"0278-081X","type":"print"},{"value":"1531-5878","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,1,6]]}}}