{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T16:12:40Z","timestamp":1761581560104,"version":"3.37.3"},"reference-count":34,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2017,5,25]],"date-time":"2017-05-25T00:00:00Z","timestamp":1495670400000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Circuits Syst Signal Process"],"published-print":{"date-parts":[[2018,2]]},"DOI":"10.1007\/s00034-017-0574-x","type":"journal-article","created":{"date-parts":[[2017,5,25]],"date-time":"2017-05-25T11:48:13Z","timestamp":1495712893000},"page":"500-531","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":9,"title":["Design Procedure and Selection of TIQ Comparators for Flash ADCs"],"prefix":"10.1007","volume":"37","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-2897-6908","authenticated-orcid":false,"given":"Abdulrahman","family":"Abumurad","sequence":"first","affiliation":[]},{"given":"Kyusun","family":"Choi","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2017,5,25]]},"reference":[{"key":"574_CR1","doi-asserted-by":"crossref","unstructured":"A.\u00a0Abumurad, K.\u00a0Choi, Increasing the ADC precision with oversampling in a flash ADC, in IEEE 11th International Conference on Solid-State and Integrated Circuit Technology (2012)","DOI":"10.1109\/ICSICT.2012.6467786"},{"key":"574_CR2","doi-asserted-by":"crossref","unstructured":"R.\u00a0K.\u00a0Agarwal, N.\u00a0Jaipalan, A low-power Flash Quantizer using Inverter Threshold Reference and Dual Mode Operation, in International Conference on Electronics and Communication System (lCECS) (2014)","DOI":"10.1109\/ECS.2014.6892713"},{"issue":"7","key":"574_CR3","first-page":"5204","volume":"12","author":"A Al","year":"2014","unstructured":"A. Al, M. Reaz, J. Jalil, A. Ali, An improved a low power CMOS TIQ comparator flash ADC. TELKOMNIKA Indones. J. Electr. Eng. 12(7), 5204\u20135210 (2014)","journal-title":"TELKOMNIKA Indones. J. Electr. Eng."},{"key":"574_CR4","doi-asserted-by":"crossref","unstructured":"M. Choi, A. Abidi, A 6-b 1.3GSamples\/s A\/D Converter in 0.35m CMOS, in Proceedings of the International Solid State Circuits Conference, pp. 126-127 (2001)","DOI":"10.1109\/4.972135"},{"issue":"3","key":"574_CR5","doi-asserted-by":"crossref","first-page":"450","DOI":"10.1109\/JSSC.2002.808305","volume":"38","author":"PG Drennan","year":"2003","unstructured":"P.G. Drennan, C.C. McAndrew, Understanding MOSFET mismatch for analog design. IEEE J. Solid State Circuits 38(3), 450\u2013456 (2003)","journal-title":"IEEE J. Solid State Circuits"},{"key":"574_CR6","unstructured":"A.D.\u00a0Ferreira, E.\u00a0Santos, CMOS Flash ADC based on the quantization of the threshold voltage, Laboratory for Devices and Nanostructures, University Federal Pernambuco, Recife, Brasil (2009)"},{"key":"574_CR7","unstructured":"S.\u00a0Guha, P.\u00a0Sharma, R.\u00a0Dutta, A SoC based low power 8-bit flash ADC in 45\u00a0nm CMOS technology, in Proceedings of the International Conference on Advances in Electronics, Electrical and Computer Science Engineering (EEC) (2012)"},{"key":"574_CR8","doi-asserted-by":"publisher","unstructured":"Y. K. Gupta et al., A 4-bit, 3.2 GSPS flash analog to digital converter with a new multiplexer based encoder, in 11th International Conference on Electrical Engineering\/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON) 2014 \u00a0IEEE doi: 10.1109\/ECTICon.2014.6839721","DOI":"10.1109\/ECTICon.2014.6839721"},{"key":"574_CR9","doi-asserted-by":"crossref","unstructured":"S.\u00a0Hussain, M.\u00a0Kumar, Design of an efficient 8-bit flash ADC for optical communication receivers, in International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT) (2016)","DOI":"10.1109\/ICEEOT.2016.7755560"},{"key":"574_CR10","doi-asserted-by":"crossref","unstructured":"P.\u00a0Iyappan, P.\u00a0Jamuna, S.\u00a0Vijayasamundiswary, Design of analog to digital converter using CMOS logic, in Advances International Conference on in Recent Technologies in Communication and Computing (2009)","DOI":"10.1109\/ARTCom.2009.84"},{"key":"574_CR11","unstructured":"S. Khot, P. Wani, M. Sutaone, S. Tripathi, Design of a 45nm TIQ comparator for high speed and low power 4-Bit flash ADC, in Proceedings of International Conference on Advances in Electrical and Electronics, pp. 22\u201324 (2010)"},{"key":"574_CR12","unstructured":"D.\u00a0Lee, J.\u00a0Yoo, K.\u00a0Choi, Design method and automation of comparator generation for flash A\/D converter, in Proceedings of the International Symposium on Quality Electronic Design, pp 138-142 (2002)"},{"key":"574_CR13","unstructured":"D. Lee, J. Yoo, K. Choi, J. Ghaznavi, Fat tree encoder design for ultra-high speed flash A\/D converters, in The 2002 45th Midwest Symposium on Circuits and Systems, MWSCAS-2002, vol. 2, pp. 87-90 (2002)"},{"key":"574_CR14","unstructured":"H. Lin, D. Chang, A low-voltage process corner insensitive subthreshold CMOS voltage reference circuit, in IEEE International Conference of Integrated Circuits and Design Technologies (2006)"},{"key":"574_CR15","unstructured":"P.\u00a0Liang-Teck, N.\u00a0Borivoje, Impact of layout on 90\u00a0nm CMOS process parameter fluctuations, in Symposium on VLSI Circuits Design (2006)"},{"key":"574_CR16","doi-asserted-by":"crossref","unstructured":"S.\u00a0Mayur, R.\u00a0Siddharth, Y.\u00a0Nithin Kumar, M.\u00a0Vasantha, Design of Low Power 5-bit Hybrid Flash ADC, Design of Low Power 5-bit Hybrid Flash ADC, (2016)","DOI":"10.1109\/ISVLSI.2016.53"},{"key":"574_CR17","doi-asserted-by":"crossref","unstructured":"N.\u00a0Mishra, W.\u00a0Arif, J.\u00a0Mehedi, S.\u00a0Baishya A Power Efficient 6-Bit TIQ ADC Design for Portable Applications, in IEEE Third International Conference on Consumer Electronics (2013)","DOI":"10.1109\/ICCE-Berlin.2013.6698042"},{"key":"574_CR18","unstructured":"S.\u00a0Mishra, B.\u00a0Nagar, Design of a TIQ Comparator for High Speed and Low Power 4 Bit Flash ADC, in International Journal of Emerging Technologies in Computational and Applied Sciences (IJETCAS), pp 159-163 (2013)"},{"key":"574_CR19","doi-asserted-by":"crossref","unstructured":"V.\u00a0Moyal, N.\u00a0Tripathi, Adiabatic Threshold Inverter Quantizer for a 3-bit Flash ADC, in International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET) (2016)","DOI":"10.1109\/WiSPNET.2016.7566395"},{"key":"574_CR20","doi-asserted-by":"crossref","unstructured":"L.\u00a0Nazir, B.\u00a0Khurshid, R.\u00a0Naaz, A 7GS\/s, 1.2 V. Pseudo logic Encoder based Flash ADC Using TIQ Technique, in Annual IEEE India Conference (INDICON) (2015)","DOI":"10.1109\/INDICON.2015.7443459"},{"key":"574_CR21","doi-asserted-by":"crossref","unstructured":"L.\u00a0Nazir, R.\u00a0Naaz, N.\u00a0Hakim, A 4 GS\/s,1.8 V Multiplexer encoder based Flash ADC using TIQ Technique, in International Conference on Signal Processing and Integrated Networks (SPIN) (2014)","DOI":"10.1109\/SPIN.2014.6776997"},{"issue":"5","key":"574_CR22","doi-asserted-by":"crossref","first-page":"544","DOI":"10.1109\/43.998626","volume":"21","author":"M Orshansky","year":"2002","unstructured":"M. Orshansky, L. Milor, P. Chen, K. Keutzer, C. Hu, Impact of spatial intrachip gate length variability on the performance of high-speed digital circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(5), 544\u2013553 (2002)","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circuits Syst."},{"key":"574_CR23","doi-asserted-by":"crossref","unstructured":"P.\u00a0Palsodkar, K.\u00a0Dakhole, P.\u00a0Palsodkar, Improved power supply rejection (PSR) digital comparator based Flash analog to digital converter (FADC), in International Conference on Electronics and Communication Systems (ICECS) (2014)","DOI":"10.1109\/ECS.2014.6892595"},{"key":"574_CR24","volume-title":"Digital Integrated Circuit a Design Perspective","author":"JM Rabaey","year":"2003","unstructured":"J.M. Rabaey, A. Chandrakasan, B. Nikolic, Digital Integrated Circuit a Design Perspective, 2nd edn. (Prentice Hall, Upper Saddle River, 2003). ch. 5, sec. 3,","edition":"2"},{"key":"574_CR25","unstructured":"G.\u00a0Rajashekar, S.\u00a0Bhat, Design of Resolution Adaptive TIQ Flash ADC using AMS 0.35 $$\\upmu \\text{m}$$ \u03bc m Technology, in IEEE Third International Conference on Consumer Electronics (2013)"},{"issue":"3","key":"574_CR26","doi-asserted-by":"crossref","first-page":"268","DOI":"10.1109\/4.748177","volume":"34","author":"B Razavi","year":"1999","unstructured":"B. Razavi, CMOS technology characterization for analog and RF design. IEEE J. Solid State Circuits 34(3), 268\u2013276 (1999)","journal-title":"IEEE J. Solid State Circuits"},{"issue":"8","key":"574_CR27","doi-asserted-by":"crossref","first-page":"1262","DOI":"10.1109\/4.705367","volume":"U\u201330","author":"J Segura","year":"1998","unstructured":"J. Segura, J.L. Rossello, J. Morra, H. Sigg, A variable threshold voltage inverter for CMOS programmable logic circuits. IEEE J. of Solid State Circuits U\u201330(8), 1262\u20131265 (1998)","journal-title":"IEEE J. of Solid State Circuits"},{"key":"574_CR28","unstructured":"R.\u00a0Sireesha, A.\u00a0Kumar, Design of Low Power 0.8V Flash ADC using TIQ in 90nm Technology, in International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy and Materials (ICSTM), R and D Institute of Science and Technology, Chennai, T.N., India, 6-8 May, (2015). pp.406-410"},{"key":"574_CR29","doi-asserted-by":"crossref","first-page":"147","DOI":"10.1023\/B:ALOG.0000024062.35941.23","volume":"24","author":"A Tangel","year":"2004","unstructured":"A. Tangel, K. Choi, The CMOS inverter as a comparator in ADC designs. Analog Integr. Circuits Signal Process. 24, 147\u2013155 (2004)","journal-title":"Analog Integr. Circuits Signal Process."},{"key":"574_CR30","doi-asserted-by":"crossref","unstructured":"J.\u00a0Yoo, D.\u00a0Lee, K.\u00a0Choi, J.\u00a0Kim, A power and resolution adaptive flash analog-to-digital converter, in International Symposium on Low Power Electronics and Design, (2002)","DOI":"10.1145\/566408.566468"},{"key":"574_CR31","unstructured":"J. Yoo, A TIQ based CMOS flash A\/D converter for system-on-chip applications, Ph.D. Thesis in Computer Science and Engineering, The Pennsylvania State University, (2003)"},{"issue":"3","key":"574_CR32","doi-asserted-by":"crossref","first-page":"1350004","DOI":"10.1142\/S0218126613500047","volume":"22","author":"L Zhao","year":"2013","unstructured":"L. Zhao, Y. Yang, Z. Zhu, A high speed low power latched comparator for SHA-less Pipelined ADC. J. Circuits Syst. Comput. 22(3), 1350004 (2013)","journal-title":"J. Circuits Syst. Comput."},{"issue":"7","key":"574_CR33","doi-asserted-by":"crossref","first-page":"1350061","DOI":"10.1142\/S0218126613500618","volume":"22","author":"Z Zhu","year":"2013","unstructured":"Z. Zhu, W. Wang, Y. Guan, S. Liu, Y. Xiao, A low offset comparator for high speed low power ADC. J. Circuits Syst. Comput. 22(7), 1350061 (2013)","journal-title":"J. Circuits Syst. Comput."},{"issue":"4","key":"574_CR34","doi-asserted-by":"crossref","first-page":"1350018","DOI":"10.1142\/S0218126613500187","volume":"22","author":"Z Zhu","year":"2013","unstructured":"Z. Zhu, H. Wu, G. Yu, Y. Li, L. Liu, Y. Yang, A Low Offset High Speed Comparator for Pipeline ADC. J. Circuits Syst. Comput. 22(4), 1350018 (2013)","journal-title":"J. Circuits Syst. Comput."}],"container-title":["Circuits, Systems, and Signal Processing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s00034-017-0574-x\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-017-0574-x.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-017-0574-x.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,10,8]],"date-time":"2020-10-08T13:44:00Z","timestamp":1602164640000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s00034-017-0574-x"}},"subtitle":["TIQ Comparator Generation Procedure and TIQ comparator Selection Algorithm"],"short-title":[],"issued":{"date-parts":[[2017,5,25]]},"references-count":34,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2018,2]]}},"alternative-id":["574"],"URL":"https:\/\/doi.org\/10.1007\/s00034-017-0574-x","relation":{},"ISSN":["0278-081X","1531-5878"],"issn-type":[{"type":"print","value":"0278-081X"},{"type":"electronic","value":"1531-5878"}],"subject":[],"published":{"date-parts":[[2017,5,25]]}}}