{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,28]],"date-time":"2025-06-28T06:44:48Z","timestamp":1751093088367,"version":"3.37.3"},"reference-count":27,"publisher":"Springer Science and Business Media LLC","issue":"12","license":[{"start":{"date-parts":[[2019,5,7]],"date-time":"2019-05-07T00:00:00Z","timestamp":1557187200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Circuits Syst Signal Process"],"published-print":{"date-parts":[[2019,12]]},"DOI":"10.1007\/s00034-019-01132-y","type":"journal-article","created":{"date-parts":[[2019,5,7]],"date-time":"2019-05-07T16:52:26Z","timestamp":1557247946000},"page":"5606-5622","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":10,"title":["Low-Power Hardware Implementation of Least-Mean-Square Adaptive Filters Using Approximate Arithmetic"],"prefix":"10.1007","volume":"38","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5982-902X","authenticated-orcid":false,"given":"Darjn","family":"Esposito","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0204-0949","authenticated-orcid":false,"given":"Davide","family":"De Caro","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9652-8541","authenticated-orcid":false,"given":"Gennaro","family":"Di Meo","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6200-3990","authenticated-orcid":false,"given":"Ettore","family":"Napoli","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5737-1783","authenticated-orcid":false,"given":"Antonio G. M.","family":"Strollo","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2019,5,7]]},"reference":[{"key":"1132_CR1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-51482-6","volume-title":"Enabling the Internet of Things: From Integrated Circuits to Integrated Systems","author":"M Alioto","year":"2017","unstructured":"M. Alioto, Enabling the Internet of Things: From Integrated Circuits to Integrated Systems (Springer, Berlin, 2017)"},{"key":"1132_CR2","doi-asserted-by":"publisher","first-page":"1327","DOI":"10.1109\/TCSI.2005.851731","volume":"52","author":"DJ Allred","year":"2005","unstructured":"D.J. Allred, Y. Heejong, V. Krishnan, W. Huang, D.V. Anderson, LMS adaptive filters using distributed arithmetic for high throughput. IEEE Trans. Circuits Syst. I Regul. Pap. 52, 1327\u20131337 (2005). \n                    https:\/\/doi.org\/10.1109\/TCSI.2005.851731","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"1132_CR3","doi-asserted-by":"publisher","first-page":"1175","DOI":"10.1109\/78.502330","volume":"44","author":"JCM Bermudez","year":"1996","unstructured":"J.C.M. Bermudez, N.J. Bershad, A nonlinear analytical model for the quantized LMS algorithm-the arbitrary step size case. IEEE Trans. Signal Process. 44, 1175\u20131183 (1996). \n                    https:\/\/doi.org\/10.1109\/78.502330","journal-title":"IEEE Trans. Signal Process."},{"key":"1132_CR4","unstructured":"V.K. Chippa, S.Y. Chakradhar, K. Roy, A. Raghunathan, Analysis and characterization of inherent application resilience for approximate computing, in 50th ACM\/EDAC\/IEEE Design Automation Conference (DAC) (2013), pp. 1\u20139"},{"key":"1132_CR5","unstructured":"K. Du, P. Varman, K. Mohanram, High performance reliable variable latency carry select addition, in Proceedings of Design, Automation and Test in Europe (DATE) (2012), pp. 1257\u20131262"},{"key":"1132_CR6","doi-asserted-by":"publisher","first-page":"1200","DOI":"10.1109\/TCSI.2016.2564699","volume":"63","author":"D Esposito","year":"2016","unstructured":"D. Esposito, D. De Caro, A.G.M. Strollo, Variable latency speculative parallel prefix adders for unsigned and signed operands. IEEE Trans. Circuits Syst. I Regul. Pap. 63, 1200\u20131209 (2016). \n                    https:\/\/doi.org\/10.1109\/TCSI.2016.2564699","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"1132_CR7","unstructured":"D. Esposito, D. De Caro, E. Napoli, N. Petra, A.G.M. Strollo, On the use of approximate adders in carry-save multiplier-accumulators, in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) (2017), pp. 1\u20134"},{"key":"1132_CR8","unstructured":"D. Esposito, A.G.M. Strollo, M. Alioto, Low-power approximate MAC unit, in Proceedings of IEEE PRIME 2017 Conference (2017), pp. 81\u201384"},{"key":"1132_CR9","unstructured":"D. Esposito, G. Di Meo, D. De Caro, N. Petra, E. Napoli, A.G.M. Strollo, On the use of approximate multipliers in LMS adaptive filters, in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) (2018), pp. 1\u20135"},{"key":"1132_CR10","doi-asserted-by":"publisher","DOI":"10.1002\/9781118591352","volume-title":"Adaptive Filters: Theory and Applications","author":"B Farhang-Boroujeny","year":"2013","unstructured":"B. Farhang-Boroujeny, Adaptive Filters: Theory and Applications (Wiley, Hobooken, 2013)"},{"key":"1132_CR11","unstructured":"V. Gupta, D. Mohapatra, S.P. Park, A. Raghunathan, K. Roy, IMPACT: IMPrecise adders for low-power approximate computing, in IEEE\/ACM International Symposium on Low Power Electronics and Design (2011), pp. 409\u2013414"},{"key":"1132_CR12","unstructured":"J. Han, M. Orshansky, Approximate computing: an emerging paradigm for energy-efficient design, in 18th IEEE European Test Symposium (ETS) (2013), pp. 1\u20136"},{"key":"1132_CR13","volume-title":"Adaptive Filter Theory","author":"S Haykin","year":"2002","unstructured":"S. Haykin, Adaptive Filter Theory (Prentice-Hall, Englewood Cliffs, 2002)"},{"key":"1132_CR14","unstructured":"M. Horowitz, 1.1 Computing\u2019s energy problem (and what we can do about it), in IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) (2014), pp. 10\u201314"},{"key":"1132_CR15","unstructured":"M.T. Khan, S.R. Ahamed, VLSI realization of low complexity pipelined LMS filter using distributed arithmetic, in Proceedings TENCON 2017: 2017 IEEE Region 10 Conference (2017), pp. 433\u2013438"},{"key":"1132_CR16","unstructured":"M.T. Khan, S.R. Ahamed, F. Brewer, Low complexity and critical path based VLSI architecture for LMS adaptive filter using distributed arithmetic, in Proceedings of International Conference on VLSI Design and International Conference on Embedded Systems (VLSID) (2017), pp. 127\u2013132"},{"key":"1132_CR17","unstructured":"P. Kulkarni, P. Gupta, M. Ercegovac, Trading accuracy for power with an underdesigned multiplier architecture, in Proceedings of International Conference on VLSI Design (2011), pp. 346\u2013351"},{"issue":"10","key":"1132_CR18","doi-asserted-by":"publisher","first-page":"723","DOI":"10.1109\/TCS.1983.1085295","volume":"30","author":"Y Lim","year":"1983","unstructured":"Y. Lim, S. Parker, Discrete coefficient FIR digital filter design based upon an LMS criteria. IEEE Trans. Circuits Syst. 30(10), 723\u2013739 (1983). \n                    https:\/\/doi.org\/10.1109\/TCS.1983.1085295","journal-title":"IEEE Trans. Circuits Syst."},{"key":"1132_CR19","doi-asserted-by":"publisher","first-page":"1591","DOI":"10.1109\/TVLSI.2014.2355217","volume":"23","author":"IC Lin","year":"2015","unstructured":"I.C. Lin, Y.M. Yang, C.C. Lin, High-performance low-power carry speculative addition with variable latency. IEEE Trans. Very Large Scale Int. Syst. 23, 1591\u20131603 (2015). \n                    https:\/\/doi.org\/10.1109\/TVLSI.2014.2355217","journal-title":"IEEE Trans. Very Large Scale Int. Syst."},{"key":"1132_CR20","unstructured":"M. Liu, M.-J. Wang, B.-Y. Song, An efficient architecture of the sign-error LMS adaptive filter, in 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) (2016), pp. 753\u2013755"},{"key":"1132_CR21","unstructured":"MATLAB, Acoustic Noise Cancellation (LMS) (2019). \n                    https:\/\/it.mathworks.com\/help\/dsp\/examples\/acoustic-noise-cancellation-lms.html\n                    \n                  . Accessed 6 April 2019"},{"key":"1132_CR22","doi-asserted-by":"publisher","first-page":"778","DOI":"10.1109\/TCSI.2013.2284173","volume":"61","author":"PK Meher","year":"2014","unstructured":"P.K. Meher, S.Y. Park, Critical-path analysis and low-complexity implementation of the LMS adaptive algorithm. IEEE Trans. Circuits Syst. I Regul. Pap. 61, 778\u2013788 (2014). \n                    https:\/\/doi.org\/10.1109\/TCSI.2013.2284173","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"1132_CR23","unstructured":"I. Qiqieh, R. Shafik, G. Tarawneh, D. Sokolov, A. Yakovlev, Energy-efficient approximate multiplier using bit significance-driven logic compression, in Proceedings Design, Automation and Test in European Conference (DATE) (2017), pp. 7\u201312"},{"key":"1132_CR24","doi-asserted-by":"publisher","first-page":"1782","DOI":"10.1109\/TVLSI.2016.2643639","volume":"25","author":"S Venkatachalam","year":"2017","unstructured":"S. Venkatachalam, S.-B. Ko, Design of power and area efficient approximate multipliers. IEEE Trans. Very Large Scale Integr. Syst. 25, 1782\u20131786 (2017)","journal-title":"IEEE Trans. Very Large Scale Integr. Syst."},{"key":"1132_CR25","unstructured":"A.K. Verma, P. Brisk, P. Ienne, Variable latency speculative addition: a new paradigm for arithmetic circuit design, in Proceedings of Design, Automation and Test in Europe (DATE) (2008), pp. 1250\u20131255"},{"key":"1132_CR26","doi-asserted-by":"publisher","first-page":"1692","DOI":"10.1109\/PROC.1975.10036","volume":"63","author":"B Widrow","year":"1975","unstructured":"B. Widrow, J.R. Glover, J.M. McCool, J. Kaunitz, C.S. Williams, R.H. Hearn, J.R. Zeidler, J. Eugene Dong, R.C. Goodlin, Adaptive noise cancelling: principles and applications. Proc. IEEE 63, 1692\u20131716 (1975). \n                    https:\/\/doi.org\/10.1109\/PROC.1975.10036","journal-title":"Proc. IEEE"},{"key":"1132_CR27","unstructured":"N. Zhu, W.L. Goh, K.S. Yeo, An enhanced low-power high-speed Adder for Error-Tolerant application, in 12th International Symposium on Integrated Circuits (2009), pp. 69\u201372"}],"container-title":["Circuits, Systems, and Signal Processing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-019-01132-y.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s00034-019-01132-y\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-019-01132-y.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,5,5]],"date-time":"2020-05-05T23:11:23Z","timestamp":1588720283000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s00034-019-01132-y"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,5,7]]},"references-count":27,"journal-issue":{"issue":"12","published-print":{"date-parts":[[2019,12]]}},"alternative-id":["1132"],"URL":"https:\/\/doi.org\/10.1007\/s00034-019-01132-y","relation":{},"ISSN":["0278-081X","1531-5878"],"issn-type":[{"type":"print","value":"0278-081X"},{"type":"electronic","value":"1531-5878"}],"subject":[],"published":{"date-parts":[[2019,5,7]]},"assertion":[{"value":"3 June 2018","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"26 April 2019","order":2,"name":"revised","label":"Revised","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"29 April 2019","order":3,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"7 May 2019","order":4,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}