{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,6]],"date-time":"2026-02-06T12:22:23Z","timestamp":1770380543488,"version":"3.49.0"},"reference-count":35,"publisher":"Springer Science and Business Media LLC","issue":"4","license":[{"start":{"date-parts":[[2021,11,19]],"date-time":"2021-11-19T00:00:00Z","timestamp":1637280000000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2021,11,19]],"date-time":"2021-11-19T00:00:00Z","timestamp":1637280000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Circuits Syst Signal Process"],"published-print":{"date-parts":[[2022,4]]},"DOI":"10.1007\/s00034-021-01881-9","type":"journal-article","created":{"date-parts":[[2021,11,19]],"date-time":"2021-11-19T13:02:41Z","timestamp":1637326961000},"page":"2173-2187","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":4,"title":["An Efficient Block-Based Architecture for Reconfigurable FIR Filter Using Partial-Product Method"],"prefix":"10.1007","volume":"41","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-0766-6422","authenticated-orcid":false,"given":"Prabhat Chandra","family":"Shrivastava","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Prashant","family":"Kumar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Manish","family":"Tiwari","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Amit","family":"Dhawan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2021,11,19]]},"reference":[{"issue":"7","key":"1881_CR1","doi-asserted-by":"publisher","first-page":"1327","DOI":"10.1109\/TCSI.2005.851731","volume":"52","author":"DJ Allred","year":"2005","unstructured":"D.J. Allred, H. Yoo, V. Krishnan, W. Huang, D.V. Anderson, LMS adaptive filters using distributed arithmetic for high throughput. IEEE Trans. Circuits Syst. I. Reg. Papers 52(7), 1327\u20131337 (2005)","journal-title":"IEEE Trans. Circuits Syst. I. Reg. Papers"},{"key":"1881_CR2","doi-asserted-by":"publisher","first-page":"138","DOI":"10.1109\/35.868153","volume":"38","author":"E Buracchini","year":"2000","unstructured":"E. Buracchini, The software radio concept. IEEE Commun. Mag. 38, 138\u2013143 (2000)","journal-title":"IEEE Commun. Mag."},{"key":"1881_CR3","first-page":"668","volume":"2","author":"HQ Cao","year":"1996","unstructured":"H.Q. Cao, W. Li, VLSI implementation of vector quantization using distributed arithmetic. Proc. IEEE Int. Symp. Circuits Syst. 2, 668\u2013671 (1996)","journal-title":"Proc. IEEE Int. Symp. Circuits Syst."},{"key":"1881_CR4","unstructured":"K. H. Chen, T. D. Chiueh, Design and Implementation of A Reconfigurable FIR Filter. IEEE International Symposium on Circuits and Systems, 2003 (ISCAS '03), Bangkok, Thailand, 25\u201328 (2003)."},{"key":"1881_CR5","doi-asserted-by":"crossref","unstructured":"X. Chenghuan, C. He, Z. Shunan, W. Hua, Design and implementation of a high speed programmable polyphase FIR filter, in Proc. 5th Int. Conf. Applicat.-Specific Integr. Circuit, vol. 2., pp. 783\u2013787 (2003).","DOI":"10.1109\/ICASIC.2003.1277327"},{"key":"1881_CR6","doi-asserted-by":"crossref","unstructured":"C. S. Choi, H. Lee, An reconfigurable FIR filter design on a partial reconfiguration platform, Communications and Electronics, 2006. ICCE '06. First International Conference on. IEEE, 352\u2013355 (2006).","DOI":"10.1109\/CCE.2006.350791"},{"key":"1881_CR7","doi-asserted-by":"crossref","unstructured":"S. J. Darak, S. K. P. Gopi , V. A. Prasad, E. Lai, Low-complexity reconfigurable fast filter bank for multi-standard wireless receivers. IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 22(5), 1202\u20131206 (2014).","DOI":"10.1109\/TVLSI.2013.2263813"},{"key":"1881_CR8","doi-asserted-by":"crossref","unstructured":"S. S. Demirsoy, I. Kale, A. G. Dempster, Efficient implementation of digital filters using novel reconfigurable multiplier blocks, in Proc. 38th Asilomar Conf. Signals Syst. Comput. Conf. Rec., vol. 1. Pacific Grove, CA, USA, pp. 461\u2013464 (2004).","DOI":"10.1109\/ACSSC.2004.1399175"},{"issue":"10","key":"1881_CR9","doi-asserted-by":"publisher","first-page":"677","DOI":"10.1109\/82.539000","volume":"43","author":"RI Hartley","year":"1996","unstructured":"R.I. Hartley, Sub-expression sharing in filters using canonic signed digit multipliers. IEEE Trans. Circuits Syst. II 43(10), 677\u2013688 (1996)","journal-title":"IEEE Trans. Circuits Syst. II"},{"key":"1881_CR10","doi-asserted-by":"crossref","unstructured":"Y. M Hasan, L. J. Karem, M. Falkinburg, A. Helwig, M. Ronning, Canonic signed digit Chebyshev FIR filter design. IEEE Signal Process. Lett., 8(6), 167\u2013169 (2001).","DOI":"10.1109\/97.923041"},{"key":"1881_CR11","doi-asserted-by":"crossref","unstructured":"Hentschel, G. Fettweis, Software Radio Receivers, in CDMA Techniques for Third Generation Mobile Systems, Dordrecht, The Netherlands: Kluwer Academic,pp. 257\u2013283,1999.","DOI":"10.1007\/978-1-4615-5103-4_10"},{"key":"1881_CR12","unstructured":"R. M. Hewlitt, E. S. Swartzlantler, Jr., Canonical Signed Digit Representation for FIR Digital Filters, in Proc. IEEE Worksh. Signal Process. Syst., pp. 416\u2013426 (2000)."},{"key":"1881_CR13","unstructured":"K. T. Hong, S. D. Yi, K. M. Chung, A high-Speed Programmable FIR Digital Filter Using Switching Arrays, in Proc. IEEE Asia Pacific Conf. Circuits Syst., pp. 492\u2013495 (1996)."},{"key":"1881_CR14","unstructured":"M. Isohookana, T. Kokkonen, P. Leppanen, A. Nykanen, J. Pyhtila, J. Reinila, J. Sillanpaa, and V. Tapio, Software radio-an alternative for the future in wireless personal and multimedia communications, in Proc. IEEE Int. Conf. Personal Wireless Commun., pp. 364\u2013368 (1999)."},{"key":"1881_CR15","doi-asserted-by":"crossref","unstructured":"R. Jia, H.-G. Yang, C.Y. Lin, R. Chen, X.-G. Wang, Z.-H. Guo, A computationally efficient reconfigurable FIR filter architecture based on coefficient occurrence probability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35(8), 1297\u20131308 (2016).","DOI":"10.1109\/TCAD.2015.2504922"},{"key":"1881_CR16","doi-asserted-by":"crossref","unstructured":"M. Kumm, K. Moller, P. Zipf, Dynamically reconfigurable FIR filter architectures with fast reconfiguration, in Proc. 8th Int. Workshop ReCoSoC, pp. 1\u20138, (2013).","DOI":"10.1109\/ReCoSoC.2013.6581517"},{"key":"1881_CR17","doi-asserted-by":"crossref","unstructured":"R. Mahesh, A. P. Vinod, New reconfigurable architectures for implementing FIR filters with low complexity. IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., 29(2), 275\u2013288 (2010).","DOI":"10.1109\/TCAD.2009.2035548"},{"key":"1881_CR18","doi-asserted-by":"crossref","unstructured":"R. Mahesh, A. P. Vinod, A new common subexpression elimination algorithm for realizing low-complexity higher order digital filters. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 27(2), 217\u2013229 (2008).","DOI":"10.1109\/TCAD.2007.907064"},{"key":"1881_CR19","doi-asserted-by":"crossref","unstructured":"P. K. Meher, S. Y. Park, High-Throughput Pipelined Realization of Adaptive FIR Filter Based on Distributed Arithmetic, in Proc. IEEE\/IFIP 19th Int. Conf. VLSI-SOC, pp. 428\u2013433, (2011).","DOI":"10.1109\/VLSISoC.2011.6081621"},{"key":"1881_CR20","doi-asserted-by":"crossref","unstructured":"P. K. Meher, Hardware-Efficient Systolization of DA-Based Calculation of Finite Digital Convolution. IEEE Trans. Circuits Syst. II, Exp. Briefs, 53(8), 707\u2013711, (2006).","DOI":"10.1109\/TCSII.2006.877277"},{"issue":"7","key":"1881_CR21","doi-asserted-by":"publisher","first-page":"3009","DOI":"10.1109\/TSP.2007.914926","volume":"56","author":"PK Meher","year":"2008","unstructured":"P.K. Meher, S. Chandrasekaran, A. Amira, FPGA realization of FIR filters by efficient and flexible systolization using distributed arithmetic. IEEE Trans. Signal Process. 56(7), 3009\u20133017 (2008)","journal-title":"IEEE Trans. Signal Process."},{"key":"1881_CR22","doi-asserted-by":"crossref","unstructured":"S. N. Merchant, B. V. Rao, Distributed Arithmetic Architecture for Image Coding, in Proc. IEEE Int. Conf. TENCON\u201989, pp. 74\u201377, (1989).","DOI":"10.1109\/TENCON.1989.176898"},{"key":"1881_CR23","doi-asserted-by":"publisher","DOI":"10.1002\/047121664X","volume-title":"Object-Oriented Approaches to Wireless Systems Engineering\", Software Radio Architecture","author":"J Mitola","year":"2000","unstructured":"J. Mitola, Object-Oriented Approaches to Wireless Systems Engineering\", Software Radio Architecture (Wiley, New York, 2000)"},{"key":"1881_CR24","doi-asserted-by":"publisher","first-page":"26","DOI":"10.1109\/35.393001","volume":"33","author":"J Mitola","year":"1995","unstructured":"J. Mitola, The software radio architecture. Commun. Mag. IEEE 33, 26\u201338 (1995)","journal-title":"Commun. Mag. IEEE"},{"key":"1881_CR25","doi-asserted-by":"crossref","unstructured":"B. K. Mohanty, P. K. Meher, A high-performance FIR filter architecture for fixed and reconfigurable applications. IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 24(2), 444\u2013452 (2016).","DOI":"10.1109\/TVLSI.2015.2412556"},{"key":"1881_CR26","doi-asserted-by":"crossref","unstructured":"N. Moreano, E. Borin, C. De Souza, G. Araujo, Efficient Datapath Merging for Partially Reconfigurable Architectures. IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., 24(7), 969\u2013980 (2005).","DOI":"10.1109\/TCAD.2005.850844"},{"issue":"2","key":"1881_CR27","doi-asserted-by":"publisher","first-page":"510","DOI":"10.1109\/TCSI.2007.913735","volume":"55","author":"E Ozalevli","year":"2008","unstructured":"E. Ozalevli, W. Huang, P.E. Hasler, D.V. Anderson, A reconfigurable mixed-signal VLSI implementation of distributed arithmetic used for finite-impulse response filtering. IEEE Trans. Circuits Syst. I Regul. Pap. 55(2), 510\u2013521 (2008)","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"1881_CR28","doi-asserted-by":"crossref","unstructured":"S. Y. Park, P. K. Meher, Efficient FPGA and ASIC Realizations of a DA-based reconfigurable FIR digital filter. IEEE Trans. Circuits Syst. II Exp. Briefs, 61(7), 511\u2013515 (2014).","DOI":"10.1109\/TCSII.2014.2324418"},{"key":"1881_CR29","doi-asserted-by":"crossref","unstructured":"T.\u00a0Peter, C. Hoe\u00a0James,\u00a0P. Markus, Time-multiplexed multiple-constant multiplication. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., 26(9), 1551\u20131563, (2007).","DOI":"10.1109\/TCAD.2007.893549"},{"key":"1881_CR30","doi-asserted-by":"crossref","unstructured":"T. Rissa, R. Uusikartano, J. Niittylahti, Adaptive FIR filter architectures for run-time reconfigurable FPGAs,\u201d in Proc. 2002 IEEE Int. Conf. Field Programm. Technol., 52\u201359, (2002).","DOI":"10.1109\/FPT.2002.1188664"},{"key":"1881_CR31","doi-asserted-by":"crossref","unstructured":"M. Tamada, A. Nishihara, High-Speed FIR digital filter with CSD coefficients implemented on FPGA,\u201d in Proc. ASP DAC\u201901, pp. 7\u20138, (2001).","DOI":"10.1145\/370155.370201"},{"key":"1881_CR32","doi-asserted-by":"crossref","unstructured":"P. Tummeltshammer, J. C. Hoe, M. Puschel, Time-multiplexed multiple-constant multiplication. IEEE Trans. Comput. Aided Design. Integr. Circuits, 269, 1551\u20131563 (2007).","DOI":"10.1109\/TCAD.2007.893549"},{"issue":"7","key":"1881_CR33","doi-asserted-by":"publisher","first-page":"1669","DOI":"10.1109\/TWC.2006.1673078","volume":"5","author":"AP Vinod","year":"2006","unstructured":"A.P. Vinod, E. Lai, Low power and high speed implementation of FIR filters for software defined radio receivers. IEEE Trans. Wireless Commun. 5(7), 1669\u20131675 (2006)","journal-title":"IEEE Trans. Wireless Commun."},{"issue":"3","key":"1881_CR34","doi-asserted-by":"publisher","first-page":"4","DOI":"10.1109\/53.29648","volume":"6","author":"SA White","year":"1989","unstructured":"S.A. White, Applications of distributed arithmetic to digital signal processing: a tutorial review. IEEE ASSP Mag. 6(3), 4\u201319 (1989)","journal-title":"IEEE ASSP Mag."},{"issue":"4","key":"1881_CR35","doi-asserted-by":"publisher","first-page":"834","DOI":"10.1109\/TCE.2003.1196409","volume":"48","author":"T Zhangwen","year":"2002","unstructured":"T. Zhangwen, Z. Zhanpeng, Z. Jie, M. Hao, A high-speed, programmable, CSD coefficient FIR filter. IEEE Tran. Consumer Electr. 48(4), 834\u2013837 (2002)","journal-title":"IEEE Tran. Consumer Electr."}],"container-title":["Circuits, Systems, and Signal Processing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-021-01881-9.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s00034-021-01881-9\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-021-01881-9.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,9,12]],"date-time":"2024-09-12T17:32:03Z","timestamp":1726162323000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s00034-021-01881-9"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,11,19]]},"references-count":35,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2022,4]]}},"alternative-id":["1881"],"URL":"https:\/\/doi.org\/10.1007\/s00034-021-01881-9","relation":{},"ISSN":["0278-081X","1531-5878"],"issn-type":[{"value":"0278-081X","type":"print"},{"value":"1531-5878","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,11,19]]},"assertion":[{"value":"5 January 2021","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"10 October 2021","order":2,"name":"revised","label":"Revised","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"11 October 2021","order":3,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"19 November 2021","order":4,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}