{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,27]],"date-time":"2026-06-27T21:46:20Z","timestamp":1782596780280,"version":"3.54.5"},"reference-count":53,"publisher":"Springer Science and Business Media LLC","issue":"5","license":[{"start":{"date-parts":[[2024,1,31]],"date-time":"2024-01-31T00:00:00Z","timestamp":1706659200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2024,1,31]],"date-time":"2024-01-31T00:00:00Z","timestamp":1706659200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Circuits Syst Signal Process"],"published-print":{"date-parts":[[2024,5]]},"DOI":"10.1007\/s00034-024-02603-7","type":"journal-article","created":{"date-parts":[[2024,1,31]],"date-time":"2024-01-31T15:03:07Z","timestamp":1706713387000},"page":"3212-3237","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":5,"title":["On the Layout-Oriented Investigation of Power Attack Hardness of Spintronic-Based Logic Circuits"],"prefix":"10.1007","volume":"43","author":[{"given":"Pegah","family":"Iranfar","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Abdolah","family":"Amirany","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9711-7923","authenticated-orcid":false,"given":"Mohammad Hossein","family":"Moaiyeri","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kian","family":"Jafari","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2024,1,31]]},"reference":[{"key":"2603_CR1","doi-asserted-by":"publisher","DOI":"10.1016\/j.nancom.2023.100442","volume":"36","author":"S-S Ahmadpour","year":"2023","unstructured":"S.-S. Ahmadpour, N.J. Navimipour, M. Mosleh, A.N. Bahar, S. Yalcin, A nano-scale n-bit ripple carry adder using an optimized XOR gate and quantum-dots technology with diminished cells and power dissipation. Nano Commun. Netw. 36, 100442 (2023). https:\/\/doi.org\/10.1016\/j.nancom.2023.100442","journal-title":"Nano Commun. Netw."},{"key":"2603_CR2","doi-asserted-by":"publisher","first-page":"14908","DOI":"10.1109\/JIOT.2023.3267165","volume":"10","author":"S-S Ahmadpour","year":"2023","unstructured":"S.-S. Ahmadpour, A. Heidari, N.J. Navimpour, M.-A. Asadi, S. Yalcin, An efficient design of multiplier for using in nano-scale IOT systems using atomic silicon. IEEE Internet Things J. 10, 14908\u201314909 (2023). https:\/\/doi.org\/10.1109\/JIOT.2023.3267165","journal-title":"IEEE Internet Things J."},{"key":"2603_CR3","doi-asserted-by":"publisher","first-page":"336","DOI":"10.1145\/2749469.2750385","volume":"43","author":"J Ahn","year":"2015","unstructured":"J. Ahn, S. Yoo, O. Mutlu, K. Choi, PIM-enabled instructions: a low-overhead, locality-aware processing-in-memory architecture. ACM SIGARCH Comput. Arch. News 43, 336\u2013348 (2015). https:\/\/doi.org\/10.1145\/2749469.2750385","journal-title":"ACM SIGARCH Comput. Arch. News"},{"key":"2603_CR4","doi-asserted-by":"publisher","first-page":"2369","DOI":"10.1007\/s10586-021-03459-1","volume":"25","author":"OA Alzubi","year":"2021","unstructured":"O.A. Alzubi, J.A. Alzubi, A.M. Al-Zoubi, M.A. Hassonah, U. Kose, An efficient malware detection approach with feature weighting based on Harris Hawks optimization. Clust. Comput. 25, 2369\u20132387 (2021). https:\/\/doi.org\/10.1007\/s10586-021-03459-1","journal-title":"Clust. Comput."},{"key":"2603_CR5","doi-asserted-by":"publisher","first-page":"1363","DOI":"10.1007\/s10586-022-03686-0","volume":"26","author":"OA Alzubi","year":"2022","unstructured":"O.A. Alzubi, I. Qiqieh, J.A. Alzubi, Fusion of deep learning based cyberattack detection and classification model for intelligent systems. Clust. Comput. 26, 1363\u20131374 (2022). https:\/\/doi.org\/10.1007\/s10586-022-03686-0","journal-title":"Clust. Comput."},{"key":"2603_CR6","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1109\/LMAG.2021.3092995","volume":"12","author":"A Amirany","year":"2021","unstructured":"A. Amirany, K. Jafari, M.H. Moaiyeri, A task-schedulable nonvolatile spintronic field-programmable gate array. IEEE Magn. Lett. 12, 1\u20134 (2021). https:\/\/doi.org\/10.1109\/LMAG.2021.3092995","journal-title":"IEEE Magn. Lett."},{"key":"2603_CR7","doi-asserted-by":"publisher","DOI":"10.1016\/j.aeue.2022.154452","volume":"158","author":"A Amirany","year":"2022","unstructured":"A. Amirany, K. Jafari, M.H. Moaiyeri, Highly reliable bio-inspired spintronic\/CNTFET multi-bit per cell nonvolatile memory. AEU-Int. J. Electron. Commun. 158, 154452 (2022). https:\/\/doi.org\/10.1016\/j.aeue.2022.154452","journal-title":"AEU-Int. J. Electron. Commun."},{"key":"2603_CR8","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/3544971","volume":"22","author":"J Anderson","year":"2023","unstructured":"J. Anderson et al., Virtualizing a post-Moore\u2019s law analog mesh processor: the case of a photonic PDE accelerator. ACM Trans. Embedded Comput. Syst. 22, 1\u201326 (2023). https:\/\/doi.org\/10.1145\/3544971","journal-title":"ACM Trans. Embedded Comput. Syst."},{"key":"2603_CR9","doi-asserted-by":"publisher","unstructured":"M. BahmanAbadi, A. Amirany, M. H. Moaiyeri, and K. Jafari, (2023) Towards nonvolatile spintronic quaternary flip-flop and register design. https:\/\/doi.org\/10.1142\/S2010324723500157.","DOI":"10.1142\/S2010324723500157"},{"key":"2603_CR10","doi-asserted-by":"publisher","first-page":"0610072022","DOI":"10.1149\/2162-8777\/ac77bb","volume":"11","author":"M BahmanAbadi","year":"2022","unstructured":"M. BahmanAbadi, A. Amirany, K. Jafari, M.H. Moaiyeri, Efficient and highly reliable spintronic non-volatile quaternary memory based on carbon nanotube FETs and Multi-TMR MTJs. ECS J. Solid State Sci. Technol. 11, 0610072022 (2022). https:\/\/doi.org\/10.1149\/2162-8777\/ac77bb","journal-title":"ECS J. Solid State Sci. Technol."},{"key":"2603_CR11","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2022.114881","author":"V Bakhtiary","year":"2023","unstructured":"V. Bakhtiary, A. Amirany, M.H. Moaiyeri, K. Jafari, An SEU-hardened ternary SRAM design based on efficient ternary C-elements using CNTFET technology. Microelectron. Reliab. (2023). https:\/\/doi.org\/10.1016\/j.microrel.2022.114881","journal-title":"Microelectron. Reliab."},{"key":"2603_CR12","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2022.3187605","author":"P Barla","year":"2022","unstructured":"P. Barla, V.K. Joshi, S. Bhat, Fully non-volatile hybrid full adder based on SHE+STT-MTJ\/CMOS LIM architecture. IEEE Trans. Magn. (2022). https:\/\/doi.org\/10.1109\/TMAG.2022.3187605","journal-title":"IEEE Trans. Magn."},{"key":"2603_CR13","doi-asserted-by":"publisher","first-page":"263","DOI":"10.1109\/TVLSI.2019.2940449","volume":"28","author":"S Ben Dodo","year":"2020","unstructured":"S. Ben Dodo, R. Bishnoi, M.B. Tahoori, Secure STT-MRAM bit-cell design resilient to differential power analysis attacks. IEEE Trans. Very Large Scale Integr. VLSI Syst. 28, 263\u2013272 (2020). https:\/\/doi.org\/10.1109\/TVLSI.2019.2940449","journal-title":"IEEE Trans. Very Large Scale Integr. VLSI Syst."},{"key":"2603_CR14","doi-asserted-by":"publisher","unstructured":"T.-C. Chen, Overcoming research challenges for CMOS scaling: industry directions, presented at the 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings, (2006) https:\/\/doi.org\/10.1109\/ICSICT.2006.306040.","DOI":"10.1109\/ICSICT.2006.306040"},{"key":"2603_CR15","first-page":"137","volume":"26","author":"J Daemen","year":"2001","unstructured":"J. Daemen, V. Rijmen, Reijndael: The advanced encryption standard, Dr. Dobb\u2019s Journal: Software Tools for the Professional Programmer 26, 137\u2013139 (2001)","journal-title":"Dobb's Journal: Software Tools for the Professional Programmer"},{"key":"2603_CR16","doi-asserted-by":"publisher","unstructured":"E. Deng et al., Robust magnetic full-adder with voltage sensing 2T\/2MTJ cell, presented at the Proceedings of the 2015 IEEE\/ACM International Symposium on Nanoscale Architectures (NANOARCH\u00b415), (2015), https:\/\/doi.org\/10.1109\/NANOARCH.2015.7180582.","DOI":"10.1109\/NANOARCH.2015.7180582"},{"key":"2603_CR17","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1109\/TMAG.2015.2449554","volume":"51","author":"E Deng","year":"2015","unstructured":"E. Deng, Z. Wang, J.-O. Klein, G. Prenat, B. Dieny, W. Zhao, High-frequency low-power magnetic full-adder based on magnetic tunnel junction with spin-hall assistance. IEEE Trans. Magn. 51, 1\u20134 (2015). https:\/\/doi.org\/10.1109\/TMAG.2015.2449554","journal-title":"IEEE Trans. Magn."},{"key":"2603_CR18","doi-asserted-by":"publisher","first-page":"102386","DOI":"10.1109\/NANOARCH.2015.7180582","volume":"10","author":"D Divyanshu","year":"2022","unstructured":"D. Divyanshu, R. Kumar, D. Khan, S. Amara, Y. Massoud, Logic locking using emerging 2T\/3T magnetic tunnel junctions for hardware security. IEEE Access 10, 102386\u2013102395 (2022). https:\/\/doi.org\/10.1109\/NANOARCH.2015.7180582","journal-title":"IEEE Access"},{"key":"2603_CR19","doi-asserted-by":"publisher","first-page":"611","DOI":"10.1007\/s10836-016-5598-9","volume":"32","author":"J Dofe","year":"2016","unstructured":"J. Dofe, H. Pahlevanzadeh, Q. Yu, A comprehensive FPGA-based assessment on fault-resistant AES against correlation power analysis attack. J. Electron. Test. 32, 611\u2013624 (2016). https:\/\/doi.org\/10.1007\/s10836-016-5598-9","journal-title":"J. Electron. Test."},{"key":"2603_CR20","doi-asserted-by":"publisher","first-page":"483","DOI":"10.1007\/s10836-010-5160-0","volume":"26","author":"BM Gammel","year":"2010","unstructured":"B.M. Gammel, S. Mangard, On the duality of probing and fault attacks. J. Electron. Test. 26, 483\u2013493 (2010). https:\/\/doi.org\/10.1007\/s10836-010-5160-0","journal-title":"J. Electron. Test."},{"key":"2603_CR21","doi-asserted-by":"publisher","DOI":"10.5772\/intechopen.110889","author":"NS Ghiasi","year":"2023","unstructured":"N.S. Ghiasi, S. Mohammad Sadegh Ghiasi, A review on superconducting magnetic energy storage system applications. Energy Stor. Appl. Power Syst. (2023). https:\/\/doi.org\/10.5772\/intechopen.110889","journal-title":"Energy Stor. Appl. Power Syst."},{"key":"2603_CR22","doi-asserted-by":"publisher","first-page":"2202","DOI":"10.1109\/TIA.2022.3218273","volume":"59","author":"NS Ghiasi","year":"2023","unstructured":"N.S. Ghiasi, R. Hadidi, S.M. Sadegh Ghiasi, S. Ghaseminejad Liasi, A hybrid controller with hierarchical architecture for microgrid to share power in an islanded mode. IEEE Trans. Ind. Appl. 59, 2202\u20132209 (2023). https:\/\/doi.org\/10.1109\/TIA.2022.3218273","journal-title":"IEEE Trans. Ind. Appl."},{"key":"2603_CR23","doi-asserted-by":"publisher","unstructured":"N. Huynh, H. Cherian, and E. C. Ahn, Hardware Security of Emerging Non-Volatile Memory Devices under Imaging Attacks, presented at the 2021 International Conference on Applied Electronics (AE), (2021) https:\/\/doi.org\/10.23919\/AE51540.2021.9542884.","DOI":"10.23919\/AE51540.2021.9542884"},{"key":"2603_CR24","doi-asserted-by":"publisher","unstructured":"H. Imani, J. Anderson, and T. El-Ghazawi, iSample: Intelligent Client Sampling in Federated Learning, presented at the 2022 IEEE 6th International Conference on Fog and Edge Computing (ICFEC), (2022), https:\/\/doi.org\/10.1109\/ICFEC54809.2022.00015.","DOI":"10.1109\/ICFEC54809.2022.00015"},{"key":"2603_CR25","doi-asserted-by":"publisher","first-page":"4651","DOI":"10.1007\/s00034-021-01690-0","volume":"40","author":"MS Islam","year":"2021","unstructured":"M.S. Islam et al., Robust dual domain twofold encrypted image-in-audio watermarking based on SVD. Circuits Syst. Signal Process. 40, 4651\u20134685 (2021). https:\/\/doi.org\/10.1007\/s00034-021-01690-0","journal-title":"Circuits Syst. Signal Process."},{"key":"2603_CR26","doi-asserted-by":"publisher","first-page":"270","DOI":"10.1016\/j.aeue.2017.09.009","volume":"83","author":"V Jamshidi","year":"2018","unstructured":"V. Jamshidi, M. Fazeli, Design of ultra low power current mode logic gates using magnetic cells. AEU-Int. J. Electron. Commun. 83, 270\u2013279 (2018). https:\/\/doi.org\/10.1016\/j.aeue.2017.09.009","journal-title":"AEU-Int. J. Electron. Commun."},{"key":"2603_CR27","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1109\/TMAG.2018.2846623","volume":"54","author":"V Jamshidi","year":"2018","unstructured":"V. Jamshidi, M. Fazeli, Pure magnetic logic circuits: a reliability analysis. IEEE Trans. Magn. 54, 1\u201310 (2018). https:\/\/doi.org\/10.1109\/TMAG.2018.2846623","journal-title":"IEEE Trans. Magn."},{"key":"2603_CR28","doi-asserted-by":"publisher","DOI":"10.1007\/s00034-023-02509-w","author":"F Khodayari","year":"2023","unstructured":"F. Khodayari, A. Amirany, K. Jafari, M.H. Moaiyeri, Low-cost and variation-aware spintronic ternary random number generator. Circuits Syst. Signal Process. (2023). https:\/\/doi.org\/10.1007\/s00034-023-02509-w","journal-title":"Circuits Syst. Signal Process."},{"key":"2603_CR29","doi-asserted-by":"publisher","unstructured":"S. D. Kumar and H. Thapliyal, Security evaluation of MTJ\/CMOS circuits against power analysis attacks, in 2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), (2017), pp. 117\u2013122, https:\/\/doi.org\/10.1109\/iNIS.2017.33.","DOI":"10.1109\/iNIS.2017.33"},{"key":"2603_CR30","doi-asserted-by":"publisher","unstructured":"Y. Lakys, W. S. Zhao, J. O. Klein, and C. Chappert, Hardening techniques for MRAM-based non-volatile storage cells and logic, presented at the 2011 12th European Conference on Radiation and Its Effects on Components and Systems, (2011), https:\/\/doi.org\/10.1109\/RADECS.2011.6131445.","DOI":"10.1109\/RADECS.2011.6131445"},{"key":"2603_CR31","doi-asserted-by":"publisher","unstructured":"M. Lipp et al., PLATYPUS: Software-based Power Side-Channel Attacks on x86, presented at the 2021 IEEE Symposium on Security and Privacy (SP), (2021), https:\/\/doi.org\/10.1109\/SP40001.2021.00063.","DOI":"10.1109\/SP40001.2021.00063"},{"key":"2603_CR32","doi-asserted-by":"publisher","first-page":"88","DOI":"10.1080\/23742917.2016.1231523","volume":"1","author":"O Lo","year":"2016","unstructured":"O. Lo, W.J. Buchanan, D. Carson, Power analysis attacks on the AES-128 S-box using differential power analysis (DPA) and correlation power analysis (CPA). J. Cyber Security Technol. 1, 88\u2013107 (2016). https:\/\/doi.org\/10.1080\/23742917.2016.1231523","journal-title":"J. Cyber Security Technol."},{"key":"2603_CR33","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1109\/LMAG.2022.3200326","volume":"2022","author":"S Mehri","year":"2022","unstructured":"S. Mehri, A. Amirany, M.H. Moaiyeri, K. Jafari, Theoretical circuit design of an efficient spintronic random number generator with an internal post-processing unit. IEEE Magn. Lett. 2022, 1\u20135 (2022). https:\/\/doi.org\/10.1109\/LMAG.2022.3200326","journal-title":"IEEE Magn. Lett."},{"key":"2603_CR34","doi-asserted-by":"publisher","first-page":"33637","DOI":"10.1007\/s11042-023-14607-7","volume":"82","author":"P Parida","year":"2023","unstructured":"P. Parida et al., Elliptic curve cryptographic image encryption using Henon map and Hopfield chaotic neural network. Multim. Tools Appl. 82, 33637\u201333662 (2023). https:\/\/doi.org\/10.1007\/s11042-023-14607-7","journal-title":"Multim. Tools Appl."},{"key":"2603_CR35","doi-asserted-by":"publisher","first-page":"872","DOI":"10.1007\/s00034-020-01501-y","volume":"40","author":"S Rupesh Kumar","year":"2020","unstructured":"S. Rupesh Kumar, B. Bharathi, A novel approach towards generalization of countermeasure for spoofing attack on ASV systems. Circuits Syst. Signal Process. 40, 872\u2013889 (2020). https:\/\/doi.org\/10.1007\/s00034-020-01501-y","journal-title":"Circuits Syst. Signal Process."},{"key":"2603_CR36","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2019.2897076","author":"D Shin","year":"2019","unstructured":"D. Shin, H.-J. Yoo, The heterogeneous deep neural network processor with a non-von neumann architecture. Proc. IEEE (2019). https:\/\/doi.org\/10.1109\/JPROC.2019.2897076","journal-title":"Proc. IEEE"},{"key":"2603_CR37","doi-asserted-by":"publisher","DOI":"10.1016\/B978-0-08-102414-0.00002-1","author":"JP Singh","year":"2019","unstructured":"J.P. Singh et al., Fabrication of magnetic tunnel junctions. Adv.Appl. Manuf. Eng. (2019). https:\/\/doi.org\/10.1016\/B978-0-08-102414-0.00002-1","journal-title":"Adv.Appl. Manuf. Eng."},{"key":"2603_CR38","doi-asserted-by":"publisher","unstructured":"P. Socha, V. Miskovsky, H. Kubatova, and M. Novotny, Optimization of Pearson correlation coefficient calculation for DPA and comparison of different approaches, presented at the 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), (2017), https:\/\/doi.org\/10.1109\/DDECS.2017.7934563.","DOI":"10.1109\/DDECS.2017.7934563"},{"key":"2603_CR39","doi-asserted-by":"publisher","first-page":"383","DOI":"10.1109\/JPROC.2005.862437","volume":"94","author":"OX Standaert","year":"2006","unstructured":"O.X. Standaert, E. Peeters, G. Rouvroy, J.J. Quisquater, An overview of power analysis attacks against field programmable gate arrays. Proc. IEEE 94, 383\u2013394 (2006). https:\/\/doi.org\/10.1109\/JPROC.2005.862437","journal-title":"Proc. IEEE"},{"key":"2603_CR40","doi-asserted-by":"publisher","first-page":"4350","DOI":"10.1007\/s00034-016-0266-y","volume":"35","author":"A Tayebi","year":"2016","unstructured":"A. Tayebi, S. Berber, A. Swain, Performance analysis of chaotic DSSS-CDMA synchronization under jamming attack. Circuits Syst. Signal Process. 35, 4350\u20134371 (2016). https:\/\/doi.org\/10.1007\/s00034-016-0266-y","journal-title":"Circuits Syst. Signal Process."},{"key":"2603_CR41","doi-asserted-by":"publisher","first-page":"319","DOI":"10.1109\/TDMR.2020.2994272","volume":"20","author":"V Tenentes","year":"2020","unstructured":"V. Tenentes, S. Das, D. Rossi, B.M. Al-Hashimi, Run-time protection of multi-core processors from power-noise denial-of-service attacks. IEEE Trans. Device Mater. Reliab. 20, 319\u2013328 (2020). https:\/\/doi.org\/10.1109\/TDMR.2020.2994272","journal-title":"IEEE Trans. Device Mater. Reliab."},{"key":"2603_CR42","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1109\/TMAG.2018.2833431","volume":"54","author":"H Thapliyal","year":"2018","unstructured":"H. Thapliyal, F. Sharifi, S.D. Kumar, Energy-efficient design of hybrid MTJ\/CMOS and MTJ\/nanoelectronics circuits. IEEE Trans. Magn. 54, 1\u20138 (2018). https:\/\/doi.org\/10.1109\/TMAG.2018.2833431","journal-title":"IEEE Trans. Magn."},{"key":"2603_CR43","unstructured":"K. Tiri, M. Akmal, and I. Verbauwhede, A dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards, in proceedings of the 28th European solid-state circuits conference, (2002), pp. 403\u2013406."},{"issue":"2023","key":"2603_CR44","doi-asserted-by":"publisher","first-page":"3567","DOI":"10.1109\/TCSI.2023.3280193","volume":"70","author":"S Tripathi","year":"2023","unstructured":"S. Tripathi, S. Choudhary, P.K. Misra, An 8T PA attack resilient NVSRAM for in-memory-computing applications. IEEE Trans. Circuits Syst. I Regul. Pap. 70(2023), 3567\u20133574 (2023). https:\/\/doi.org\/10.1109\/TCSI.2023.3280193","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"2603_CR45","doi-asserted-by":"publisher","first-page":"146348","DOI":"10.1109\/ACCESS.2019.2941972","volume":"7","author":"K-L Tsai","year":"2019","unstructured":"K.-L. Tsai, F.-Y. Leu, I. You, S.-W. Chang, S.-J. Hu, H. Park, Low-power AES data encryption architecture for a LoRaWAN. IEEE Access 7, 146348\u2013146357 (2019). https:\/\/doi.org\/10.1109\/ACCESS.2019.2941972","journal-title":"IEEE Access"},{"key":"2603_CR46","doi-asserted-by":"publisher","first-page":"308","DOI":"10.1109\/TDMR.2020.2994016","volume":"20","author":"D Tychalas","year":"2020","unstructured":"D. Tychalas, A. Keliris, M. Maniatakos, Stealthy information leakage through peripheral exploitation in modern embedded systems. IEEE Trans. Device Mater. Reliab. 20, 308\u2013318 (2020). https:\/\/doi.org\/10.1109\/TDMR.2020.2994016","journal-title":"IEEE Trans. Device Mater. Reliab."},{"key":"2603_CR47","doi-asserted-by":"publisher","first-page":"4921","DOI":"10.1007\/s00034-019-01108-y","volume":"38","author":"A Udhayakumar","year":"2019","unstructured":"A. Udhayakumar, S. Padma, Low power magnetic non-volatile flip-flops with self-time logical writing for high-end processors. Circuits Syst. Signal Process. 38, 4921\u20134932 (2019). https:\/\/doi.org\/10.1007\/s00034-019-01108-y","journal-title":"Circuits Syst. Signal Process."},{"key":"2603_CR48","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/48\/6\/065001","author":"Z Wang","year":"2015","unstructured":"Z. Wang, W. Zhao, E. Deng, J.-O. Klein, C. Chappert, Perpendicular-anisotropy magnetic tunnel junction switched by spin-Hall-assisted spin-transfer torque. J. Phys. D Appl. Phys. (2015). https:\/\/doi.org\/10.1088\/0022-3727\/48\/6\/065001","journal-title":"J. Phys. D Appl. Phys."},{"key":"2603_CR49","doi-asserted-by":"publisher","unstructured":"Z. Weisheng, E. Belhaire, and C. Chappert, Spin-MTJ based Non-volatile Flip-Flop, presented at the 2007 7th IEEE Conference on Nanotechnology (IEEE NANO), (2007), https:\/\/doi.org\/10.1109\/NANO.2007.4601218.","DOI":"10.1109\/NANO.2007.4601218"},{"key":"2603_CR50","doi-asserted-by":"publisher","first-page":"3784","DOI":"10.1109\/TMAG.2009.2024325","volume":"45","author":"Z Weisheng","year":"2009","unstructured":"Z. Weisheng, C. Chappert, V. Javerliac, J.P. Noziere, High speed, high stability and low power sensing amplifier for MTJ\/CMOS hybrid logic circuits. IEEE Trans. Magn. 45, 3784\u20133787 (2009). https:\/\/doi.org\/10.1109\/TMAG.2009.2024325","journal-title":"IEEE Trans. Magn."},{"key":"2603_CR51","doi-asserted-by":"publisher","first-page":"1975","DOI":"10.1109\/TED.2021.3059817","volume":"68","author":"N Yang","year":"2021","unstructured":"N. Yang, X. Wang, X. Lin, W. Zhao, Exploiting carbon nanotube FET and magnetic tunneling junction for near-memory-computing paradigm. IEEE Trans. Electron Devices 68, 1975\u20131979 (2021). https:\/\/doi.org\/10.1109\/TED.2021.3059817","journal-title":"IEEE Trans. Electron Devices"},{"key":"2603_CR52","doi-asserted-by":"publisher","first-page":"69","DOI":"10.1016\/j.mejo.2018.09.005","volume":"81","author":"L Zhang","year":"2018","unstructured":"L. Zhang et al., A high-reliability and low-power computing-in-memory implementation within STT-MRAM. Microelectron. J. 81, 69\u201375 (2018). https:\/\/doi.org\/10.1016\/j.mejo.2018.09.005","journal-title":"Microelectron. J."},{"issue":"2012","key":"2603_CR53","doi-asserted-by":"publisher","first-page":"1848","DOI":"10.1016\/j.microrel.2012.06.035","volume":"52","author":"WS Zhao","year":"2012","unstructured":"W.S. Zhao et al., Failure and reliability analysis of STT-MRAM. Microelectron. Reliab. 52(2012), 1848\u20131852 (2012). https:\/\/doi.org\/10.1016\/j.microrel.2012.06.035","journal-title":"Microelectron. Reliab."}],"container-title":["Circuits, Systems, and Signal Processing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-024-02603-7.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s00034-024-02603-7\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s00034-024-02603-7.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,30]],"date-time":"2024-03-30T12:02:20Z","timestamp":1711800140000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s00034-024-02603-7"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,1,31]]},"references-count":53,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2024,5]]}},"alternative-id":["2603"],"URL":"https:\/\/doi.org\/10.1007\/s00034-024-02603-7","relation":{},"ISSN":["0278-081X","1531-5878"],"issn-type":[{"value":"0278-081X","type":"print"},{"value":"1531-5878","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,1,31]]},"assertion":[{"value":"6 October 2023","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"28 December 2023","order":2,"name":"revised","label":"Revised","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"1 January 2024","order":3,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"31 January 2024","order":4,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}},{"order":1,"name":"Ethics","group":{"name":"EthicsHeading","label":"Declarations"}},{"value":"No conflict of interest exists in the submission of this article, and all the authors approved the article.","order":2,"name":"Ethics","group":{"name":"EthicsHeading","label":"Conflict of interest"}},{"value":"This article does not contain any studies with human participants or animals performed by any authors.","order":3,"name":"Ethics","group":{"name":"EthicsHeading","label":"Ethics approval"}}]}}