{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,27]],"date-time":"2025-11-27T13:55:22Z","timestamp":1764251722139,"version":"3.37.3"},"reference-count":39,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2021,11,20]],"date-time":"2021-11-20T00:00:00Z","timestamp":1637366400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2021,11,20]],"date-time":"2021-11-20T00:00:00Z","timestamp":1637366400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"funder":[{"name":"Ministry of Education, Science and Technology Development of Republic of Serbia","award":["Grant 451-03-68\/2020-14\/200156"],"award-info":[{"award-number":["Grant 451-03-68\/2020-14\/200156"]}]},{"DOI":"10.13039\/100000143","name":"Division of Computing and Communication Foundations","doi-asserted-by":"crossref","award":["CCF-1936450"],"award-info":[{"award-number":["CCF-1936450"]}],"id":[{"id":"10.13039\/100000143","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CNS-2045597"],"award-info":[{"award-number":["CNS-2045597"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Distrib. Comput."],"published-print":{"date-parts":[[2022,2]]},"DOI":"10.1007\/s00446-021-00410-w","type":"journal-article","created":{"date-parts":[[2021,11,20]],"date-time":"2021-11-20T12:02:42Z","timestamp":1637409762000},"page":"19-36","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":5,"title":["Dynamic scheduling in distributed transactional memory"],"prefix":"10.1007","volume":"35","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4381-4333","authenticated-orcid":false,"given":"Costas","family":"Busch","sequence":"first","affiliation":[]},{"given":"Maurice","family":"Herlihy","sequence":"additional","affiliation":[]},{"given":"Miroslav","family":"Popovic","sequence":"additional","affiliation":[]},{"given":"Gokarna","family":"Sharma","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2021,11,20]]},"reference":[{"key":"410_CR1","doi-asserted-by":"crossref","unstructured":"Aguilera, Marcos K., Malkhi, Dahlia., Marzullo, Keith., Panconesi, Alessandro., Pelc, Andrzej., Wattenhofer, Roger.: Announcing the 2012 Edsger W. Dijkstra prize in distributed computing. SIGARCH Computer Architecture News, 40(4):1\u20132, 2012","DOI":"10.1145\/2411116.2411118"},{"key":"410_CR2","unstructured":"Attiya, H.: Lower bounds and impossibility results for transactional memory computing. Bull. EATCS 112 (2014)"},{"issue":"1","key":"410_CR3","doi-asserted-by":"publisher","first-page":"44","DOI":"10.1007\/s00453-008-9195-x","volume":"57","author":"H Attiya","year":"2010","unstructured":"Attiya, H., Epstein, L., Shachnai, H., Tamir, T.: Transactional contention management as a non-clairvoyant scheduling problem. Algorithmica 57(1), 44\u201361 (2010)","journal-title":"Algorithmica"},{"key":"410_CR4","doi-asserted-by":"crossref","unstructured":"Bocchino, R.L., Adve, V.S., Bradford, L.: Chamberlain. Software transactional memory for large scale clusters. In: PPoPP, pp. 247\u2013258 (2008)","DOI":"10.1145\/1345206.1345242"},{"key":"410_CR5","doi-asserted-by":"crossref","unstructured":"Busch, C., Herlihy, M., Popovic, M., Sharma, G.: Fast scheduling in distributed transactional memory. In: SPAA, pp. 173\u2013182 (2017)","DOI":"10.1145\/3087556.3087565"},{"issue":"6","key":"410_CR6","doi-asserted-by":"publisher","first-page":"471","DOI":"10.1007\/s00446-017-0318-y","volume":"31","author":"C Busch","year":"2018","unstructured":"Busch, C., Herlihy, M., Popovic, M., Sharma, G.: Time-communication impossibility results for distributed transactional memory. Distrib. Comput. 31(6), 471\u2013487 (2018)","journal-title":"Distrib. Comput."},{"key":"410_CR7","doi-asserted-by":"crossref","unstructured":"Cain, H.W., Michael, M.M., Frey, B., May, C., Williams, D., Le Hung, Q.: Robust architectural support for transactional memory in the POWER architecture. In: ISCA, pp. 225\u2013236 (2013)","DOI":"10.1145\/2508148.2485942"},{"key":"410_CR8","doi-asserted-by":"crossref","unstructured":"Chan, M.Y.: Embedding of D-dimensional grids into optimal hypercubes. In: SPAA, pp. 52\u201357 (1989)","DOI":"10.1145\/72935.72941"},{"key":"410_CR9","doi-asserted-by":"crossref","unstructured":"Couceiro, M., Romano, P., Carvalho, N., Rodrigues, L.: D2STM: dependable distributed software transactional memory. In: PRDC, pp. 307\u2013313 (2009)","DOI":"10.1109\/PRDC.2009.55"},{"key":"410_CR10","doi-asserted-by":"crossref","unstructured":"Dragojevi\u0107, A., Guerraoui, R., Singh, A.V., Singh V.: Preventing versus curing: avoiding conflicts in transactional memories. In: PODC, pp. 7\u201316 (2009)","DOI":"10.1145\/1582716.1582725"},{"key":"410_CR11","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9781139051224","volume-title":"Parallel Computer Organization and Design","author":"M Dubois","year":"2012","unstructured":"Dubois, M., Annavaram, M., Stenstrm, P.: Parallel Computer Organization and Design. Cambridge University Press, New York (2012)"},{"key":"410_CR12","doi-asserted-by":"crossref","unstructured":"Fung, W.W.L., Singh, I.., Brownsword, A., Aamodt, T.M.: Hardware transactional memory for GPU architectures. In: MICRO, pp. 296\u2013307 (2011)","DOI":"10.1145\/2155620.2155655"},{"issue":"3","key":"410_CR13","doi-asserted-by":"publisher","first-page":"24:1","DOI":"10.1145\/2633048","volume":"11","author":"MA Gonzalez-Mesa","year":"2014","unstructured":"Gonzalez-Mesa, M.A., Guti\u00e9rrez, E., Zapata, E.L., Plata, O.: Effective transactional memory execution management for improved concurrency. ACM Trans. Archit. Code Optim. 11(3), 24:1-24:27 (2014)","journal-title":"ACM Trans. Archit. Code Optim."},{"key":"410_CR14","doi-asserted-by":"crossref","unstructured":"Guerraoui, R., Herlihy, M., Pochon, B.: Toward a theory of transactional contention managers. In: PODC, pp. 258\u2013264 (2005)","DOI":"10.1145\/1073814.1073863"},{"key":"410_CR15","doi-asserted-by":"crossref","unstructured":"Gupta, A., Hajiaghayi, M.T., R\u00e4cke, H.: Oblivious network design. In: SODA, pp. 970\u2013979 (2006)","DOI":"10.1145\/1109557.1109665"},{"issue":"2","key":"410_CR16","doi-asserted-by":"publisher","first-page":"48","DOI":"10.1109\/MM.2011.108","volume":"32","author":"R Haring","year":"2012","unstructured":"Haring, R., Ohmacht, M., Fox, T., Gschwind, M., Satterfield, D., Sugavanam, K., Coteus, P., Heidelberger, P., Blumrich, M., Wisniewski, R., Gara, A., Chiu, G., Boyle, P., Chist, N., Kim, C.: The IBM blue gene\/Q compute chip. IEEE Micro 32(2), 48\u201360 (2012)","journal-title":"IEEE Micro"},{"key":"410_CR17","doi-asserted-by":"crossref","unstructured":"Hendler, D., Naiman, A., Peluso, S., Quaglia, F., Romano, P., Suissa, A.: Exploiting locality in lease-based replicated transactional memory via task migration. In: DISC, pp. 121\u2013133 (2013)","DOI":"10.1007\/978-3-642-41527-2_9"},{"key":"410_CR18","doi-asserted-by":"crossref","unstructured":"Herlihy, M., Moss, J.E.B.: Transactional memory: architectural support for lock-free data structures. In: ISCA, pp. 289\u2013300 (1993)","DOI":"10.1145\/173682.165164"},{"issue":"3","key":"410_CR19","doi-asserted-by":"publisher","first-page":"195","DOI":"10.1007\/s00446-007-0037-x","volume":"20","author":"M Herlihy","year":"2007","unstructured":"Herlihy, M., Sun, Y.: Distributed transactional memory for metric-space networks. Distrib. Comput. 20(3), 195\u2013208 (2007)","journal-title":"Distrib. Comput."},{"key":"410_CR20","unstructured":"Intel. http:\/\/software.intel.com\/en-us\/blogs\/2012\/02\/07\/transactional-synchronization-in-haswell (2012)"},{"key":"410_CR21","doi-asserted-by":"crossref","unstructured":"Irving, S., Chen, S., Peng, L., Busch, C., Herlihy, M., Michael, C.J.: CUDA-DTM: distributed transactional memory for GPU clusters. In: NETYS, pp. 183\u2013199 (2019)","DOI":"10.1007\/978-3-030-31277-0_12"},{"key":"410_CR22","doi-asserted-by":"crossref","unstructured":"Kim, J., Ravindran, B.: Scheduling transactions in replicated distributed software transactional memory. In: CCGrid, pp. 227\u2013234 (2013)","DOI":"10.1109\/CCGrid.2013.88"},{"key":"410_CR23","doi-asserted-by":"crossref","unstructured":"Kim, J., Ravindran, B.: On transactional scheduling in distributed transactional memory systems. In: SSS, pp. 347\u2013361 (2010)","DOI":"10.1007\/978-3-642-16023-3_29"},{"key":"410_CR24","doi-asserted-by":"crossref","unstructured":"Kotselidis, C., Ansari, M., Jarvis, K., Lujan, M., Kirkham, C., Watson, I.: DiSTM: a software transactional memory framework for clusters. In: ICPP, pp 51\u201358 (2008)","DOI":"10.1109\/IPDPS.2008.4536340"},{"key":"410_CR25","volume-title":"Introduction to Parallel Algorithms and Architectures: Array, Trees, Hypercubes","author":"FT Leighton","year":"1992","unstructured":"Leighton, F.T.: Introduction to Parallel Algorithms and Architectures: Array, Trees, Hypercubes. Morgan Kaufmann Publishers Inc., San Francisco (1992)"},{"key":"410_CR26","doi-asserted-by":"crossref","unstructured":"Manassiev, K., Mihailescu, M., Amza, C.: Exploiting distributed version concurrency in a transactional memory cluster. In: PPoPP, pp. 198\u2013208 (2006)","DOI":"10.1145\/1122971.1123002"},{"issue":"4","key":"410_CR27","first-page":"16","volume":"2","author":"M Michalewicz","year":"2015","unstructured":"Michalewicz, M., Orlowski, L., Deng, Y.: Creating interconnect topologies by algorithmic edge removal: MOD and SMOD graphs. Supercomput. Front. Innov. Int. J. 2(4), 16\u201347 (2015)","journal-title":"Supercomput. Front. Innov. Int. J."},{"key":"410_CR28","doi-asserted-by":"crossref","unstructured":"Nakaike, T., Odaira, R., Gaudet, M., Michael, M.M., Tomari, H.: Quantitative comparison of hardware transactional memory for Blue Gene\/Q, zEnterprise EC12, Intel Core, and POWER8. In: ISCA, pp. 144\u2013157 (2015)","DOI":"10.1145\/2872887.2750403"},{"key":"410_CR29","first-page":"341","volume-title":"Transaction Execution Models in Partially Replicated Transactional Memory: The Case for Data-Flow and Control-Flow","author":"R Palmieri","year":"2015","unstructured":"Palmieri, R., Peluso, S., Ravindran, B.: Transaction Execution Models in Partially Replicated Transactional Memory: The Case for Data-Flow and Control-Flow, pp. 341\u2013366. Springer, Cham (2015)"},{"key":"410_CR30","volume-title":"On-Chip Communication Architectures: System on Chip Interconnect","author":"S Pasricha","year":"2008","unstructured":"Pasricha, S., Dutt, N.: On-Chip Communication Architectures: System on Chip Interconnect. Morgan Kaufmann Publishers Inc., Burlington (2008)"},{"key":"410_CR31","doi-asserted-by":"crossref","unstructured":"Poudel, P., Rai, S., Sharma, G.: Processing distributed transactions in a predefined order. In: ICDCN, pp. 215\u2013224 (2021)","DOI":"10.1145\/3427796.3427819"},{"issue":"1","key":"410_CR32","doi-asserted-by":"publisher","first-page":"257","DOI":"10.1016\/j.jcss.2013.07.006","volume":"80","author":"P Romano","year":"2014","unstructured":"Romano, P., Palmieri, R., Quaglia, F., Carvalho, N., Rodrigues, L.: On speculative replication of transactional systems. J. Comput. Syst. Sci. 80(1), 257\u2013276 (2014)","journal-title":"J. Comput. Syst. Sci."},{"key":"410_CR33","doi-asserted-by":"crossref","unstructured":"Saad, M.M., Kishi, M.J., Jing, S., Hans, S., Palmieri, R.: Processing transactions in a predefined order. In: PPoPP, pp. 120\u2013132 (2019)","DOI":"10.1145\/3293883.3295730"},{"key":"410_CR34","doi-asserted-by":"crossref","unstructured":"Saad, M.M., Ravindran, B..: Snake: control flow distributed software transactional memory. In: SSS, pp. 238\u2013252 (2011)","DOI":"10.1007\/978-3-642-24550-3_19"},{"issue":"3","key":"410_CR35","doi-asserted-by":"publisher","first-page":"225","DOI":"10.1007\/s00446-012-0159-7","volume":"25","author":"G Sharma","year":"2012","unstructured":"Sharma, G., Busch, C.: Window-based greedy contention management for transactional memory: theory and practice. Distrib. Comput. 25(3), 225\u2013248 (2012)","journal-title":"Distrib. Comput."},{"issue":"5","key":"410_CR36","doi-asserted-by":"publisher","first-page":"329","DOI":"10.1007\/s00446-014-0214-7","volume":"27","author":"G Sharma","year":"2014","unstructured":"Sharma, G., Busch, C.: Distributed transactional memory for general networks. Distrib. Comput. 27(5), 329\u2013362 (2014)","journal-title":"Distrib. Comput."},{"issue":"2","key":"410_CR37","doi-asserted-by":"publisher","first-page":"99","DOI":"10.1007\/s004460050028","volume":"10","author":"N Shavit","year":"1997","unstructured":"Shavit, N., Touitou, D.: Software transactional memory. Distrib. Comput. 10(2), 99\u2013116 (1997)","journal-title":"Distrib. Comput."},{"key":"410_CR38","doi-asserted-by":"crossref","unstructured":"Zhang, B., Ravindran, B. Relay: a cache-coherence protocol for distributed transactional memory. In: OPODIS, pp. 48\u201353 (2009)","DOI":"10.1007\/978-3-642-10877-8_6"},{"key":"410_CR39","doi-asserted-by":"crossref","unstructured":"Zhang, B., Ravindran, B., Palmieri, R.: Distributed transactional contention management as the traveling salesman problem. In: SIROCCO, pp. 54\u201367 (2014)","DOI":"10.1007\/978-3-319-09620-9_6"}],"container-title":["Distributed Computing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s00446-021-00410-w.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s00446-021-00410-w\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s00446-021-00410-w.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,9,12]],"date-time":"2024-09-12T18:54:46Z","timestamp":1726167286000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s00446-021-00410-w"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,11,20]]},"references-count":39,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2022,2]]}},"alternative-id":["410"],"URL":"https:\/\/doi.org\/10.1007\/s00446-021-00410-w","relation":{},"ISSN":["0178-2770","1432-0452"],"issn-type":[{"type":"print","value":"0178-2770"},{"type":"electronic","value":"1432-0452"}],"subject":[],"published":{"date-parts":[[2021,11,20]]},"assertion":[{"value":"11 January 2021","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"18 October 2021","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"20 November 2021","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}