{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,10]],"date-time":"2026-07-10T11:53:09Z","timestamp":1783684389615,"version":"3.55.0"},"reference-count":28,"publisher":"Springer Science and Business Media LLC","issue":"3-4","license":[{"start":{"date-parts":[[2011,4,20]],"date-time":"2011-04-20T00:00:00Z","timestamp":1303257600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Comput Sci Res Dev"],"published-print":{"date-parts":[[2011,6]]},"DOI":"10.1007\/s00450-011-0165-1","type":"journal-article","created":{"date-parts":[[2011,4,19]],"date-time":"2011-04-19T19:01:33Z","timestamp":1303239693000},"page":"325-337","source":"Crossref","is-referenced-by-count":9,"title":["Experiments with the Fresh Breeze tree-based memory model"],"prefix":"10.1007","volume":"26","author":[{"given":"Jack B.","family":"Dennis","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Guang R.","family":"Gao","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xiao X.","family":"Meng","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2011,4,20]]},"reference":[{"key":"165_CR1","first-page":"50","volume-title":"Massively parallel programming models","author":"JB Dennis","year":"1997","unstructured":"Dennis JB (1997) A parallel program execution model supporting modular software construction. In: Massively parallel programming models. IEEE Comput Soc, Los Alamitos, pp 50\u201360"},{"issue":"1","key":"165_CR2","doi-asserted-by":"crossref","first-page":"7","DOI":"10.1145\/773365.773367","volume":"31","author":"JB Dennis","year":"2003","unstructured":"Dennis JB (2003) Fresh breeze: a multiprocessor chip architecture guided by modular programming principles. SIGARCH Comput Archit News 31(1):7\u201315","journal-title":"SIGARCH Comput Archit News"},{"key":"165_CR3","unstructured":"Dennis JB, Horn ECV (1966) Programming semantics for multi-programmed computations. Commun ACM, 9, Feb 1966"},{"key":"165_CR4","volume-title":"Capability-based computer systems","author":"H Levy","year":"1984","unstructured":"Levy H (1984) Capability-based computer systems. Butterworth-Heinemann, Stoneham-London"},{"key":"165_CR5","series-title":"Operating and programming systems series","volume-title":"The Cambridge CAP computer and its operating system (Operating and programming systems series)","author":"MV Wilkes","year":"1979","unstructured":"Wilkes MV (1979) The Cambridge CAP computer and its operating system (Operating and programming systems series). Operating and programming systems series. North-Holland, Amsterdam"},{"key":"165_CR6","doi-asserted-by":"crossref","first-page":"170","DOI":"10.1145\/319151.319163","volume-title":"Proceedings of the seventeenth ACM symposium on operating systems principles, SOSP\u201999","author":"JS Shapiro","year":"1999","unstructured":"Shapiro JS, Smith JM, Farber DJ (1999) Eros: a fast capability system. In: Proceedings of the seventeenth ACM symposium on operating systems principles, SOSP\u201999. ACM, New York, pp 170\u2013185"},{"key":"165_CR7","volume-title":"Workshop on programming models for ubiquitous parallelism","author":"JB Dennis","year":"2006","unstructured":"Dennis JB (2006) The Fresh Breeze model of thread execution. In: Workshop on programming models for ubiquitous parallelism. IEEE Comput Soc, Los Alamitos. Published with PACT-2006"},{"key":"165_CR8","doi-asserted-by":"crossref","first-page":"212","DOI":"10.1145\/277652.277725","volume":"33","author":"M Frigo","year":"1998","unstructured":"Frigo M, Leiserson CE, Randall KH (1998) The implementation of the Cilk-5 multithreaded language. ACM SIGPLAN Not 33:212\u2013223","journal-title":"ACM SIGPLAN Not"},{"key":"165_CR9","unstructured":"Ginzburg I (2007) Compiling array computations for the Fresh Breeze parallel processor. Thesis for the Master of Engineering degree, MIT Department of Electrical Engineering and Computer Science, May 2007"},{"key":"165_CR10","doi-asserted-by":"crossref","first-page":"265","DOI":"10.1109\/IPDPS.2005.434","volume-title":"International parallel and distributed processing symposium","author":"J Cuvillo del","year":"2005","unstructured":"del Cuvillo J, Zhu W, Hu Z, Gao GR (2005) Tiny threads: a thread virtual machine for the Cyclops 64 cellular architecture. In: International parallel and distributed processing symposium. IEEE Comput Soc, Los Alamitos, p 265"},{"key":"165_CR11","unstructured":"Schmidt B (2008) A shared memory system for Fresh Breeze. Master\u2019s thesis, MIT Department of Electrical Engineering and Computer Science, May 2008"},{"key":"165_CR12","unstructured":"del Cuvillo J, Zhu W, Hu Z, Gao GR (2005) FAST: a functionally accurate simulation toolset for the Cyclops 64 cellular architecture"},{"key":"165_CR13","doi-asserted-by":"crossref","first-page":"30","DOI":"10.1145\/961053.961069","volume-title":"Proceedings of the second symposium on operating systems principles","author":"A Bensoussan","year":"1969","unstructured":"Bensoussan A, Clingen CT, Daley RC (1969) The Multics virtual memory. In: Proceedings of the second symposium on operating systems principles. ACM, New York, pp\u00a030\u201342"},{"key":"165_CR14","volume-title":"Inside the AS\/400","author":"FG Soltis","year":"1996","unstructured":"Soltis FG (1996) Inside the AS\/400. Duke Press, Loveland"},{"key":"165_CR15","doi-asserted-by":"crossref","first-page":"699","DOI":"10.1093\/comjnl\/42.8.699","volume":"42","author":"V-Y Vee","year":"1999","unstructured":"Vee V-Y, Hsu W-J (1999) Applying Cilk in provably efficient task scheduling. Comput J 42:699\u2013712","journal-title":"Comput J"},{"key":"165_CR16","unstructured":"Theobald KB (1999) EARTH: an efficient architecture for running threads. PhD thesis, University of Delaware, May 1999"},{"key":"165_CR17","first-page":"59","volume-title":"Conference on parallel architectures and compilation techniques, PACT","author":"HHJ Hum","year":"1995","unstructured":"Hum HHJ, Maquelin O, Theobald KB, Tian X, Tang X, Gao GR (1995) A design study of the EARTH multiprocessor. In: Conference on parallel architectures and compilation techniques, PACT. IEEE Comput Soc, Los Alamitos, pp 59\u201368"},{"key":"165_CR18","first-page":"260","volume-title":"ACM\u201987: the 7th symp on the frontiers of massively parallel computation: today and tomorrow","author":"KB Theobald","year":"1999","unstructured":"Theobald KB, Gao GR, Sterling TL (1999) Superconducting processors for HTMT: Issues and challenges. In: ACM\u201987: the 7th symp on the frontiers of massively parallel computation: today and tomorrow. ACM, New York, pp\u00a0260\u2013267"},{"key":"165_CR19","first-page":"519","volume-title":"2005 conference on objectoriented programming","author":"P Charles","year":"2005","unstructured":"Charles P, Grotho C, Saraswat V, Donawa C, Kielstra A, Ebcioglu K, von Praun C, Sarkar V (2005) X10: an object-oriented approach to non-uniform cluster computing. In: 2005 conference on objectoriented programming. ACM, New York, pp\u00a0519\u2013538"},{"key":"165_CR20","doi-asserted-by":"crossref","first-page":"17","DOI":"10.1145\/12276.13313","volume-title":"86 symposium on compiler construction, SIGPLAN","author":"V Sarkar","year":"1986","unstructured":"Sarkar V, Hennessy J (1986) Compile-time partitioning and scheduling of parallel programs. In: 86 symposium on compiler construction, SIGPLAN. ACM, New York, pp\u00a017\u201326"},{"key":"165_CR21","volume-title":"Twenty-second international conference on supercomputing","author":"J Shirako","year":"2008","unstructured":"Shirako J, Peixotto D, Sarkar V, Scherer W (2008) Phasers: a unified deadlock-free construct for collective and point-to-point synchronization. In: Twenty-second international conference on supercomputing. IEEE Comput Soc, Los Alamitos"},{"key":"165_CR22","volume-title":"International parallel and distributed processing symposium, IPDPS","author":"Y Guo","year":"2009","unstructured":"Guo Y, Barik R, Raman R, Sarkar V (2009) Work-first and help-first scheduling policies for async-finish task parallelism. In: International parallel and distributed processing symposium, IPDPS. IEEE Comput Soc, Los Alamitos"},{"key":"165_CR23","volume-title":"Ninth international workshop on high-level parallel programming models and supportive environments","author":"D Callahan","year":"2004","unstructured":"Callahan D, Chamberlain BL, Zima HP (2004) The Cascade high productivity language. In: Ninth international workshop on high-level parallel programming models and supportive environments"},{"key":"165_CR24","first-page":"578","volume-title":"ACM\u201987: proceedings of the 1987 fall joint computer conference on exploring technology: today and tomorrow","author":"T Yuba","year":"1987","unstructured":"Yuba T, Hiraki K, Shimada T, Sekiguchi S, Nishida K (1987) The Sigma-1 dataflow computer. In: ACM\u201987: proceedings of the 1987 fall joint computer conference on exploring technology: today and tomorrow. IEEE Comput Soc, Los Alamitos, pp\u00a0578\u2013585"},{"key":"165_CR25","doi-asserted-by":"crossref","first-page":"1476","DOI":"10.1109\/43.898827","volume":"19","author":"J Darringer","year":"2000","unstructured":"Darringer J, Davidson E, Hathaway D, Koenemann B, Lavin M, Morrell J, Rahmat K, Roesner W, Schanzenbach E, Tellez G, Trevillyan L (2000) EDA in IBM: past present, and future. IEEE Trans Comput-Aided Des Integr Circuits Syst 19:1476\u20131497","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"},{"key":"165_CR26","doi-asserted-by":"crossref","unstructured":"Dubois M, Jeong J, Song Y, Moga A (1998) Rapid hardware prototyping on RPM-2. IEEE Des Test Comput, pp 112\u2013118","DOI":"10.1109\/54.706042"},{"key":"165_CR27","doi-asserted-by":"crossref","first-page":"46","DOI":"10.1109\/MM.2007.39","volume":"27","author":"J Wawrzynek","year":"2007","unstructured":"Wawrzynek J, Patterson D, Oskin M, Lu S-L, Kozyrakis C, Hoe J, Chiou D, Asanovic K (2007) RAMP: research accelerator for multiple processors. IEEE MICRO 27:46\u201357","journal-title":"IEEE MICRO"},{"key":"165_CR28","doi-asserted-by":"crossref","unstructured":"Cav\u00e9 V, Budimli\u0107 Z, Sarkar V (2010) Comparing the usability of library vs. language approaches to task parallelism. ACM PLATEAU\u201910, evaluation and usability of programming languages and tools, pp\u00a09.1\u20139.6","DOI":"10.1145\/1937117.1937126"}],"container-title":["Computer Science - Research and Development"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00450-011-0165-1.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s00450-011-0165-1\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00450-011-0165-1","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,10]],"date-time":"2019-06-10T04:46:53Z","timestamp":1560142013000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s00450-011-0165-1"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,4,20]]},"references-count":28,"journal-issue":{"issue":"3-4","published-print":{"date-parts":[[2011,6]]}},"alternative-id":["165"],"URL":"https:\/\/doi.org\/10.1007\/s00450-011-0165-1","relation":{},"ISSN":["1865-2034","1865-2042"],"issn-type":[{"value":"1865-2034","type":"print"},{"value":"1865-2042","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,4,20]]}}}