{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,3]],"date-time":"2022-04-03T23:53:02Z","timestamp":1649029982569},"reference-count":18,"publisher":"Springer Science and Business Media LLC","issue":"4","license":[{"start":{"date-parts":[[2010,4,1]],"date-time":"2010-04-01T00:00:00Z","timestamp":1270080000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Elektrotech. Inftech."],"published-print":{"date-parts":[[2010,4]]},"DOI":"10.1007\/s00502-010-0706-5","type":"journal-article","created":{"date-parts":[[2010,6,7]],"date-time":"2010-06-07T11:41:58Z","timestamp":1275910918000},"page":"109-113","source":"Crossref","is-referenced-by-count":0,"title":["An IP-XACT Library extended with verification information for functionality-based component selection"],"prefix":"10.1007","volume":"127","author":[{"given":"Ch.","family":"Ruggenthaler","sequence":"first","affiliation":[]},{"given":"Ch.","family":"Trummer","sequence":"additional","affiliation":[]},{"given":"Ch.","family":"Steger","sequence":"additional","affiliation":[]},{"given":"R.","family":"Wei\u00df","sequence":"additional","affiliation":[]},{"given":"A.","family":"Schuhai","sequence":"additional","affiliation":[]},{"given":"M.","family":"Pistauer","sequence":"additional","affiliation":[]},{"given":"D.","family":"Dalton","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"706_CR1","unstructured":"Aeroflex Gaisler. GRLIB IP Library User Manual, 2008. http:\/\/gaisler.com\/products\/grlib\/grlib.pdf \u2013last visited 05.07.2009"},{"key":"706_CR2","unstructured":"Berman,V., Fazzari, S., Ussery, C., Indovina, M., Strik, M., Wilson, J., Florent, O., R\u00e9mond, F., Bricaud, P. (2006): Industrially Proving the SPIRIT Consortium Specifications for DesignChain Integration. In Proc. Design, Automation and Test in Europe DATE '06, vol. 2, 1\u20136, 6\u201310 March 2006"},{"key":"706_CR3","unstructured":"McGrat, D.: Si2 forms Open Modeling Coalition. Technical report, EETimes, 2005. http:\/\/www.eetimes.com\/showArticle.jhtml?articleID=170703000 \u2013 last visited 04.07.2009"},{"key":"706_CR4","unstructured":"Haridas, V., Ramchandra, V., Santhosh, K., NXP Semiconductors (2007): Automation in IP based SoC development: Case study of a media processorsubsystem. Technical report, NXP Semiconductors"},{"key":"706_CR5","unstructured":"IEEE (2005): Advanced Library Format (ALF) describing integrated circuit (IC) technology, cells, and blocks. IEC 62265-2005 First edition 2005\u201307 IEEE Std 1603, (IEEE Std 1603): 1\u2013300"},{"key":"706_CR6","unstructured":"IPextreme. Coreuse, 2009. http:\/\/www.ip-extreme.com\/coreuse.html \u2013last visited 04.07.2009"},{"key":"706_CR7","doi-asserted-by":"crossref","unstructured":"Kirchsteiger, C. M., Grinschgl, J., Trummer, C., Steger, C., Weiss, R., Pistauer, M. (2008): Automatic Test Generation From Semi-formal Specifications for Functional Verification of System-on-Chip Designs. In Proc. 2nd Annual IEEE Systems Conference, 1\u20138, 7\u201310 April 2008","DOI":"10.1109\/SYSTEMS.2008.4519044"},{"key":"706_CR8","unstructured":"Mathaikutty, D., Shukla, S. (2006a): Mining Metadata for Composability of IPs from SystemC IP Library. In Proceedings of Forum on specification and Design Languages"},{"key":"706_CR9","doi-asserted-by":"crossref","unstructured":"Mathaikutty, D., Shukla, S. (2006b): SoC Design Space Exploration through Automated IP Selection from SystemC IP Library. In Proc. IEEE International SOC Conference, 109\u2013110, 24\u201327 Sept. 2006","DOI":"10.1109\/SOCC.2006.283859"},{"key":"706_CR10","doi-asserted-by":"crossref","unstructured":"Mathaikutty, D., Shukla, S. (2007): Type Inference for IP Composition. In Proc. 5th IEEE\/ACM International Conference on Formal Methods and Models for Codesign MEMOCODE 2007, 61\u201370, May 30\u2013June 2 2007","DOI":"10.1109\/MEMCOD.2007.371248"},{"key":"706_CR11","doi-asserted-by":"crossref","unstructured":"Reynari, L. M., Cucinotta, F., Serra, A., Lavagno, L. (2001): A Hardware\/Software Co-Design Flow and IP library based of Simulink. In Proc. Design Automation Conference, 593\u2013598","DOI":"10.1109\/DAC.2001.935578"},{"key":"706_CR12","doi-asserted-by":"crossref","unstructured":"Sarno, L., Wilson, R., Kwan Eo, S. Lestringand, L., Goodenough, J., Stark, G., Leef, S., Witt, D. (2007): IP Exchange: I'll Show You Mine if You Show Me Yours. In Proc. 44th ACM\/IEEE Design Automation Conference DAC '07, 990\u2013991, 4\u20138 June 2007","DOI":"10.1109\/DAC.2007.375310"},{"key":"706_CR13","unstructured":"Si2. Open modelling architecture. Technical report, Si2, 2007. http:\/\/www.si2.org\/?page=863 \u2013 last visited 04.07.2009"},{"key":"706_CR14","unstructured":"SPIRIT-Consortium. (2009): IP-XACT Version 1.5 Release. SPIRIT Consortium"},{"key":"706_CR15","doi-asserted-by":"crossref","unstructured":"Trummer, C., Kirchsteiger, C. M., Steger, C., Weiss, R., Schuhai, A., Pistauer, M., Dalton, D. (2009): A Component Selection Methodology for IP Reuse in the Design of Power-aware SoCs based on Requirements Similarity. In Proc. 3rd Annual IEEE Systems Conference, 133\u2013138, 23\u201326 March 2009","DOI":"10.1109\/SYSTEMS.2009.4815786"},{"key":"706_CR16","doi-asserted-by":"crossref","unstructured":"Visarius, M., Lessmann, J., Hardt, W., Kelso, F., Thronicke, W. (2003): An XML format based integration infrastructure for IP based design. In Proc. 16th Symposium on Integrated Circuits and Systems Design SBCCI2003, 119\u2013124, 8\u201311 Sept. 2003","DOI":"10.1109\/SBCCI.2003.1232816"},{"key":"706_CR17","unstructured":"Vignau, R. V. (2006): Time-to-market drives SoC Design to higher Levels of Abstraction. Embedded Systems Europe, November\u2013December: 14\u201316, 2006. http:\/\/www.embedded.com\/columns\/technicalinsights\/196600752?_requestid=166618 \u2013 last visited 05.07.2009"},{"key":"706_CR18","doi-asserted-by":"crossref","first-page":"231","DOI":"10.1016\/j.parco.2008.03.004","volume":"34","author":"M. Wirthlin","year":"2008","unstructured":"Wirthlin, M., Poznanovic, D., Sundararajan, P., Coppola, A., Pellerin, D., Najjar, W., Bruce, R., Babst, M., Pritchard, O., Palazzari, P. et al. (2008): OpenF-PGA CoreLib core library interoperability effort. Parallel Computing, Vol. 34: 231\u2013244","journal-title":"Parallel Computing"}],"container-title":["e & i Elektrotechnik und Informationstechnik"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00502-010-0706-5.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s00502-010-0706-5\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00502-010-0706-5","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,29]],"date-time":"2019-05-29T01:48:31Z","timestamp":1559094511000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s00502-010-0706-5"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,4]]},"references-count":18,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2010,4]]}},"alternative-id":["706"],"URL":"https:\/\/doi.org\/10.1007\/s00502-010-0706-5","relation":{},"ISSN":["0932-383X","1613-7620"],"issn-type":[{"value":"0932-383X","type":"print"},{"value":"1613-7620","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,4]]}}}