{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,6,24]],"date-time":"2024-06-24T23:07:53Z","timestamp":1719270473360},"reference-count":25,"publisher":"Springer Science and Business Media LLC","issue":"7","license":[{"start":{"date-parts":[[2012,11,15]],"date-time":"2012-11-15T00:00:00Z","timestamp":1352937600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Computing"],"published-print":{"date-parts":[[2013,7]]},"DOI":"10.1007\/s00607-012-0236-6","type":"journal-article","created":{"date-parts":[[2012,11,14]],"date-time":"2012-11-14T05:41:07Z","timestamp":1352871667000},"page":"537-566","source":"Crossref","is-referenced-by-count":3,"title":["Efficient inter-core power and thermal balancing for multicore processors"],"prefix":"10.1007","volume":"95","author":[{"given":"Juan M.","family":"Cebri\u00e1n","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Daniel","family":"S\u00e1nchez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Juan L.","family":"Arag\u00f3n","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Stefanos","family":"Kaxiras","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2012,11,15]]},"reference":[{"key":"236_CR1","doi-asserted-by":"crossref","unstructured":"Bhattacharjee A, Martonosi M (2009) Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors. In: Proceedings of the 36th annual international symposium on computer architecture, ISCA \u201909, pp 290\u2013301. ACM, New York, NY, USA. http:\/\/doi.acm.org\/10.1145\/1555754.1555792","DOI":"10.1145\/1555754.1555792"},{"key":"236_CR2","doi-asserted-by":"crossref","unstructured":"Cai Q, Gonzalez J, Rakvic R, Magklis G, Chaparro P, Gonzalez A (2008) Meeting points: Using thread criticality to adapt multicore hardware to parallel regions. In: Proceedings of the international conference on parallel architectures and compilation techniques, pp 240\u2013249","DOI":"10.1145\/1454115.1454149"},{"key":"236_CR3","doi-asserted-by":"crossref","unstructured":"Cebrian JM, Aragon JL, Garcia JM, Petoumenos P, Kaxiras S (2009) Efficient microarchitecture policies for accurately adapting to power constraints. In: Proceedings of the IEEE international parallel and distributed processing, symposium, pp 1\u201312. doi: 10.1109\/IPDPS.2009.5161022","DOI":"10.1109\/IPDPS.2009.5161022"},{"key":"236_CR4","doi-asserted-by":"crossref","unstructured":"Cebrian JM, Aragon JL, Kaxiras S (2011) Power token balancing: adapting CMPS to power constraints for parallel multithreaded workloads. In: Proceedings of the IEEE international parallel and distributed processing symposium","DOI":"10.1109\/IPDPS.2011.49"},{"key":"236_CR5","doi-asserted-by":"crossref","unstructured":"Donald J, Martonosi M (2006) Techniques for multicore thermal management: Classification and new exploration. In: Proceedings of the 33rd international symposium on computer, architecture, pp 78\u201388. doi: 10.1109\/ISCA.2006.39","DOI":"10.1109\/ISCA.2006.39"},{"key":"236_CR6","doi-asserted-by":"crossref","unstructured":"Esmaeilzadeh H, Blem E, St. Amant R, Sankaralingam K, Burger D (2011) Dark silicon and the end of multicore scaling. In: Proceedings of the 38th annual international symposium on Computer architecture, ISCA \u201911, pp 365\u2013376. ACM, New York, NY, USA. doi: 10.1145\/2000064.2000108 . http:\/\/doi.acm.org\/10.1145\/2000064.2000108","DOI":"10.1145\/2000064.2000108"},{"key":"236_CR7","doi-asserted-by":"crossref","unstructured":"Flynn MJ, Hung P (2005) Microprocessor design issues: thoughts on the road ahead 25(3):16\u201331. doi: 10.1109\/MM.2005.56","DOI":"10.1109\/MM.2005.56"},{"key":"236_CR8","doi-asserted-by":"crossref","unstructured":"Isci C, Buyuktosunoglu A, Cher CY, Bose P, Martonosi M (2006) An analysis of efficient multi-core global power management policies: maximizing performance for a given power budget. In: Proceedings of the 39th annual IEEE\/ACM international symposium on microarchitecture, pp 347\u2013358. doi: 10.1109\/MICRO.2006.8","DOI":"10.1109\/MICRO.2006.8"},{"key":"236_CR9","unstructured":"Keshavarzi, A. (1997) Intrinsic iddq: origins, reduction, and applications in deep sub- low-power cmos ic\u2019s. In: Proceedings of the IEEE international test conference"},{"issue":"12","key":"236_CR10","doi-asserted-by":"crossref","first-page":"68","DOI":"10.1109\/MC.2003.1250885","volume":"36","author":"NS Kim","year":"2003","unstructured":"Kim NS, Austin T, Baauw D, Mudge T, Flautner K, Hu JS, Irwin MJ, Kandemir M, Narayanan V (2003) Leakage current: Moore\u2019s law meets static power. Computer 36(12):68\u201375. doi: 10.1109\/MC.2003.1250885","journal-title":"Computer"},{"key":"236_CR11","doi-asserted-by":"crossref","unstructured":"Kim W, Gupta MS, Wei GY, Brooks D (2008) System level analysis of fast, per-core DVFS using on-chip switching regulators. In: Proceedings of the IEEE 14th international symposium on high performance computer, architecture, pp 123\u2013134. doi: 10.1109\/HPCA.2008.4658633","DOI":"10.1109\/HPCA.2008.4658633"},{"key":"236_CR12","doi-asserted-by":"crossref","unstructured":"Li J, Martinez JF, Huang MC (2004) The thrifty barrier: energy-aware synchronization in shared-memory multiprocessors. In: Proceedings of the 10th international symposium on high performance computer, architecture, pp 14\u201323. doi: 10.1109\/HPCA.2004.10018","DOI":"10.1109\/HPCA.2004.10018"},{"key":"236_CR13","doi-asserted-by":"crossref","unstructured":"Li S, Ahn JH, Strong RD, Brockman JB, Tullsen DM, Jouppi NP (2009) Mcpat: an integrated power, area, and timing modeling framework for multicore and manycore architectures. In: Proceedings of the 42th international symposium on microarchitecture, pp 469\u2013480","DOI":"10.1145\/1669112.1669172"},{"issue":"6","key":"236_CR14","first-page":"508","volume":"17","author":"T Li","year":"2006","unstructured":"Li T, Lebeck AR, Sorin DJ (2006) Spin detection hardware for improved management of multithreaded systems 17(6):508\u2013521. doi: 10.1109\/TPDS.2006.78","journal-title":"Spin detection hardware for improved management of multithreaded systems"},{"key":"236_CR15","doi-asserted-by":"crossref","unstructured":"Macken P, Degrauwe M, Van Paemel M, Oguey H (1990) A voltage reduction technique for digital systems. In: Proceedings of the 37th IEEE international solid-state circuits conference, digest of technical papers, pp 238\u2013239. doi: 10.1109\/ISSCC.1990.110213","DOI":"10.1109\/ISSCC.1990.110213"},{"issue":"2","key":"236_CR16","doi-asserted-by":"crossref","first-page":"50","DOI":"10.1109\/2.982916","volume":"35","author":"PS Magnusson","year":"2002","unstructured":"Magnusson PS, Christensson M, Eskilson J, Forsgren D, Hallberg G, Hogberg J, Larsson F, Moestedt A, Werner B (2002) Simics: a full system simulation platform. Computer 35(2):50\u201358. doi: 10.1109\/2.982916","journal-title":"Computer"},{"key":"236_CR17","first-page":"2005","volume":"33","author":"MMK Martin","year":"2005","unstructured":"Martin MMK, Sorin DJ, Beckmann BM, Marty MR, Xu M, Alameldeen AR, Moore KE, Hill MD, Wood DA (2005) Multifacet\u2019s general execution-driven multiprocessor simulator (gems) toolset. SIGARCH Comput Archit News 33:2005","journal-title":"SIGARCH Comput Archit News"},{"key":"236_CR18","doi-asserted-by":"crossref","unstructured":"Meng K, Joseph R, Dick RP, Shang L (2008) Multi-optimization power management for chip multiprocessors. In: Proceedings of the 17th international conference on parallel architectures and compilation techniques, PACT \u201908, pp 177\u2013186. ACM, New York, NY, USA. http:\/\/doi.acm.org\/10.1145\/1454115.1454141","DOI":"10.1145\/1454115.1454141"},{"key":"236_CR19","doi-asserted-by":"crossref","unstructured":"Sartori J, Kumar R (2009) Distributed peak power management for many-core architectures. In: Proceedings of the design, automation and test in Europe conference and Exhibition, pp 1556\u20131559","DOI":"10.1109\/DATE.2009.5090910"},{"key":"236_CR20","doi-asserted-by":"crossref","unstructured":"Sasanka R, Hughes CJ, Adve SV (2002) Joint local and global hardware adaptations for energy. In: Proceedings of the 10th international conference on architectural support for programming languages and operating systems, ASPLOS-X, pp 144\u2013155. ACM, New York, NY, USA. http:\/\/doi.acm.org\/10.1145\/605397.605413","DOI":"10.1145\/605397.605413"},{"key":"236_CR21","doi-asserted-by":"crossref","unstructured":"Semeraro G, Magklis G, Balasubramonian R, Albonesi DH, Dwarkadas S, Scott ML (2002) Energy-efficient processor design using multiple clock domains with dynamic voltage and frequency scaling. In: Proceedings of the 8th international high-performance computer architecture, symposium, pp 29\u201340 doi: 10.1109\/HPCA.2002.995696","DOI":"10.1109\/HPCA.2002.995696"},{"key":"236_CR22","unstructured":"Simunic T, Benini L, Acquaviva A, Glynn P, de Micheli G (2001) Dynamic voltage scaling and power management for portable systems. In: Proceedings on design automation conference, pp 524\u2013529. doi:10.1109\/DAC.2001.156195"},{"key":"236_CR23","doi-asserted-by":"crossref","unstructured":"Skadron K, Stan MR, Huang W, Velusamy S, Sankaranarayanan K, Tarjan D (2003) Temperature-aware microarchitecture. In: Proceedings of the 30th annual international computer architecture, symposium, pp 2\u201313. doi: 10.1109\/ISCA.2003.1206984","DOI":"10.1109\/ISCA.2003.1206984"},{"key":"236_CR24","unstructured":"Winter JA, Albonesi DH (2008) Addressing thermal nonuniformity in smt workloads. ACM Trans Archit Code Optim 5:4:1\u20134:28. http:\/\/doi.acm.org\/10.1145\/1369396.1369400"},{"key":"236_CR25","doi-asserted-by":"crossref","unstructured":"Wu Q, Juang P, Martonosi M, Clark DW (2005) Voltage and frequency control with adaptive reaction time in multiple-clock-domain processors. In: Proceedings of the 11th international symposium on high-performance computer, architecture, pp 178\u2013189. doi: 10.1109\/HPCA.2005.43","DOI":"10.1109\/HPCA.2005.43"}],"container-title":["Computing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00607-012-0236-6.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s00607-012-0236-6\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00607-012-0236-6","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,7,5]],"date-time":"2019-07-05T16:24:30Z","timestamp":1562343870000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s00607-012-0236-6"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,11,15]]},"references-count":25,"journal-issue":{"issue":"7","published-print":{"date-parts":[[2013,7]]}},"alternative-id":["236"],"URL":"https:\/\/doi.org\/10.1007\/s00607-012-0236-6","relation":{},"ISSN":["0010-485X","1436-5057"],"issn-type":[{"value":"0010-485X","type":"print"},{"value":"1436-5057","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,11,15]]}}}