{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,12,28]],"date-time":"2022-12-28T19:54:56Z","timestamp":1672257296538},"reference-count":45,"publisher":"Springer Science and Business Media LLC","issue":"4","license":[{"start":{"date-parts":[[2004,12,1]],"date-time":"2004-12-01T00:00:00Z","timestamp":1101859200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Des Autom Embed Syst"],"published-print":{"date-parts":[[2004,12]]},"DOI":"10.1007\/s10617-005-1199-z","type":"journal-article","created":{"date-parts":[[2005,7,29]],"date-time":"2005-07-29T13:52:05Z","timestamp":1122645125000},"page":"293-312","source":"Crossref","is-referenced-by-count":10,"title":["Single Source Design Environment for Embedded Systems Based on SystemC"],"prefix":"10.1007","volume":"9","author":[{"given":"H.","family":"Posadas","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.","family":"Herrera","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"V.","family":"Fern\u00c1ndez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P.","family":"S\u00c1nchez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"E.","family":"Villar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.","family":"Blasco","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2005,7,15]]},"reference":[{"key":"1199_CR1","doi-asserted-by":"crossref","unstructured":"Balarin, F., L. Lavagno, P. Murthy, and A. SanGiovanni-Vicentelli. Scheduling for Embedded Real-Time Systems. IEEE Design & Test of Computers, January-March 1998.","DOI":"10.1109\/54.655185"},{"key":"1199_CR2","doi-asserted-by":"crossref","unstructured":"Bergeron, J. Writing Testbenches: Functional Verification of HDL Models, 2nd edition, Kluwer, 2003.","DOI":"10.1007\/978-1-4615-0302-6"},{"key":"1199_CR3","doi-asserted-by":"crossref","unstructured":"Bjur\u00e9us, P. and A. Jantsch. Performance Analysis with Confidence Intervals for Embedded Software Processes. In Proc. of the Int. Symposium on System Synthesis, ISSS, 2001.","DOI":"10.1145\/500001.500012"},{"key":"1199_CR4","doi-asserted-by":"crossref","unstructured":"Bolado, M., J. Castillo, H. Posadas, P. Sanchez, E. Villar, C. Sanchez, F. Blasco, and H Fouren. Platform Based on Open-Source Cores for Industrial Applications. In Proc. of DATE, IEEE, 2004.","DOI":"10.1109\/DATE.2004.1269026"},{"key":"1199_CR5","doi-asserted-by":"crossref","unstructured":"Brandolese, C., W. Fornaciari, F. Salice, and D. Sciuto. Source-Level Execution Time Estimation of C Programs. In Proc. of the Int. Symposium on HW\/SW CoDesign, CoDes, 2001.","DOI":"10.1145\/371636.371694"},{"key":"1199_CR6","doi-asserted-by":"crossref","unstructured":"Buttazzo, G. Hard Real-Time Computing Systems. Springer, 2005.","DOI":"10.1007\/0-387-27578-9"},{"key":"1199_CR7","doi-asserted-by":"crossref","unstructured":"Cesario, W., A. Baghdadi, L. Gauthier, D. Lyonnard, G. Nicolescu, Y. Paviot, S. Yoo, A. Jerraya, and M. Diaz-Nava. Component-Based Design Approach for Multi-Core SoCs. In Proc. of DATE, IEEE, 2002.","DOI":"10.1145\/513918.514115"},{"key":"1199_CR8","unstructured":"Chang, H., L. Cooke, M. Hunt, G. Martin, A. McNelly, and L. Todd. Surviving the SoC Revolution: A Guide to Platform-Based Design, Kluwer, 1999."},{"key":"1199_CR9","unstructured":"de Micheli, G. and R.K. Gupta. HW\/SW Co-Design. In G. de Micheli, R. Ernst and W. Wolf (eds.), Readings in HW\/SW Co-Design, Morgan-Kaufmann, 2002."},{"key":"1199_CR10","doi-asserted-by":"crossref","unstructured":"Desmet, D., D. Verkest, and H. de Man. Operating System Based Software Generation for Systems-on-Chip, In Proc. of DATE, IEEE, 2000.","DOI":"10.1145\/337292.337509"},{"key":"1199_CR11","unstructured":"Edenfeld, W., A. Kahng, M. Rodgers, and Y. Zorian. 2003 Technology Roadmap for Semiconductors. IEEE Computer, January 2004."},{"key":"1199_CR12","doi-asserted-by":"crossref","unstructured":"Edwards, S., L. Lavagno, E.A. Lee, and A. SanGiovanni-Vicentelli. Design of Embedded Systems: Formal Models, Validation and Synthesis. In G. de Micheli, R. Ernst and W. Wolf (eds.), Readings in HW\/SW Co-Design, Morgan-Kaufmann, 2002.","DOI":"10.1016\/B978-155860702-6\/50009-0"},{"key":"1199_CR13","doi-asserted-by":"crossref","unstructured":"EN 301.245, ETSI, December, 1997.","DOI":"10.1590\/S1020-49891997000300020"},{"key":"1199_CR14","doi-asserted-by":"crossref","unstructured":"Gauthier, L., S. Yoo, and A. Jerraya. Automatic Generation and Targeting of Application Specific Operating Systems and Embedded System Software. In Proc. of DATE, IEEE, 2001.","DOI":"10.1109\/DATE.2001.915098"},{"key":"1199_CR15","doi-asserted-by":"crossref","unstructured":"Giusto, P., G. Martin, and E. Harcourt. Reliable Estimation of Execution Time of Embedded Software. In Proc. of DATE, IEEE, 2001.","DOI":"10.1109\/DATE.2001.915082"},{"key":"1199_CR16","unstructured":"Gr\u00f6tker, T., S. Liao, G. Mart\u00edn, and S. Swan. System Design with SystemC. Kluwer, 2002."},{"key":"1199_CR17","doi-asserted-by":"crossref","unstructured":"Hergenhan, A. and W. Rosenstiel. Static Timing Analysis of Embedded Software on Advanced Processor Architectures. In Proc. of DATE, IEEE, 2000.","DOI":"10.1145\/343647.343846"},{"key":"1199_CR18","unstructured":"Herrera, F., H. Posadas, P. S\u00e1nchez, and E. Villar. Systematic Embedded Software Generation from SystemC. In A. Jerraya, S. Yoo, D. Verkest and N. Wehn (eds.), Embedded Software for SoC, Kluwer, 2003."},{"key":"1199_CR19","doi-asserted-by":"crossref","unstructured":"Herrera, F., P. S\u00e1nchez, and E. Villar. Modeling of CSP, KPN and SR Systems with SystemC. In C. Grimm (ed.), Languages for System Specification. CHDL Series, Kluwer, 2004.","DOI":"10.1007\/1-4020-7991-5_9"},{"key":"1199_CR20","doi-asserted-by":"crossref","unstructured":"Herrera, F., P. S\u00e1nchez, and E. Villar. Heterogeneous System-Level Specification in SystemC. In P. Boulet (ed.), Advances in Design and Specification Languages for SoC. CHDL Series, Springer, 2005.","DOI":"10.1007\/0-387-26151-6_15"},{"key":"1199_CR21","doi-asserted-by":"crossref","unstructured":"Jerraya, A.A. and W. Wolf. Hardware\/Software Interface Codesign for Embedded Systems. IEEE Computer, February 2005.","DOI":"10.1109\/MC.2005.61"},{"key":"1199_CR22","doi-asserted-by":"crossref","unstructured":"Jersak, M. and R. Ernst. Enabling Scheduling Analysis of Heterogeneous Systems with Multi-Rate Data Dependencies and Rate Intervals. In Proc. of DAC, IEEE, 2003.","DOI":"10.1145\/775832.775951"},{"key":"1199_CR23","doi-asserted-by":"crossref","unstructured":"Jiang, Y. and R. Brayton. Software Synthesis from Synchronous Specifications Using Logic Simulation Techniques. In Proc. of DAC, IEEE, 2002.","DOI":"10.1145\/513918.514002"},{"key":"1199_CR24","doi-asserted-by":"crossref","unstructured":"Lee, E.A. What\u2019s Ahead for Embedded Software?. IEEE Computer, September 2000.","DOI":"10.1109\/2.868693"},{"key":"1199_CR25","doi-asserted-by":"crossref","unstructured":"Lee, J.Y. and I. Park. Timed Compiled-Code Simulation of Embedded Software for Performance Analysis of SoC Design. In Proc. of DAC, IEEE, 2002.","DOI":"10.1145\/513918.513994"},{"key":"1199_CR26","doi-asserted-by":"crossref","first-page":"89","DOI":"10.1023\/A:1019747531714","volume":"7","author":"H. Liu","year":"2002","unstructured":"Liu, H. and X.S. Hu. Processor Utilization Bounds for Real-Time Systems with Precedence Constraints. Design Automation for Embedded Systems, vol. 7, pp. 89\u2013113, 2002.","journal-title":"Design Automation for Embedded Systems"},{"key":"1199_CR27","doi-asserted-by":"crossref","unstructured":"Malik, S., M. Martonosi, and Y.-T.S. Li. Static Timing Analysis of Embedded Software. In Proc. of DAC, IEEE, 1997.","DOI":"10.1145\/266021.266052"},{"key":"1199_CR28","unstructured":"Marwedel, P. and G. Goossens. Code Generation for Embedded Processors. Kluwer, 1995."},{"key":"1199_CR29","unstructured":"Marwedel, P. Embedded System Design. Kluwer, 2003."},{"key":"1199_CR30","doi-asserted-by":"crossref","unstructured":"Mathur, A., A. Dasdan, and R. Gupta. Rate Analysis for Embedded Systems. In G. de Micheli, R. Ernst, and W. Wolf (eds.), Readings in HW\/SW Co-Design. Morgan-Kaufmann, 2002.","DOI":"10.1016\/B978-155860702-6\/50018-1"},{"key":"1199_CR31","first-page":"217","volume":"18","author":"F. Mueller","year":"2000","unstructured":"Mueller, F. Timing Analysis for Instructions Caches. Int. Journal of Time-Critical Computing Systems, vol. 18, pp. 217\u2013247, 2000.","journal-title":"Int. Journal of Time-Critical Computing Systems"},{"key":"1199_CR32","doi-asserted-by":"crossref","unstructured":"M\u00fcller, W., W. Rosenstiel, and J. Ruf. SystemC. Methodologies and Applications. Kluwer, 2003.","DOI":"10.1007\/b105968"},{"key":"1199_CR33","doi-asserted-by":"crossref","unstructured":"Posadas, H., F. Herrera, P. S\u00e1nchez, E. Villar, and F. Blasco. System-Level Performance Analysis in SystemC. In Proc. of DATE, IEEE, 2004.","DOI":"10.1109\/DATE.2004.1268876"},{"key":"1199_CR34","doi-asserted-by":"crossref","unstructured":"Puschner, P. and C. Koza. Calculating the Maximum Execution Time of Real-Time Programs. The Journal of Real-Time Systems, no. 1, 1989.","DOI":"10.1007\/BF00571421"},{"key":"1199_CR35","doi-asserted-by":"crossref","unstructured":"Richter, K., M. Jersak, and R. Ernst. A Formal Approach to MpSoC Performance Verification. IEEE Computer, April 2003.","DOI":"10.1109\/MC.2003.1193230"},{"key":"1199_CR36","doi-asserted-by":"crossref","unstructured":"SanGiovanni-Vicentelli, A. and G. Martin. Platform-Based Design and Software Design Methodology for Embedded Systems. IEEE Design and Test of Computer, November-December 2001.","DOI":"10.1109\/54.970421"},{"key":"1199_CR37","doi-asserted-by":"crossref","unstructured":"Sgroi, M., L. Lavagno, Y. Watanabe, and A. SanGiovanni-Vicentelli. Synthesis of Embedded Software Using Free-Choice Petri Nets. In Proc. of DAC, IEEE, 1999.","DOI":"10.1145\/309847.310073"},{"key":"1199_CR38","unstructured":"Sirpatil, B. Software Synthesis of SystemC Models. Master thesis, Virginia Polytechnic Institute and State University, 2002."},{"key":"1199_CR39","doi-asserted-by":"crossref","unstructured":"Villar, E. and P. S\u00e1nchez. Synthesis Applications of VHDL. In J. Mermet (ed.), Fundamentals and Standards in Hardware Description Languages. Kluwer, 1993.","DOI":"10.1007\/978-94-011-1914-6_7"},{"key":"1199_CR40","doi-asserted-by":"crossref","unstructured":"Wehmeyer, L. and P. Marvedel. Influence of Memory Hierarchies on Predictability of Time Constrained Embedded Software. In Proc. of DATE, IEEE, 2005.","DOI":"10.1109\/DATE.2005.183"},{"key":"1199_CR41","doi-asserted-by":"crossref","unstructured":"Wenzel, I., B. Rieder, R. Kirner, and P. Puschner. Automatic Timing Model Generation by CFG Partitioning and Model Checking. In Proc. of DATE, IEEE, 2005.","DOI":"10.1109\/DATE.2005.76"},{"key":"1199_CR42","doi-asserted-by":"crossref","unstructured":"Wolf, F. Behavioral Intervals in Embedded Software. Kluwer, 2002.","DOI":"10.1007\/978-1-4757-3649-6"},{"key":"1199_CR43","doi-asserted-by":"crossref","first-page":"271","DOI":"10.1023\/A:1019734423460","volume":"7","author":"F. Wolf","year":"2002","unstructured":"Wolf, F., J. Staschulat, and R. Ernst. Hybrid Cache Analysis in Running Time Verification of Embedded Software. Design Automation for Embedded Systems, vol. 7, pp. 271\u201395, 2002.","journal-title":"Design Automation for Embedded Systems"},{"key":"1199_CR44","doi-asserted-by":"crossref","unstructured":"Yoo, S., G. Nicolescu, L. Gauthier, and A. Jerraya. Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design. In Proc. of DATE, IEEE, 2002.","DOI":"10.1109\/DATE.2002.998365"},{"key":"1199_CR45","doi-asserted-by":"crossref","unstructured":"Yu, H., R. D\u00f6mer, and D.D. Gajski. Embedded Software Generation from System Level Design Languages. In Proc. of ASPDAC, IEEE, 2004.","DOI":"10.1109\/ASPDAC.2004.1337620"}],"container-title":["Design Automation for Embedded Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-005-1199-z.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10617-005-1199-z\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-005-1199-z","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,4,8]],"date-time":"2020-04-08T12:02:55Z","timestamp":1586347375000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10617-005-1199-z"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004,12]]},"references-count":45,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2004,12]]}},"alternative-id":["1199"],"URL":"https:\/\/doi.org\/10.1007\/s10617-005-1199-z","relation":{},"ISSN":["0929-5585","1572-8080"],"issn-type":[{"value":"0929-5585","type":"print"},{"value":"1572-8080","type":"electronic"}],"subject":[],"published":{"date-parts":[[2004,12]]}}}