{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,31]],"date-time":"2022-03-31T09:04:07Z","timestamp":1648717447181},"reference-count":29,"publisher":"Springer Science and Business Media LLC","issue":"2-3","license":[{"start":{"date-parts":[[2007,9,1]],"date-time":"2007-09-01T00:00:00Z","timestamp":1188604800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Des Autom Embed Syst"],"published-print":{"date-parts":[[2007,9]]},"DOI":"10.1007\/s10617-007-9004-9","type":"journal-article","created":{"date-parts":[[2007,7,17]],"date-time":"2007-07-17T00:11:55Z","timestamp":1184631115000},"page":"167-191","source":"Crossref","is-referenced-by-count":8,"title":["Scheduling with accurate communication delay model and scheduler implementation for multiprocessor system-on-chip"],"prefix":"10.1007","volume":"11","author":[{"given":"Youngchul","family":"Cho","sequence":"first","affiliation":[]},{"given":"Nacer-Eddine","family":"Zergainoh","sequence":"additional","affiliation":[]},{"given":"Sungjoo","family":"Yoo","sequence":"additional","affiliation":[]},{"given":"Ahmed Amine","family":"Jerraya","sequence":"additional","affiliation":[]},{"given":"Kiyoung","family":"Choi","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2007,9,1]]},"reference":[{"issue":"9","key":"9004_CR1","doi-asserted-by":"publisher","first-page":"822","DOI":"10.1109\/TSE.2002.1033223","volume":"28","author":"A Baghdadi","year":"2002","unstructured":"Baghdadi A, Zergainoh N-E, Ces\u00e1rio W, Jerraya A (2002) Combining a performance estimation methodology with a hardware\/software codesign flow supporting multiprocessor systems. IEEE Trans Softw Eng 28(9):822\u2013831","journal-title":"IEEE Trans Softw Eng"},{"key":"9004_CR2","doi-asserted-by":"crossref","unstructured":"Ces\u00e1rio W, Baghdadi A, Gauthier L, Lyonnard D, Nicolescu G, Paviot Y, Yoo S, Jerraya A, Diaz-Nava M (2002) Component-based design approach for multicore SoCs. Proc Des Autom Conf, pp\u00a0789\u2013794","DOI":"10.1145\/513918.514115"},{"issue":"1","key":"9004_CR3","doi-asserted-by":"publisher","first-page":"21","DOI":"10.1109\/92.273146","volume":"2","author":"Y-Y Chen","year":"1994","unstructured":"Chen Y-Y, Hsu Y-C, Kin C-T (1994) MULTIPAR: Behavioral partition for synthesizing multiprocessor architectures. IEEE Trans Very Large Scale Integration (VLSI) Syst 2(1):21\u201332","journal-title":"IEEE Trans Very Large Scale Integration (VLSI) Syst"},{"key":"9004_CR4","unstructured":"Cho Y, Lee G, Yoo S, Choi K, Zergainoh N-E (2003) Scheduling and timing analysis of HW\/SW on-chip communication in MP SoC design. In: Proceedings of design automation and test in Europe conference, pp\u00a0132\u2013137, supplement"},{"key":"9004_CR5","doi-asserted-by":"crossref","unstructured":"Cho Y, Zergainoh N-E, Yoo S, Choi K, Jerraya A (2005) Scheduler implementation in MP SoC design. In: Proceedings of Asia and South Pacific design automation conference, pp 151\u2013156","DOI":"10.1145\/1120725.1120793"},{"key":"9004_CR6","doi-asserted-by":"crossref","unstructured":"Colin J-Y, Nakechbandi M (1999) Scheduling tasks with communication delays on a two-level virtual distributed system. In: Proceedings of euromicro workshop on parallel and distributed processing, pp\u00a0344\u2013348","DOI":"10.1109\/EMPDP.1999.746698"},{"issue":"8","key":"9004_CR7","doi-asserted-by":"publisher","first-page":"825","DOI":"10.1109\/71.790600","volume":"10","author":"RC Correa","year":"1999","unstructured":"Correa RC, Ferreira A, Rebreyend P (1999) Scheduling multiprocessor tasks with genetic algorithm. IEEE Trans Parallel Distributed Syst 10(8):825\u2013837","journal-title":"IEEE Trans Parallel Distributed Syst"},{"key":"9004_CR8","doi-asserted-by":"crossref","unstructured":"Dally WJ, Towles B (2001) Route Packet, not wires: on-chip interconnection networks. In: Proceedings of design automation conference, pp 684\u2013689","DOI":"10.1109\/DAC.2001.935594"},{"key":"9004_CR9","doi-asserted-by":"crossref","unstructured":"Engels M, Meng TH (1994) Rapid prototyping of a real-time video encoder. In: Proceedings of international workshop on rapid system prototyping, pp 8\u201315","DOI":"10.1109\/IWRSP.1994.315914"},{"key":"9004_CR10","doi-asserted-by":"crossref","unstructured":"Falsafi B, Wood DA (1997) Scheduling communication on an SMP node parallel machine. In: Proceedings of internal symposium on high-performance computer architecture, pp 128\u2013138","DOI":"10.1109\/HPCA.1997.569649"},{"issue":"1","key":"9004_CR11","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/298865.298866","volume":"4","author":"M Gasteier","year":"1999","unstructured":"Gasteier M, Glesner M (1999) Bus-based communication synthesis on system-level. ACM Trans Des Autom Electron Syst 4(1):1\u201311","journal-title":"ACM Trans Des Autom Electron Syst"},{"issue":"3","key":"9004_CR12","doi-asserted-by":"publisher","first-page":"55","DOI":"10.1109\/MM.2004.1","volume":"24","author":"F Karim","year":"2004","unstructured":"Karim F, Mellan A, Nguyen A, Aydonat U, Abdelrahman TS (2004) A multilevel computing architecture for embedded multimedia applications. IEEE Micro 24(3):55\u201366","journal-title":"IEEE Micro"},{"issue":"5","key":"9004_CR13","doi-asserted-by":"publisher","first-page":"539","DOI":"10.1109\/TVLSI.2004.842912","volume":"13","author":"S Kim","year":"2005","unstructured":"Kim S, Im C, Ha S (2005) Schedule-aware performance estimation of communication architecture for efficient design space exploration. IEEE Trans Very Large Scale Integration (VLSI) Syst. 13(5):539\u2013552","journal-title":"IEEE Trans Very Large Scale Integration (VLSI) Syst."},{"key":"9004_CR14","unstructured":"Kleinsmith J, Gajski D (1998) Communication synthesis for reuse, UC Irvine. Technical Report ICS-TR-98-06"},{"issue":"8","key":"9004_CR15","doi-asserted-by":"publisher","first-page":"1077","DOI":"10.1109\/43.775629","volume":"18","author":"P Knudsen","year":"1999","unstructured":"Knudsen P, Madsen J (1999) Integrating communication protocol selection with hardware\/software codesign. IEEE Trans Comput Aided Des Integr Circuits Syst 18(8):1077\u20131095","journal-title":"IEEE Trans Comput Aided Des Integr Circuits Syst"},{"issue":"6","key":"9004_CR16","doi-asserted-by":"publisher","first-page":"768","DOI":"10.1109\/43.924830","volume":"20","author":"K Lahiri","year":"2001","unstructured":"Lahiri K, Raghunathan A, Dey S (2001) System-level performance analysis for designing on-chip communication architecture. IEEE Trans Comput Aided Des Integr Circuits Syst 20(6):768\u2013783","journal-title":"IEEE Trans Comput Aided Des Integr Circuits Syst"},{"issue":"1","key":"9004_CR17","doi-asserted-by":"publisher","first-page":"24","DOI":"10.1109\/TC.1987.5009446","volume":"36","author":"EA Lee","year":"1987","unstructured":"Lee EA, Messerschmitt DG (1987) Static scheduling of synchronous data flow programs for digital signal processing. IEEE Trans Comput 36(1):24\u201335","journal-title":"IEEE Trans Comput"},{"key":"9004_CR18","doi-asserted-by":"crossref","unstructured":"Mooney V, Sakamoto T, De Micheli G (1997) Run-time scheduler synthesis for hardware-software systems and application to robot control design. In: Proceedings of international workshop on hardware\/software codesign, pp 95\u201399","DOI":"10.1109\/HSC.1997.584586"},{"key":"9004_CR19","doi-asserted-by":"crossref","unstructured":"Narayan S, Gajski D (1994) Synthesis of system-level bus interfaces. In: Proceedings of the European design and test conference, pp 395\u2013399","DOI":"10.1109\/EDTC.1994.326846"},{"key":"9004_CR20","doi-asserted-by":"crossref","unstructured":"Ortega R, Borriello G (1998) Communication synthesis for distributed embedded systems. In: Proceedings of international conference on computer aided design, pp 437\u2013444","DOI":"10.1145\/288548.289067"},{"key":"9004_CR21","doi-asserted-by":"crossref","unstructured":"Paul JM, Bobrek A, Nelson JE, Pieper JJ, Thomas DE (2003) Schedulers as model-based design elements in programmable heterogeneous multiprocessors In: Proceedings of design automation conference, pp 408\u2013411","DOI":"10.1145\/775832.775938"},{"issue":"3","key":"9004_CR22","doi-asserted-by":"publisher","first-page":"260","DOI":"10.1109\/71.993206","volume":"13","author":"H Topcuoglu","year":"2002","unstructured":"Topcuoglu H, Hariri S, Wu M-Y (2002) Performance-effective and low-complexity task scheduling for heterogeneous computing. IEEE Trans Parallel Distrib Syst 13(3):260\u2013274","journal-title":"IEEE Trans Parallel Distrib Syst"},{"key":"9004_CR23","unstructured":"Yen T-Y, Wolf W (1995) Communication synthesis for distributed embedded systems. In: Proceedings of international conference on computer aided design, pp\u00a064\u201369"},{"key":"9004_CR24","unstructured":"Yoo S, Lee J, Jung J, Na K, Cho Y, Choi K (1999) Fast prototyping of an IS-95 CDMA cellular phone: a case study. In: Proceedings of Asia Pacific conference on hard description languages, pp\u00a061\u201366"},{"key":"9004_CR25","unstructured":"ARM Inc. ARM9TM FAMILY, available in http:\/\/www.arm.com\/"},{"key":"9004_CR26","unstructured":"ARM Inc. AMBATM Specification (Rev 2.0), available in http:\/\/www.arm.com\/"},{"key":"9004_CR27","unstructured":"Mentor Graphics Inc., Seamless CVE, available in http:\/\/www.mentor.com\/seamless\/"},{"key":"9004_CR28","unstructured":"NEC Inc., IC memory selection guide, available in http:\/\/www.nec.com"},{"key":"9004_CR29","unstructured":"Redhat Inc., eCos, available in http:\/\/www.redhat.com\/embedded\/technologies\/ecos\/"}],"container-title":["Design Automation for Embedded Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-007-9004-9.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10617-007-9004-9\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-007-9004-9","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-007-9004-9.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,30]],"date-time":"2019-05-30T19:29:33Z","timestamp":1559244573000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10617-007-9004-9"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,9]]},"references-count":29,"journal-issue":{"issue":"2-3","published-print":{"date-parts":[[2007,9]]}},"alternative-id":["9004"],"URL":"https:\/\/doi.org\/10.1007\/s10617-007-9004-9","relation":{},"ISSN":["0929-5585","1572-8080"],"issn-type":[{"value":"0929-5585","type":"print"},{"value":"1572-8080","type":"electronic"}],"subject":[],"published":{"date-parts":[[2007,9]]}}}