{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,12,30]],"date-time":"2022-12-30T22:14:12Z","timestamp":1672438452779},"reference-count":47,"publisher":"Springer Science and Business Media LLC","issue":"4","license":[{"start":{"date-parts":[[2007,12,1]],"date-time":"2007-12-01T00:00:00Z","timestamp":1196467200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Des Autom Embed Syst"],"published-print":{"date-parts":[[2007,12]]},"DOI":"10.1007\/s10617-007-9009-4","type":"journal-article","created":{"date-parts":[[2007,11,26]],"date-time":"2007-11-26T15:11:36Z","timestamp":1196089896000},"page":"249-283","source":"Crossref","is-referenced-by-count":7,"title":["Memory-efficient multithreaded code generation from\u00a0Simulink for heterogeneous MPSoC"],"prefix":"10.1007","volume":"11","author":[{"given":"Sang-Il","family":"Han","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Soo-Ik","family":"Chae","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lisane","family":"Brisolara","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luigi","family":"Carro","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ricardo","family":"Reis","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xavier","family":"Gu\u00e9rin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ahmed Amine","family":"Jerraya","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2007,12,1]]},"reference":[{"key":"9009_CR1","doi-asserted-by":"crossref","unstructured":"Jerraya AA, Wolf W, Tenhunen H (eds) (2005) IEEE Comput, Special issue on MPSoC 38(7):36\u201340","DOI":"10.1109\/MC.2005.231"},{"key":"9009_CR2","unstructured":"Cradle CT3600 Family\u2122. http:\/\/www.cradle.com\/products\/sil_3600_family.shtml"},{"key":"9009_CR3","unstructured":"IBM Cell\u2122. http:\/\/www-128.ibm.com\/developerworks\/power\/cell\/"},{"key":"9009_CR4","doi-asserted-by":"crossref","unstructured":"Ravikumar CP (2004) Multiprocessor architectures for embedded system-on-chip applications, vlsid. In: 17th international conference on VLSI design, p\u00a0512","DOI":"10.1109\/ICVD.2004.1260972"},{"issue":"12","key":"9009_CR5","doi-asserted-by":"publisher","first-page":"1523","DOI":"10.1109\/43.898830","volume":"19","author":"K Keutzer","year":"2000","unstructured":"Keutzer K, Malik S, Newton R, Rabaey J, Sangiovanni-Vincentelli A (2000) System-level design: orthogonalization of concerns and platform-based design. IEEE Trans Comput-Aided Des Integr Circuits Syst 19(12):1523\u20131543","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"},{"key":"9009_CR6","unstructured":"International technology roadmap for semiconductors (ITRS) (2001). http:\/\/public.itrs.net"},{"key":"9009_CR7","unstructured":"Simulink mathworks. http:\/\/www.mathworks.com"},{"key":"9009_CR8","doi-asserted-by":"crossref","unstructured":"Han SI, Guerin X, Chae S-I, Jerraya AA (2006) Buffer memory optimization for video codec application modeled in Simulink. In: Proceedings of DAC\u201906, San Francisco, July 2006, pp\u00a0689\u2013694","DOI":"10.1145\/1146909.1147084"},{"key":"9009_CR9","unstructured":"Kahn G, MacQueen DB (1977) Coroutines and networks of parallel processes. In: Gilchrist\u00a0B (ed) Proceedings of the information processing, vol\u00a077. Toronto, Canada, pp\u00a0993\u2013998"},{"issue":"5","key":"9009_CR10","doi-asserted-by":"publisher","first-page":"773","DOI":"10.1109\/5.381846","volume":"83","author":"EA Lee","year":"1995","unstructured":"Lee EA, Parks TM (1995) Dataflow process networks. Proc IEEE 83(5):773\u2013801","journal-title":"Proc IEEE"},{"key":"9009_CR11","doi-asserted-by":"crossref","unstructured":"Buck JT (1993) Scheduling dynamic dataflow graphs with bounded memory using the token flow model. PhD\u00a0thesis, University of California, EECS Dept., Berkeley, CA. Technical Memorandum UCB\/ERL M93\/69","DOI":"10.1109\/ICASSP.1993.319147"},{"issue":"1","key":"9009_CR12","doi-asserted-by":"publisher","first-page":"64","DOI":"10.1109\/JPROC.2002.805826","volume":"91","author":"A Benveniste","year":"2003","unstructured":"Benveniste A, Caspi P, Edwards SA, Halbwachs N, Le Guernic P, de Simone R (2003) The synchronous languages 12\u00a0years later. Proc IEEE 91(1):64\u201383","journal-title":"Proc IEEE"},{"key":"9009_CR13","doi-asserted-by":"crossref","unstructured":"Kopetz H (1998) The time-triggered architecture. In: Proceedings of ISORC\u201998, Kyoto, Japan","DOI":"10.1109\/ISORC.1998.666765"},{"key":"9009_CR14","doi-asserted-by":"crossref","unstructured":"Benveniste A, Carloni L, Caspi P, Sangiovanni-Vincentelli A (2003) Heterogeneous reactive systems modeling and correct-by-construction deployment. In: Proceedings of the third international conference on embedded software","DOI":"10.1007\/978-3-540-45212-6_4"},{"key":"9009_CR15","doi-asserted-by":"crossref","unstructured":"Han S-I, Chae S-I, Jerraya AA (2006) Functional modeling techniques for efficient SW code generation of video codec application. In: Proceedings of ASP-DAC\u201906, Japan, January 2006, pp\u00a0935\u2013940","DOI":"10.1145\/1118299.1118509"},{"issue":"3","key":"9009_CR16","doi-asserted-by":"publisher","first-page":"197","DOI":"10.1023\/A:1012231429554","volume":"29","author":"P Lieverse","year":"2001","unstructured":"Lieverse P, Van Der Wolf P, Vissers K, Deprettere E (2001) A methodology for architecture exploration of heterogeneous signal processing systems. J\u00a0VLSI Signal Process Signal Image Video Technol 29(3):197\u2013207","journal-title":"J\u00a0VLSI Signal Process Signal Image Video Technol"},{"issue":"2","key":"9009_CR17","doi-asserted-by":"publisher","first-page":"99","DOI":"10.1109\/TC.2006.16","volume":"55","author":"AD Pimentel","year":"2006","unstructured":"Pimentel AD, Erbas C, Polstra S (2006) A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Trans Comput 55(2):99\u2013112","journal-title":"IEEE Trans Comput"},{"key":"9009_CR18","unstructured":"Artemis project. http:\/\/ce.et.tudelft.nl\/artemis\/"},{"key":"9009_CR19","doi-asserted-by":"crossref","unstructured":"Dwivedi SK, Kumar A, Balakrishnan M (2004) Automatic synthesis of system on chip multiprocessor architectures for process networks. In: Proceedings of CODES+ISSS\u201904, Sweden, September 2004, pp\u00a060\u201365","DOI":"10.1145\/1016720.1016737"},{"key":"9009_CR20","unstructured":"Open systemc initiative. Online available at http:\/\/www.systemc.org\/"},{"key":"9009_CR21","doi-asserted-by":"crossref","unstructured":"Herrera F, Posadas H, Sanchez P, Villar E (2003) Systematic embedded software generation from SystemC. In: Proceedings of DATE\u201903","DOI":"10.1109\/DATE.2003.1253600"},{"key":"9009_CR22","doi-asserted-by":"crossref","unstructured":"Yu H, Doemer R, Gajski D (2004) Embedded software generation from system-level design languages. In: Proceedings of ASP-DAC\u201904","DOI":"10.1109\/ASPDAC.2004.1337620"},{"key":"9009_CR23","first-page":"155","volume":"4","author":"JT Buck","year":"2004","unstructured":"Buck JT, Ha S, Lee EA, Messerschmitt DG (2004) Ptolemy: a framework for simulating and prototyping heterogeneous systems. Int J Comput Simul 4:155\u2013182","journal-title":"Int J Comput Simul"},{"key":"9009_CR24","unstructured":"Pino JL, Bhattacharyya SS, Lee EA (1995) A hierarchical multiprocessor scheduling system for DSP applications. In: Proceedings of the IEEE asilomar conference on signals, systems, and computers, November 1995"},{"key":"9009_CR25","doi-asserted-by":"crossref","unstructured":"Banerjee P, Shenoy N, Choudhary A, Hauck S, Bachmann C, Haldar M, Joisha P, Jones A, Kanhare A, Nayak A, Periyacheri S, Walkden M, Zaretsky D (2000) A\u00a0MATLAB compiler for distributed, heterogeneous, reconfigurable computing systems. In: Proceedings of FCCM\u201900, California, April 2000","DOI":"10.1109\/FPGA.2000.903391"},{"key":"9009_CR26","unstructured":"Real-time workshop. Mathworks. http:\/\/www.mathworks.com"},{"key":"9009_CR27","unstructured":"RTI-MP. http:\/\/www.dspaceinc.com\/ww\/en\/inc\/home\/products\/sw\/impsw\/rtimpblo.cfm"},{"issue":"2","key":"9009_CR28","doi-asserted-by":"publisher","first-page":"177","DOI":"10.1109\/43.908427","volume":"20","author":"PK Murthy","year":"2001","unstructured":"Murthy PK, Bhattacharyya SS (2001) Shared buffer implementations of signal processing systems using lifetime analysis techniques. IEEE Trans Comput-Aided Des Integr Circuits Syst 20(2):177\u2013198","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"},{"key":"9009_CR29","doi-asserted-by":"publisher","first-page":"514","DOI":"10.1155\/S1110865703212130","volume":"2003","author":"H Oh","year":"2003","unstructured":"Oh H, Ha S (2003) Memory-optimized software synthesis from dataflow program graphs with large size data samples. EURASIP J Appl Signal Process 2003:514\u2013529","journal-title":"EURASIP J Appl Signal Process"},{"key":"9009_CR30","doi-asserted-by":"crossref","unstructured":"Ritz S, Willems M, Meyr H (1995) Scheduling for optimum data memory compaction in block diagram oriented software synthesis. In: Proceedings of ICASS\u201995, Detroit, May 1995, pp\u00a02651\u20132653","DOI":"10.1109\/ICASSP.1995.480106"},{"issue":"2","key":"9009_CR31","first-page":"157","volume":"3","author":"F Balasa","year":"1995","unstructured":"Balasa F, Catthoor F, De Man H (1995) Background memory area estimation for multidimensional signal processing systems. IEEE Trans. Comput. Des. Integr. Circuits Syst. 3(2):157\u2013172","journal-title":"IEEE Trans. Comput. Des. Integr. Circuits Syst."},{"issue":"6","key":"9009_CR32","doi-asserted-by":"publisher","first-page":"719","DOI":"10.1109\/76.728414","volume":"8","author":"E Greef De","year":"1998","unstructured":"De Greef E, Catthoor F, De Man H (1998) Program transformation strategies for memory size and power reduction of pseudo-regular multimedia subsystems. IEEE Trans Circuits Syst Video Technol 8(6):719\u2013733","journal-title":"IEEE Trans Circuits Syst Video Technol"},{"key":"9009_CR33","doi-asserted-by":"crossref","unstructured":"Greef ED, Catthoor F, Man HD (1997) Array placement for storage size reduction in embedded multimedia systems. In: Proceedings of ASAP\u201997, Zurich, July 1997","DOI":"10.1109\/ASAP.1997.606813"},{"issue":"8","key":"9009_CR34","doi-asserted-by":"publisher","first-page":"83","DOI":"10.1145\/872732.806957","volume":"14","author":"J Fabri","year":"1979","unstructured":"Fabri J (1979) Automatic storage optimization. ACM SIGPLAN\u201979 Not 14(8):83\u201391","journal-title":"ACM SIGPLAN\u201979 Not"},{"key":"9009_CR35","unstructured":"Zhu J (2001) Static memory allocation by pointer analysis and coloring. In: Proceedings of DATE\u201901, Munich, March 2001, pp 785\u2013790"},{"key":"9009_CR36","doi-asserted-by":"crossref","unstructured":"Joisha PG, Banerjee P (2003) Static array storage optimization in MATLAB. In: ACM SIGPLAN 2003, California, pp\u00a0258\u2013268","DOI":"10.1145\/781131.781160"},{"key":"9009_CR37","volume-title":"Modeling embedded systems and SoCs\u2014concurrency and time in models of computation","author":"A Jantsch","year":"2003","unstructured":"Jantsch A (2003) Modeling embedded systems and SoCs\u2014concurrency and time in models of computation. Kaufmann, Los Altos"},{"issue":"12","key":"9009_CR38","doi-asserted-by":"publisher","first-page":"1217","DOI":"10.1109\/43.736561","volume":"17","author":"EA Lee","year":"1998","unstructured":"Lee EA, Sangiovanni-Vincentelli A (1998) A framework for comparing models of computation. IEEE Trans CAD Integr Circuits Syst 17(12):1217\u20131229","journal-title":"IEEE Trans CAD Integr Circuits Syst"},{"issue":"5","key":"9009_CR39","doi-asserted-by":"publisher","first-page":"18","DOI":"10.1109\/54.953268","volume":"18","author":"WO Cesario","year":"2001","unstructured":"Cesario WO, Nicolescu G, Gauthier L, Lyonnard D, Jerraya AA (2001) Colif: a design representation for application-specific multiprocessor SoC. IEEE Des Test Comput 18(5):18\u201320","journal-title":"IEEE Des Test Comput"},{"key":"9009_CR40","unstructured":"Cormen TH, Leiserson CE, Rivest RL (1990) Introduction to algorithms. MIT Press, Cambridge, pp\u00a0329\u2013355"},{"key":"9009_CR41","unstructured":"Tensilica Xtensa V. http:\/\/www.tensilica.com"},{"key":"9009_CR42","unstructured":"Mathworks Inc. Tips for optimizing the generated code. In: Real-time workshop embedded coder\u00a05, pp\u00a084\u201394. http:\/\/www.mathworks.com"},{"key":"9009_CR43","doi-asserted-by":"crossref","unstructured":"Huang K, Han S-I, Popovici K, Brisolara L, Guerin X, Li L, Yan X, Chae S-I, Carro L, Jerraya AA (2007) Simulink-based MPSoC design flow: case study of motion-JPEG and H.264. In: Proceedings of DAC\u201907, San Diego, June 2007, pp\u00a039\u201342","DOI":"10.1145\/1278480.1278491"},{"issue":"3","key":"9009_CR44","doi-asserted-by":"publisher","first-page":"30","DOI":"10.1109\/MS.2003.1196317","volume":"20","author":"WA Wood","year":"2003","unstructured":"Wood WA, Kleb WL (2003) Exploring XP for scientific research. IEEE Soft 20(3):30\u201336","journal-title":"IEEE Soft"},{"key":"9009_CR45","unstructured":"Tensilica. XPRES compiler. http:\/\/www.tensilica.com\/products\/xpres.htm"},{"issue":"10","key":"9009_CR46","doi-asserted-by":"publisher","first-page":"37","DOI":"10.1109\/2.467577","volume":"28","author":"P Banerjee","year":"1995","unstructured":"Banerjee P, Chandy JA, Gupta M, Hodges IV EW, Holm JG, Lain A, Palermo DJ, Ramaswamy S, Su E (1995) The paradigm compiler for distributed-memory multicomputers. Computer 28(10):37\u201347","journal-title":"Computer"},{"key":"9009_CR47","unstructured":"POSIX 1003.1c threading, IEEE POSIX 1003.1c-1995, ISO\/IEC 9945-1:1996"}],"container-title":["Design Automation for Embedded Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-007-9009-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10617-007-9009-4\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-007-9009-4","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-007-9009-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,30]],"date-time":"2019-05-30T19:29:33Z","timestamp":1559244573000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10617-007-9009-4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,12]]},"references-count":47,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2007,12]]}},"alternative-id":["9009"],"URL":"https:\/\/doi.org\/10.1007\/s10617-007-9009-4","relation":{},"ISSN":["0929-5585","1572-8080"],"issn-type":[{"value":"0929-5585","type":"print"},{"value":"1572-8080","type":"electronic"}],"subject":[],"published":{"date-parts":[[2007,12]]}}}