{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,10,14]],"date-time":"2023-10-14T06:39:00Z","timestamp":1697265540300},"reference-count":20,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2011,4,5]],"date-time":"2011-04-05T00:00:00Z","timestamp":1301961600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Des Autom Embed Syst"],"published-print":{"date-parts":[[2011,6]]},"DOI":"10.1007\/s10617-011-9074-6","type":"journal-article","created":{"date-parts":[[2011,4,4]],"date-time":"2011-04-04T09:41:44Z","timestamp":1301910104000},"page":"111-132","source":"Crossref","is-referenced-by-count":6,"title":["A scalable built-in self-recovery (BISR) VLSI architecture and design methodology for 2D-mesh based on-chip networks"],"prefix":"10.1007","volume":"15","author":[{"given":"Kun-Chih","family":"Chen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shu-Yen","family":"Lin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wen-Chung","family":"Shen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"An-Yeu","family":"Wu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2011,4,5]]},"reference":[{"key":"9074_CR1","doi-asserted-by":"crossref","first-page":"418","DOI":"10.1109\/DATE.2002.998307","volume-title":"IEEE proceedings of the conference on design, automation and test in Europe conference and exhibition","author":"L Benini","year":"2002","unstructured":"Benini L, Micheli GD (2002) Network on chip: a new paradigm for systems on chip design. In: IEEE proceedings of the conference on design, automation and test in Europe conference and exhibition, pp 418\u2013419"},{"key":"9074_CR2","unstructured":"Semiconductor Association (2005) The international technology roadmap for semiconductor (ITRS)"},{"key":"9074_CR3","first-page":"367","volume-title":"Proceedings of the conference on design, automation and test in Europe (DATE \u201907)","author":"K Petersen","year":"2007","unstructured":"Petersen K, Oberg J (2007) Toward a scalable test methodology for 2D mesh network-on-chips. In: Proceedings of the conference on design, automation and test in Europe (DATE \u201907), pp 367\u2013372"},{"key":"9074_CR4","doi-asserted-by":"crossref","first-page":"30","DOI":"10.1109\/VTS.2006.22","volume-title":"Proceedings of 24th IEEE VLSI test symposium","author":"C Grecu","year":"2006","unstructured":"Grecu C, Pande P, Ivanov A, Saleh R (2006) BIST for network-onchip interconnect infrastructures. In: Proceedings of 24th IEEE VLSI test symposium, April, 2006, pp 30\u201335"},{"key":"9074_CR5","doi-asserted-by":"crossref","first-page":"72","DOI":"10.1109\/VDAT.2009.5158098","volume-title":"Proc IEEE int symp VLSI design, automation, and test (VLSI-DAT-2009)","author":"S-Y Lin","year":"2009","unstructured":"Lin S-Y, Shen W-C, Hsu C-C, Chao C-H, Wu A-Y (2009) Fault-tolerant router with built-in self-test\/self-diagnosis and fault-isolation circuits for 2D-mesh based chip multiprocessor systems. In: Proc IEEE int symp VLSI design, automation, and test (VLSI-DAT-2009), pp 72\u201375"},{"key":"9074_CR6","first-page":"1171","volume-title":"Proceedings of the conference on design, automation and test in Europe (DATE \u201906)","author":"M Hosseinabady","year":"2006","unstructured":"Hosseinabady M, Banaiyan A, Bojnordi MN, Navabi Z (2006) A concurrent testing method for NoC switches. In: Proceedings of the conference on design, automation and test in Europe (DATE \u201906), Munich, Germany, pp 1171\u20131176"},{"key":"9074_CR7","doi-asserted-by":"crossref","first-page":"591","DOI":"10.1109\/TEST.2005.1584020","volume-title":"Proceedings of IEEE international test conference (ITC \u201905)","author":"AM Amory","year":"2005","unstructured":"Amory AM, Briao E, Cota E, Lubaszewski M, Moraes FG (2005) A scalable test strategy for network-on-chip routers. In: Proceedings of IEEE international test conference (ITC \u201905), Nov 2005, pp 591\u2013599"},{"key":"9074_CR8","doi-asserted-by":"crossref","first-page":"437","DOI":"10.1109\/ATS.2006.260967","volume-title":"15th Asian test symposium (ATS\u201906)","author":"J Raik","year":"2006","unstructured":"Raik J, Govind V, Ubar R (2006) An external test approach for network-on-a-chip switches. In: 15th Asian test symposium (ATS\u201906), pp 437\u2013442"},{"key":"9074_CR9","doi-asserted-by":"crossref","first-page":"29","DOI":"10.1109\/ETS.2007.41","volume-title":"12th IEEE European test symp (ETS\u20192007)","author":"J Raik","year":"2007","unstructured":"Raik J, Ubar R, Govind V (2007) Test configuration for diagnosing faulty links in NoC switches. In: 12th IEEE European test symp (ETS\u20192007), pp 29\u201334"},{"key":"9074_CR10","doi-asserted-by":"crossref","first-page":"476","DOI":"10.1049\/iet-cdt.2008.0096","volume":"3","author":"J Raik","year":"2009","unstructured":"Raik J, Govind V, Ubar R (2009) Design-for-testability-based external test and diagnosis of mesh-like network-on-a-chips. IET Comput Digit Tech 3:476\u2013486","journal-title":"IET Comput Digit Tech"},{"key":"9074_CR11","volume-title":"45th ACM\/IEEE design automation conference","author":"Z Zhang","year":"2008","unstructured":"Zhang Z, Greiner A, Taktak S (2008) A reconfigurable routing algorithm for a fault-tolerant 2D-mesh network-on-chip. In: 45th ACM\/IEEE design automation conference"},{"key":"9074_CR12","doi-asserted-by":"crossref","first-page":"1154","DOI":"10.1109\/TC.2003.1228511","volume":"52","author":"J Wu","year":"2003","unstructured":"Wu J (2003) A fault-tolerant and deadlock-free routing protocol in 2D meshes based on odd-even turn model. IEEE Trans Comput 52:1154\u20131169","journal-title":"IEEE Trans Comput"},{"key":"9074_CR13","first-page":"765","volume":"14","author":"K-H Chen","year":"1998","unstructured":"Chen K-H, Chiu G-M (1998) Fault-tolerant routing algorithm for meshes without using virtual channels. J Comput Inf Sci Eng 14:765\u2013783","journal-title":"J Comput Inf Sci Eng"},{"key":"9074_CR14","doi-asserted-by":"crossref","first-page":"808","DOI":"10.1109\/DATE.2008.4484917","volume-title":"Design, automation and test in Europe (DATE \u201908)","author":"F Yuan","year":"2008","unstructured":"Yuan F, Huang L, Xu Q (2008) Re-examining the use of network-on-chip as test access mechanism. In: Design, automation and test in Europe (DATE \u201908), Mar 2008, pp 808\u2013811"},{"key":"9074_CR15","doi-asserted-by":"crossref","first-page":"213","DOI":"10.1109\/ETS.2006.48","volume-title":"Proceedings of the eleventh IEEE European test symposium","author":"AM Amory","year":"2006","unstructured":"Amory AM, Goossens K, Marinissen EJ, Lubaszewski M (2006) Wrapper design for the reuse of networks-on-chip as test access mechanism. In: Proceedings of the eleventh IEEE European test symposium, pp 213\u2013218"},{"issue":"11","key":"9074_CR16","doi-asserted-by":"crossref","first-page":"2465","DOI":"10.1109\/TCAD.2006.881331","volume":"25","author":"E Cota","year":"2006","unstructured":"Cota E, Liu C (2006) Constraint-driven test scheduling for NoC-based systems. IEEE Trans Comput-Aided Des Integr Circuits Syst 25(11):2465\u20132478","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"},{"key":"9074_CR17","volume-title":"VLSI test principles and architectures","author":"L-T Wang","year":"2006","unstructured":"Wang L-T, Wu C-W, Wen X (2006) VLSI test principles and architectures. Morgan Kaufmann, San Francisco"},{"key":"9074_CR18","doi-asserted-by":"crossref","first-page":"848","DOI":"10.1109\/12.392844","volume":"44","author":"RV Boppans","year":"1995","unstructured":"Boppans RV, Chalasani S (1995) Fault-tolerant wormhole routing algorithms for mesh networks. IEEE Trans Comput 44:848\u2013864","journal-title":"IEEE Trans Comput"},{"key":"9074_CR19","first-page":"354","volume-title":"IEEE\/ACM international conference on computer aided design (ICCAD-2004)","author":"J Hu","year":"2004","unstructured":"Hu J, Marculescu R (2004) Application-specific buffer space allocation for networks-on-chip router design. In: IEEE\/ACM international conference on computer aided design (ICCAD-2004), Nov 2004, pp 354\u2013361"},{"key":"9074_CR20","doi-asserted-by":"crossref","first-page":"283","DOI":"10.1109\/NOCS.2007.26","volume-title":"First international symposium on networks-on-chip","author":"D Greenfield","year":"2007","unstructured":"Greenfield D et al. (2007) Implications of Rent\u2019s rule for NoC design and its fault-tolerance. In: First international symposium on networks-on-chip, pp 283\u2013294"}],"container-title":["Design Automation for Embedded Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-011-9074-6.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10617-011-9074-6\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-011-9074-6","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,30]],"date-time":"2019-05-30T15:29:35Z","timestamp":1559230175000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10617-011-9074-6"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,4,5]]},"references-count":20,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2011,6]]}},"alternative-id":["9074"],"URL":"https:\/\/doi.org\/10.1007\/s10617-011-9074-6","relation":{},"ISSN":["0929-5585","1572-8080"],"issn-type":[{"value":"0929-5585","type":"print"},{"value":"1572-8080","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,4,5]]}}}