{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,6,6]],"date-time":"2023-06-06T05:40:07Z","timestamp":1686030007930},"reference-count":33,"publisher":"Springer Science and Business Media LLC","issue":"3-4","license":[{"start":{"date-parts":[[2011,4,8]],"date-time":"2011-04-08T00:00:00Z","timestamp":1302220800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Des Autom Embed Syst"],"published-print":{"date-parts":[[2011,12]]},"DOI":"10.1007\/s10617-011-9076-4","type":"journal-article","created":{"date-parts":[[2011,4,8]],"date-time":"2011-04-08T02:08:30Z","timestamp":1302228510000},"page":"225-245","source":"Crossref","is-referenced-by-count":1,"title":["Enhancing IP cores specifications using hierarchical composition and set theory"],"prefix":"10.1007","volume":"15","author":[{"given":"C\u00e1ssio L.","family":"Rodrigues","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Karina R. G.","family":"da Silva","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Henrique N.","family":"Cunha","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jorge C. A.","family":"de Figueiredo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dalton D. S.","family":"Guerrero","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Elmar","family":"Melcher","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2011,4,8]]},"reference":[{"issue":"2\u20133","key":"9076_CR1","first-page":"181","volume":"10","author":"G Ara\u00fajo","year":"2006","unstructured":"Ara\u00fajo G, Barros E, Melcher E, Azevedo R, da Silva KRG, Prado B, de Lima ME (2006) A system-only design methodology and the cine-ip multimedia platform. Des Autom Embed Syst 10(2\u20133):181\u2013202","journal-title":"Des Autom Embed Syst"},{"key":"9076_CR2","doi-asserted-by":"crossref","first-page":"827","DOI":"10.1145\/1146909.1147120","volume-title":"DAC\u201906: Proceedings of the 43rd annual conference on design automation","author":"A Banerjee","year":"2006","unstructured":"Banerjee A, Pal B, Das S, Kumar A, Dasgupta P (2006) Test generation games from formal specifications. In: DAC\u201906: Proceedings of the 43rd annual conference on design automation, New York, NY, USA. ACM, New York, pp 827\u2013832"},{"key":"9076_CR3","doi-asserted-by":"crossref","DOI":"10.1007\/0-387-31275-7","volume-title":"Writing testbenches using system Verilog","author":"J Bergeron","year":"2006","unstructured":"Bergeron J (2006) Writing testbenches using system Verilog. Springer, Berlin"},{"key":"9076_CR4","doi-asserted-by":"crossref","first-page":"220","DOI":"10.1145\/567446.567468","volume-title":"POPL\u201980: Proceedings of the 7th ACM SIGPLAN-SIGACT symposium on principles of programming languages","author":"TA Budd","year":"1980","unstructured":"Budd TA, DeMillo RA, Lipton RJ, Sayward FG (1980) Theoretical and empirical studies on using program mutation to test the functional correctness of programs. In: POPL\u201980: Proceedings of the 7th ACM SIGPLAN-SIGACT symposium on principles of programming languages, New York, NY, USA. ACM, New York, pp 220\u2013233"},{"key":"9076_CR5","volume-title":"Model checking","author":"E Clarke","year":"1999","unstructured":"Clarke E, Grumber O, Peled D (1999) Model checking. MIT Press, Cambridge"},{"key":"9076_CR6","series-title":"Discrete mathematics and its applications","doi-asserted-by":"crossref","DOI":"10.1201\/9781420010541","volume-title":"Handbook of combinatorial designs","author":"CJ Colbourn","year":"2006","unstructured":"Colbourn CJ, Dinitz JH (2006) Handbook of combinatorial designs, 2nd edn. Discrete mathematics and its applications. Chapman & Hall\/CRC Press, London\/Boca Raton","edition":"2"},{"key":"9076_CR7","doi-asserted-by":"crossref","first-page":"66","DOI":"10.1145\/1016568.1016592","volume-title":"SBCCI\u201904: Proceedings of the 17th symposium on Integrated circuits and system design","author":"KRG Silva da","year":"2004","unstructured":"da Silva KRG, Melcher EUK, Araujo G, Pimenta VA (2004) An automatic testbench generation tool for a systemc functional verification methodology. In: SBCCI\u201904: Proceedings of the 17th symposium on Integrated circuits and system design, New York, NY, USA. ACM, New York, pp 66\u201370"},{"issue":"4","key":"9076_CR8","doi-asserted-by":"crossref","first-page":"285","DOI":"10.1007\/s10617-006-9587-6","volume":"10","author":"KRG Silva da","year":"2007","unstructured":"da Silva KRG, Melcher EUK, Maia I, do Cunha HN (2007) A methodology aimed at better integration of functional verification and RTL design. Des Autom Embed Syst 10(4):285\u2013298","journal-title":"Des Autom Embed Syst"},{"issue":"3","key":"9076_CR9","doi-asserted-by":"crossref","first-page":"228","DOI":"10.1109\/32.910859","volume":"27","author":"ME Delamaro","year":"2001","unstructured":"Delamaro ME, Maldonado JC, Mathur AP (2001) Interface mutation: an approach for integration testing. IEEE Trans Softw Eng 27(3):228\u2013247. doi: 10.1109\/32.910859","journal-title":"IEEE Trans Softw Eng"},{"issue":"1","key":"9076_CR10","doi-asserted-by":"crossref","first-page":"599","DOI":"10.1002\/cpa.3160330503","volume":"33","author":"A Ferro","year":"1980","unstructured":"Ferro A, Omodeo EG, Schwartz JT (1980) Decision procedures for elementary sublanguages of set theory. i. multilevel syllogistic and some extensions. Commun Pure Appl Math 33(1):599\u2013608","journal-title":"Commun Pure Appl Math"},{"key":"9076_CR11","first-page":"88","volume-title":"Proceedings of the 5th conference on automated deduction","author":"A Ferro","year":"1980","unstructured":"Ferro A, Omodeo EG, Schwartz JT (1980) Decision procedures for some fragments of set theory. In: Proceedings of the 5th conference on automated deduction, London, UK. Springer, Berlin, pp 88\u201396"},{"key":"9076_CR12","doi-asserted-by":"crossref","first-page":"286","DOI":"10.1145\/775832.775907","volume-title":"DAC\u201903: Proceedings of the 40th conference on design automation","author":"S Fine","year":"2003","unstructured":"Fine S, Ziv A (2003) Coverage directed test generation for functional verification using Bayesian networks. In: DAC\u201903: Proceedings of the 40th conference on design automation, New York, NY, USA. ACM, New York, pp 286\u2013291"},{"key":"9076_CR13","volume-title":"Advanced verification methodology cookbook","author":"M Glasser","year":"2007","unstructured":"Glasser M, Rose A, Fitzpatrick T, Rich D, Foster H (2007) Advanced verification methodology cookbook. Mentor Graphics, Cambridge"},{"key":"9076_CR14","doi-asserted-by":"crossref","first-page":"524","DOI":"10.1109\/ASPDAC.2002.994973","volume-title":"ASP-DAC\u201902: Proceedings of the 2002 conference on Asia South Pacific design automation\/VLSI design","author":"A Gupta","year":"2002","unstructured":"Gupta A, Casavant AE, Ashar P, Mukaiyama A, Wakabayashi K, Liu XGS (2002) Property-specific testbench generation for guided simulation. In: ASP-DAC\u201902: Proceedings of the 2002 conference on Asia South Pacific design automation\/VLSI design, Washington, DC, USA. IEEE Computer Society, Los Alamitos, p 524"},{"key":"9076_CR15","first-page":"1019","volume-title":"DATE\u201906: Proceedings of the conference on design, automation and test in Europe. European Design and Automation Association","author":"IG Harris","year":"2006","unstructured":"Harris IG (2006) A coverage metric for the validation of interacting processes. In: DATE\u201906: Proceedings of the conference on design, automation and test in Europe. European Design and Automation Association, Leuven, Belgium, pp 1019\u20131024"},{"key":"9076_CR16","first-page":"146","volume-title":"ICCAD\u201996: Proceedings of the 1996 IEEE\/ACM international conference on computer-aided design","author":"RC Ho","year":"1996","unstructured":"Ho RC, Horowitz MA (1996) Validation coverage analysis for complex digital designs. In: ICCAD\u201996: Proceedings of the 1996 IEEE\/ACM international conference on computer-aided design, Washington, DC, USA. IEEE Computer Society, Los Alamitos, pp 146\u2013151"},{"key":"9076_CR17","volume-title":"Step-by-step functional verification with systemverilog and OVM","author":"S Iman","year":"2008","unstructured":"Iman S (2008) Step-by-step functional verification with systemverilog and OVM. Hansen Verlag, Munich"},{"key":"9076_CR18","first-page":"127","volume-title":"ICCAD\u201900: Proceedings of the 2000 IEEE\/ACM international conference on computer-aided design","author":"CN Ip","year":"2000","unstructured":"Ip CN (2000) Simulation coverage enhancement using test stimulus transformation. In: ICCAD\u201900: Proceedings of the 2000 IEEE\/ACM international conference on computer-aided design, Piscataway, NJ, USA. IEEE Press, New York, pp 127\u2013134"},{"key":"9076_CR19","first-page":"99","volume-title":"NASA press release","author":"D Isbell","year":"1999","unstructured":"Isbell D, Savage D (1999) Mars climate orbiter failure board releases report, numerous Nasa actions underway in response. In: NASA press release, pp 99\u2013134"},{"key":"9076_CR20","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4757-2887-3","volume-title":"Reuse methodology manual: for system-on-a-chip designs","author":"M Keating","year":"1998","unstructured":"Keating M, Bricaud P (1998) Reuse methodology manual: for system-on-a-chip designs. Kluwer Academic, Norwell"},{"issue":"1","key":"9076_CR21","doi-asserted-by":"crossref","first-page":"2","DOI":"10.1109\/12.656068","volume":"47","author":"D Moundanos","year":"1998","unstructured":"Moundanos D, Abraham JA, Hoskote YV (1998) Abstraction techniques for validation coverage analysis and test generation. IEEE Trans Comput 47(1):2\u201314","journal-title":"IEEE Trans Comput"},{"key":"9076_CR22","series-title":"ITC\u201994","doi-asserted-by":"crossref","first-page":"824","DOI":"10.1109\/TEST.1994.528535","volume-title":"Proceedings of the 1994 international conference on test","author":"AJ Offutt","year":"1994","unstructured":"Offutt AJ (1994) A practical system for mutation testing: help for the common programmer. In: Proceedings of the 1994 international conference on test, ITC\u201994. Washington, DC, IEEE Computer Society, Los Alamitos, pp 824\u2013830"},{"key":"9076_CR23","volume-title":"Functional verification coverage measurement and analysis","author":"A Piziali","year":"2004","unstructured":"Piziali A (2004) Functional verification coverage measurement and analysis. Kluwer Academic, Norwell"},{"key":"9076_CR24","first-page":"142","volume-title":"IP\/SOC 2006 (IP-Based SoC Design)","author":"AK Rocha","year":"2006","unstructured":"Rocha AK, Lira P, Ju EMYY, Barros E (2006) Silicon validated ip cores designed by the Brazil-ip network. In: IP\/SOC 2006 (IP-Based SoC Design), pp 142\u2013147"},{"key":"9076_CR25","doi-asserted-by":"crossref","first-page":"19","DOI":"10.1109\/HLDVT.2006.319996","volume-title":"Eleventh annual IEEE international high-level design validation and test workshop","author":"A Samarah","year":"2006","unstructured":"Samarah A, Habibi A, Tahar S, Kharma N (2006) Automated coverage directed test generation using a cell-based genetic algorithm. In: Eleventh annual IEEE international high-level design validation and test workshop, Nov 2006, pp 19\u201326"},{"key":"9076_CR26","first-page":"222","volume-title":"Proceeding DSD","author":"Y Serrestou","year":"2007","unstructured":"Serrestou Y, Robach VBC (2007) Functional verification of rtl designs driven by mutation testing metrics. In: Proceeding DSD, pp 222\u2013227"},{"key":"9076_CR27","unstructured":"Systemc community (2007) http:\/\/www.systemc.org\/"},{"key":"9076_CR28","unstructured":"Team X (2003) Xvid api 2.1 reference (for 0.9.x series)"},{"key":"9076_CR29","first-page":"343","volume-title":"The 2000 IEEE international symposium on circuits and systems, Proceedings ISCAS 2000, Geneva","author":"P Vado","year":"2000","unstructured":"Vado P, Savaria Y, Zoccarato Y, Robach C (2000) A methodology for validating digital circuits with mutation testing. In: The 2000 IEEE international symposium on circuits and systems, Proceedings ISCAS 2000, Geneva, vol\u00a01, pp 343\u2013346"},{"key":"9076_CR30","series-title":"Lecture notes in computer science: lectures on Petri nets I: basic models","doi-asserted-by":"crossref","first-page":"429","DOI":"10.1007\/3-540-65306-6_21","volume-title":"The state explosion problem","author":"A Valmari","year":"1998","unstructured":"Valmari A (1998) The state explosion problem. Lecture notes in computer science: lectures on Petri nets I: basic models, vol\u00a01491, pp 429\u2013528"},{"key":"9076_CR31","doi-asserted-by":"crossref","first-page":"317","DOI":"10.1145\/1120725.1120858","volume-title":"ASP-DAC\u201905: Proceedings of the 2005 conference on Asia South Pacific design automation","author":"S Verma","year":"2005","unstructured":"Verma S, Ramineni K, Harris IG (2005) An efficient control-oriented coverage metric. In: ASP-DAC\u201905: Proceedings of the 2005 conference on Asia South Pacific design automation, New York, NY, USA, ACM, New York, pp 317\u2013322"},{"key":"9076_CR32","first-page":"124","volume-title":"HLDVT\u201900: Proceedings of the IEEE international high-level validation and test workshop (HLDVT\u201900)","author":"A Mayhauser von","year":"2000","unstructured":"von Mayhauser A, Chen T, Kok J, Anderson C, Read A, Haijar A (2000) On choosing test criteria for behavioral level hardware design verification. In: HLDVT\u201900: Proceedings of the IEEE international high-level validation and test workshop (HLDVT\u201900), Washington, DC, USA. IEEE Computer Society, Los Alamitos, p 124"},{"key":"9076_CR33","volume-title":"Comprehensive functional verification: the complete industry cycle (systems on silicon)","author":"B Wile","year":"2005","unstructured":"Wile B, Goss J, Roesner W (2005) Comprehensive functional verification: the complete industry cycle (systems on silicon). Morgan Kaufmann, San Mateo"}],"container-title":["Design Automation for Embedded Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-011-9076-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10617-011-9076-4\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-011-9076-4","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,6,6]],"date-time":"2023-06-06T05:23:46Z","timestamp":1686029026000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10617-011-9076-4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,4,8]]},"references-count":33,"journal-issue":{"issue":"3-4","published-print":{"date-parts":[[2011,12]]}},"alternative-id":["9076"],"URL":"https:\/\/doi.org\/10.1007\/s10617-011-9076-4","relation":{},"ISSN":["0929-5585","1572-8080"],"issn-type":[{"value":"0929-5585","type":"print"},{"value":"1572-8080","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,4,8]]}}}