{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,10]],"date-time":"2025-11-10T21:05:17Z","timestamp":1762808717414,"version":"3.37.3"},"reference-count":37,"publisher":"Springer Science and Business Media LLC","issue":"1-2","license":[{"start":{"date-parts":[[2019,1,5]],"date-time":"2019-01-05T00:00:00Z","timestamp":1546646400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Des Autom Embed Syst"],"published-print":{"date-parts":[[2019,6]]},"DOI":"10.1007\/s10617-018-09218-7","type":"journal-article","created":{"date-parts":[[2019,1,5]],"date-time":"2019-01-05T08:33:50Z","timestamp":1546677230000},"page":"41-55","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["Trace-driven and processing time extensions for Noxim simulator"],"prefix":"10.1007","volume":"23","author":[{"given":"Ivan Luiz Pedroso","family":"Pires","sequence":"first","affiliation":[]},{"given":"Marco Antonio Zanata","family":"Alves","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3709-9214","authenticated-orcid":false,"given":"Luiz Carlos Pessoa","family":"Albini","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2019,1,5]]},"reference":[{"key":"9218_CR1","doi-asserted-by":"publisher","unstructured":"Abad P, Prieto P, Menezo LG, Colaso A, Puente V, Gregorio JA (2012) Topaz: an open-source interconnection network simulator for chip multiprocessors and supercomputers. In: 2012 IEEE\/ACM sixth international symposium on networks-on-chip, pp 99\u2013106. \n                    https:\/\/doi.org\/10.1109\/NOCS.2012.19","DOI":"10.1109\/NOCS.2012.19"},{"key":"9218_CR2","doi-asserted-by":"publisher","unstructured":"Agarwal N, Krishna T, Peh LS, Jha NK (2009) Garnet: A detailed on-chip network model inside a full-system simulator. In: 2009 IEEE international symposium on performance analysis of systems and software, pp 33\u201342. \n                    https:\/\/doi.org\/10.1109\/ISPASS.2009.4919636","DOI":"10.1109\/ISPASS.2009.4919636"},{"key":"9218_CR3","unstructured":"Alliance W (2014) Wi-fi alliance wigig wireless bus extension technical specification. \n                    www.wi-fi.org\n                    \n                  . Accessed 10 Sept 2016"},{"key":"9218_CR4","unstructured":"Bailey D, Harris T, Saphir W, van der Wijngaart R, Woo A, Yarrow M (1995) The NAS parallel benchmarks 2.0. Tech. rep., NAS Technical Report, NAS-95-020"},{"key":"9218_CR5","doi-asserted-by":"publisher","unstructured":"Ben-Itzhak Y, Zahavi E, Cidon I, Kolodny A (2011) Nocs simulation framework for omnet++. In: Proceedings of the fifth ACM\/IEEE international symposium, pp 265\u2013266. \n                    https:\/\/doi.org\/10.1145\/1999946.1999993","DOI":"10.1145\/1999946.1999993"},{"key":"9218_CR6","doi-asserted-by":"publisher","unstructured":"Ben-Itzhak Y, Zahavi E, Cidon I, Kolodny A (2012) Hnocs: modular open-source simulator for heterogeneous nocs. In: 2012 international conference on embedded computer systems (SAMOS), pp 51\u201357. \n                    https:\/\/doi.org\/10.1109\/SAMOS.2012.6404157","DOI":"10.1109\/SAMOS.2012.6404157"},{"issue":"1","key":"9218_CR7","doi-asserted-by":"publisher","first-page":"70","DOI":"10.1109\/2.976921","volume":"35","author":"L Benini","year":"2002","unstructured":"Benini L, Micheli GD (2002) Networks on chips: a new soc paradigm. Computer 35(1):70\u201378. \n                    https:\/\/doi.org\/10.1109\/2.976921","journal-title":"Computer"},{"issue":"2","key":"9218_CR8","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/2024716.2024718","volume":"39","author":"N Binkert","year":"2011","unstructured":"Binkert N, Beckmann B, Black G, Reinhardt SK, Saidi A, Basu A, Hestness J, Hower DR, Krishna T, Sardashti S, Sen R, Sewell K, Shoaib M, Vaish N, Hill MD, Wood DA (2011) The gem5 simulator. SIGARCH Comput Archit N 39(2):1\u20137. \n                    https:\/\/doi.org\/10.1145\/2024716.2024718","journal-title":"SIGARCH Comput Archit N"},{"key":"9218_CR9","doi-asserted-by":"publisher","unstructured":"Catania V, Mineo A, Monteleone S, Palesi M, Patti D (2015) Noxim: An open, extensible and cycle-accurate network on chip simulator. In: 2015 IEEE 26th international conference on application-specific systems, architectures and processors (ASAP), pp 162\u2013163. \n                    https:\/\/doi.org\/10.1109\/ASAP.2015.7245728","DOI":"10.1109\/ASAP.2015.7245728"},{"key":"9218_CR10","doi-asserted-by":"publisher","unstructured":"da\u00a0Cruz EHM, Alves MAZ, Carissimi A, Navaux POA, Ribeiro CP, Mehaut JF (2011) Using memory access traces to map threads and data on hierarchical multi-core platforms. In: 2011 IEEE international symposium on parallel and distributed processing workshops and Ph.d. Forum, pp 551\u2013558. \n                    https:\/\/doi.org\/10.1109\/IPDPS.2011.197","DOI":"10.1109\/IPDPS.2011.197"},{"issue":"2","key":"9218_CR11","doi-asserted-by":"publisher","first-page":"228","DOI":"10.1109\/JETCAS.2012.2193835","volume":"2","author":"S Deb","year":"2012","unstructured":"Deb S, Ganguly A, Pande PP, Belzer B, Heo D (2012) Wireless noc as interconnection backbone for multicore chips: promises and challenges. IEEE J Emerg Sel Top Circuits Syst 2(2):228\u2013239. \n                    https:\/\/doi.org\/10.1109\/JETCAS.2012.2193835","journal-title":"IEEE J Emerg Sel Top Circuits Syst"},{"key":"9218_CR12","doi-asserted-by":"publisher","first-page":"18","DOI":"10.1016\/j.peva.2015.03.001","volume":"88\u201389","author":"M Diener","year":"2015","unstructured":"Diener M, Cruz EH, Pilla LL, Dupros F, Navaux PO (2015) Characterizing communication and page usage of parallel applications for thread and data mapping. Perform Eval 88\u201389:18\u201336. \n                    https:\/\/doi.org\/10.1016\/j.peva.2015.03.001","journal-title":"Perform Eval"},{"key":"9218_CR13","doi-asserted-by":"publisher","unstructured":"de\u00a0Freitas HC, Schnorr LM, Alves MAZ, Navaux POA (2010) Impact of parallel workloads on noc architecture design. In: 2010 18th euromicro conference on parallel, distributed and network-based processing, pp 551\u2013555. \n                    https:\/\/doi.org\/10.1109\/PDP.2010.53","DOI":"10.1109\/PDP.2010.53"},{"issue":"6","key":"9218_CR14","doi-asserted-by":"publisher","first-page":"6","DOI":"10.1109\/MWC.2011.6108325","volume":"18","author":"CJ Hansen","year":"2011","unstructured":"Hansen CJ (2011) WiGiG: multi-gigabit wireless communications in the 60 GHz band. IEEE Wirel Commun 18(6):6\u20137. \n                    https:\/\/doi.org\/10.1109\/MWC.2011.6108325","journal-title":"IEEE Wirel Commun"},{"key":"9218_CR15","doi-asserted-by":"publisher","unstructured":"Hestness J, Grot B, Keckler SW (2010) Netrace: Dependency-driven trace-based network-on-chip simulation. In: Proceedings of the third international workshop on network on chip architectures, NoCArc \u201910, ACM, New York, NY, pp 31\u201336. \n                    https:\/\/doi.org\/10.1145\/1921249.1921258","DOI":"10.1145\/1921249.1921258"},{"key":"9218_CR16","doi-asserted-by":"crossref","unstructured":"Hossain H, Ahmed M, Al-Nayeem A, Islam TZ, Akbar MM (2007) Gnocsim\u2013a general purpose simulator for network-on-chip. In: International conference on information and communication technology","DOI":"10.1109\/ICICT.2007.375388"},{"key":"9218_CR17","unstructured":"InfiniBand Trade Association and others: InfiniBand Architecture Specification, release 1.0 (2000). \n                    www.infinibandta.org\n                    \n                  . Accessed 23 Oct 2016"},{"key":"9218_CR18","unstructured":"Jain Lavina, Al-Hashimi BM, Gaur MS, Laxmi V, Narayanan A (2007) NIRGAM: a simulator for NoC interconnect routing and application modeling. In: Design, automation and test in Europe conference"},{"key":"9218_CR19","volume-title":"The art of computer systems performance analysis: techniques for experimental design, measurement, simulation, and modeling","author":"Raj Jain","year":"1990","unstructured":"Jain Raj (1990) The art of computer systems performance analysis: techniques for experimental design, measurement, simulation, and modeling. Wiley, London"},{"key":"9218_CR20","doi-asserted-by":"publisher","unstructured":"Jiang N, Balfour J, Becker DU, Towles B, Dally WJ, Michelogiannakis G, Kim J (2013) A detailed and flexible cycle-accurate network-on-chip simulator. In: 2013 IEEE international symposium on performance analysis of systems and software (ISPASS), pp 86\u201396. \n                    https:\/\/doi.org\/10.1109\/ISPASS.2013.6557149","DOI":"10.1109\/ISPASS.2013.6557149"},{"key":"9218_CR21","doi-asserted-by":"publisher","unstructured":"Kurimoto Y, Fukutsuka Y, Taniguchi I, Tomiyama H (2013) A hardware\/software cosimulator for network-on-chip. In: 2013 international SoC design conference (ISOCC), pp 172\u2013175. \n                    https:\/\/doi.org\/10.1109\/ISOCC.2013.6863964","DOI":"10.1109\/ISOCC.2013.6863964"},{"key":"9218_CR22","unstructured":"LAN\/MAN Standards Committee: IEEE Standard for Ethernet. IEEE Std 802.3-2015 (2016)"},{"key":"9218_CR23","unstructured":"Lis M, Shim KS, Cho MH, Ren P, Khan O, Devadas S (2010) DARSIM: a parallel cycle-level NoC simulator. In: Workshop on modeling, benchmarking and simulation"},{"key":"9218_CR24","unstructured":"Lu Z, Thid R, Millberg M, Jantsch A (2005) NNSE: nostrum network-on-chip simulation environment. In: Swedish system-on-chip conference"},{"issue":"5","key":"9218_CR25","doi-asserted-by":"publisher","first-page":"10","DOI":"10.1109\/MC.2017.140","volume":"50","author":"GD Micheli","year":"2017","unstructured":"Micheli GD, Benini L (2017) Networks on chips: 15 years later. Computer 50(5):10\u201311. \n                    https:\/\/doi.org\/10.1109\/MC.2017.140","journal-title":"Computer"},{"key":"9218_CR26","doi-asserted-by":"publisher","unstructured":"Nakajima K, Kurebayashi S, Fukutsuka Y, Hieda T, Taniguchi I, Tomiyama H, Takada H (2013) Naxim: a fast and retargetable network-on-chip simulator with qemu and systemc. Int J Netw Comput 3(2):217\u2013227. \n                    https:\/\/doi.org\/10.15803\/ijnc.3.2_217","DOI":"10.15803\/ijnc.3.2_217"},{"key":"9218_CR27","first-page":"75","volume":"30","author":"IB Peng","year":"2017","unstructured":"Peng IB, Markidis S, Gioiosa R, Kestor G, Laure E (2017) Mpi streams for hpc applications. N Front High Perform Comput Big Data 30:75","journal-title":"N Front High Perform Comput Big Data"},{"key":"9218_CR28","doi-asserted-by":"publisher","unstructured":"Pires ILP, Alves MAZ, Albini LCP (2017) Trace-driven extension for noxim simulator. In: 2017 VII Brazilian symposium on computing systems engineering (SBESC), pp 102\u2013108. \n                    https:\/\/doi.org\/10.1109\/SBESC.2017.20","DOI":"10.1109\/SBESC.2017.20"},{"issue":"6","key":"9218_CR29","doi-asserted-by":"publisher","first-page":"890","DOI":"10.1109\/TCAD.2012.2184760","volume":"31","author":"P Ren","year":"2012","unstructured":"Ren P, Lis M, Cho MH, Shim KS, Fletcher CW, Khan O, Zheng N, Devadas S (2012) Hornet: a cycle-level multicore simulator. IEEE Trans Comput-Aided Des Integr Circuit Syst 31(6):890\u2013903. \n                    https:\/\/doi.org\/10.1109\/TCAD.2012.2184760","journal-title":"IEEE Trans Comput-Aided Des Integr Circuit Syst"},{"key":"9218_CR30","volume-title":"The ns-3 network simulator","author":"F Riley George","year":"2010","unstructured":"Riley George F, Henderson Thomas R (2010) The ns-3 network simulator. Springer, Berlin"},{"issue":"3","key":"9218_CR31","doi-asserted-by":"publisher","first-page":"389","DOI":"10.1109\/TC.2016.2605093","volume":"66","author":"MS Shamim","year":"2017","unstructured":"Shamim MS, Mansoor N, Narde RS, Kothandapani V, Ganguly A, Venkataraman J (2017) A wireless interconnection framework for seamless inter and intra-chip communication in multichip systems. IEEE Trans Comput 66(3):389\u2013402. \n                    https:\/\/doi.org\/10.1109\/TC.2016.2605093","journal-title":"IEEE Trans Comput"},{"key":"9218_CR32","doi-asserted-by":"publisher","unstructured":"Shamim MS, Muralidharan J, Ganguly A (2015) An interconnection architecture for seamless inter and intra-chip communication using wireless links. In: Proceedings of the 9th international symposium on networks-on-chip, NOCS \u201915, ACM, New York, NY, USA, pp 2:1\u20132:8. \n                    https:\/\/doi.org\/10.1145\/2786572.2786581","DOI":"10.1145\/2786572.2786581"},{"key":"9218_CR33","doi-asserted-by":"publisher","unstructured":"Swaminathan K, Thakyal D, Nambiar SG, Lakshminarayanan G, Ko SB (2014) Enhanced noxim simulator for performance evaluation of network on chip topologies. In: 2014 recent advances in engineering and computational sciences (RAECS), pp 1\u20135. \n                    https:\/\/doi.org\/10.1109\/RAECS.2014.6799570","DOI":"10.1109\/RAECS.2014.6799570"},{"key":"9218_CR34","unstructured":"VanderWijngaart RF, Haopiang J (2003) NAS Parallel benchmarks, multi-zone versions, NAS Technical Report"},{"key":"9218_CR35","doi-asserted-by":"publisher","unstructured":"Wang C, Hu WH, Bagherzadeh N (2011) A wireless network-on-chip design for multicore platforms. In: 2011 19th international euromicro conference on parallel, distributed and network-based processing, pp 409\u2013416. \n                    https:\/\/doi.org\/10.1109\/PDP.2011.37","DOI":"10.1109\/PDP.2011.37"},{"key":"9218_CR36","unstructured":"WiFi Alliance: 60 GHz Technical Specification v1.0 (2017). \n                    www.wi-fi.org\n                    \n                  . Accessed 10 Sept 2016"},{"issue":"5","key":"9218_CR37","doi-asserted-by":"publisher","first-page":"677","DOI":"10.1109\/4.509850","volume":"31","author":"SJE Wilton","year":"1996","unstructured":"Wilton SJE, Jouppi NP (1996) Cacti: an enhanced cache access and cycle time model. IEEE J Solid-State Circuits 31(5):677\u2013688. \n                    https:\/\/doi.org\/10.1109\/4.509850","journal-title":"IEEE J Solid-State Circuits"}],"container-title":["Design Automation for Embedded Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-018-09218-7.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10617-018-09218-7\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10617-018-09218-7.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,1,4]],"date-time":"2020-01-04T19:07:20Z","timestamp":1578164840000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10617-018-09218-7"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,1,5]]},"references-count":37,"journal-issue":{"issue":"1-2","published-print":{"date-parts":[[2019,6]]}},"alternative-id":["9218"],"URL":"https:\/\/doi.org\/10.1007\/s10617-018-09218-7","relation":{},"ISSN":["0929-5585","1572-8080"],"issn-type":[{"type":"print","value":"0929-5585"},{"type":"electronic","value":"1572-8080"}],"subject":[],"published":{"date-parts":[[2019,1,5]]},"assertion":[{"value":"22 May 2018","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"13 December 2018","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"5 January 2019","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}