{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,5,2]],"date-time":"2023-05-02T05:02:46Z","timestamp":1683003766610},"reference-count":21,"publisher":"Springer Science and Business Media LLC","issue":"5","license":[{"start":{"date-parts":[[2008,9,19]],"date-time":"2008-09-19T00:00:00Z","timestamp":1221782400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Int J Parallel Prog"],"published-print":{"date-parts":[[2008,10]]},"DOI":"10.1007\/s10766-008-0080-7","type":"journal-article","created":{"date-parts":[[2008,9,18]],"date-time":"2008-09-18T20:50:36Z","timestamp":1221771036000},"page":"493-520","source":"Crossref","is-referenced-by-count":14,"title":["A Compiler Intermediate Representation for Reconfigurable Fabrics"],"prefix":"10.1007","volume":"36","author":[{"given":"Zhi","family":"Guo","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Betul","family":"Buyukkurt","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"John","family":"Cortes","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Abhishek","family":"Mitra","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Walild","family":"Najjar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2008,9,19]]},"reference":[{"key":"80_CR1","unstructured":"Aigner, G., Diwan, A., Heine, D.L., Lam, M.S., Moore, D.L., Murphy, B.R., Sapuntzakis, C.: An Overview of the SUIF2 Compiler Infrastructure. Computer Systems Laboratory, Stanford University"},{"key":"80_CR2","unstructured":"Smith, M.D., Holloway, G.: An Introduction to Machine SUIF and its Portable Libraries for Analysis and Optimization. Division of Engineering and Applied Sciences, Harvard University"},{"key":"80_CR3","doi-asserted-by":"crossref","unstructured":"Guo, Z., Buyukkurt, B., Najjar, W.: Input data reuse in compiling window operations onto reconfigurable hardware. In: ACM SIGPLAN\/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems, pp. 249\u2013256. ACM Press, New York, NY, June 2004.","DOI":"10.1145\/997163.997199"},{"key":"80_CR4","unstructured":"Guo, Z., Buyukkurt, B., Najjar, W., Vissers, K.: Optimized generation of data-path from C codes for FPGAs. In: ACM\/IEEE Conference on Design, Automation and Test in Europe, pp. 112\u2013117. IEEE Computer Society, Washington, DC, February 2005"},{"issue":"1","key":"80_CR5","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/1369396.1369402","volume":"5","author":"Z. Guo","year":"2008","unstructured":"Guo Z., Najjar W. and Buyukkurt B. (2008). Efficient hardware code generation for fpgas. ACM Trans. Arch. Code Optim. 5(1): 1\u201326","journal-title":"ACM Trans. Arch. Code Optim."},{"key":"80_CR6","doi-asserted-by":"crossref","unstructured":"Gokhale, M.B., Stone, J.M., Arnold, J., Lalinowski, M.: Stream-oriented FPGA computing in the streams-c high level language. In: IEEE Symposium on FPGAs for Custom Computing Machines (FCCM 2000) (2000)","DOI":"10.1109\/FPGA.2000.903392"},{"key":"80_CR7","doi-asserted-by":"crossref","unstructured":"Tripp, J., Peterson, K., Ahrens, C., Poznanovic, J., Gokhale, M.: Trident: an FPGA compiler framework for floating-point algorithms. In: FPL \u201905: Proceedings of the 2005 Conference on Field Programmable Logic and Applications (2005)","DOI":"10.1109\/FPL.2005.1515741"},{"key":"80_CR8","unstructured":"LLVM.: The LLVM Compiler Infrastructure.Information about the LLVM Project is available at the project\u2019s web site, http:\/\/www.llvm.org"},{"issue":"8","key":"80_CR9","doi-asserted-by":"crossref","first-page":"63","DOI":"10.1109\/MC.2003.1220583","volume":"36","author":"W.A. Najjar","year":"2003","unstructured":"Najjar W.A., B\u00f6hm A.P.W., Draper B.A., Hammes J., Rinker R., Beveridge R., Chawathe M. and Ross C. (2003). From algorithms to hardware\u2014a high-level language abstraction for reconfigurable computing. IEEE Comput. 36(8): 63\u201369","journal-title":"IEEE Comput."},{"issue":"2","key":"80_CR10","doi-asserted-by":"crossref","first-page":"119","DOI":"10.1007\/s11227-005-0288-x","volume":"32","author":"T. Todman","year":"2005","unstructured":"Todman T., de Coutinho J.G.F. and Luk W. (2005). Customisable hardware compilation. Supercomputing 32(2): 119\u2013137","journal-title":"Supercomputing"},{"key":"80_CR11","doi-asserted-by":"crossref","unstructured":"Diniz, P.C., Hall, M.W., Park, J., So, B., Ziegler, H.E.: Bridging the gap between compilation and synthesis in the DEFACTO system. In: Dietz, H.G. (ed.) LCPC, Volume 2624 of Lecture Notes in Computer Science, pp. 52\u201370. Springer (2001)","DOI":"10.1007\/3-540-35767-X_4"},{"key":"80_CR12","doi-asserted-by":"crossref","unstructured":"So, B., Hall, M.W., Diniz, P.C.: A compiler approach to fast hardware design space exploration in FPGA-based systems. In: Proceedings of the ACM SIGPLAN 2002 Conference on Programming Language Design and Implementation, PLDI, pp. 165\u2013176 (2002)","DOI":"10.1145\/512529.512550"},{"key":"80_CR13","doi-asserted-by":"crossref","unstructured":"Gupta, S., Dutt, N.D., Gupta, R.K., Nicolau, A.: Spark: a high-level synthesis framework for applying parallelizing compiler transformations. In: VLSI \u201903: Proceeding of the 2003 International Conference on VLSI Design (2003)","DOI":"10.1109\/ICVD.2003.1183177"},{"key":"80_CR14","doi-asserted-by":"crossref","unstructured":"Callahan, T.J., Hauser, J.R., Wawrzynek, J.: The Garp architecture and C compiler. IEEE Comput. 33, 62\u201369 (2002)","DOI":"10.1109\/2.839323"},{"key":"80_CR15","unstructured":"Budiu, M., Goldstein, S.C.: Pegasus: an efficient intermediate representation. Technical report, Carnegie Mellon University (2002)"},{"key":"80_CR16","unstructured":"VSIA.: Information about Virtual Socket Interface Association (VSIA) is available at http:\/\/www.vsi.org\/"},{"key":"80_CR17","unstructured":"Chou, P., Ortega, G., Borriello, G.: Interface co-synthesis techniques for embedded systems. In: ICCAD \u201995: Proceedings of the 1995 International Conference on Computer Aided Design (1995)"},{"key":"80_CR18","doi-asserted-by":"crossref","first-page":"58","DOI":"10.1145\/504914.504917","volume":"7","author":"R. Lysecky","year":"2002","unstructured":"Lysecky R. and Vahid F. (2002). Prefetching for improved bus wrapper performance in cores. ACM Trans. Des. Autom. Electron. Syst. 7: 58\u201390","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"key":"80_CR19","doi-asserted-by":"crossref","unstructured":"Zhu, J.: Raising the abstraction level of RTL design. In: DATE \u201901: Proceedings of the Conference on Design, Automation and Test in Europe. IEEE Computer Society (2001)","DOI":"10.1109\/DATE.2001.915003"},{"key":"80_CR20","doi-asserted-by":"crossref","first-page":"111","DOI":"10.15388\/Informatica.2004.049","volume":"15","author":"V. Stuikys","year":"2004","unstructured":"Stuikys V. and Damasevicius R. (2004). Soft IP customisation model based on metaprogramming techniques. Informatica 15: 111\u2013126","journal-title":"Informatica"},{"key":"80_CR21","unstructured":"Mukherjee, R., Jones, A., Banerjee, P.: System level synthesis of multiple ip blocks in the behavioral synthesis tool. In: PDCS \u201903: Proceeding of the 2003 International Conference on Parallel and Distributed Computing and Systems, Marina Del Rey, CA (2003)"}],"container-title":["International Journal of Parallel Programming"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-008-0080-7.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10766-008-0080-7\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-008-0080-7","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,5,8]],"date-time":"2020-05-08T10:24:39Z","timestamp":1588933479000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10766-008-0080-7"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,9,19]]},"references-count":21,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2008,10]]}},"alternative-id":["80"],"URL":"https:\/\/doi.org\/10.1007\/s10766-008-0080-7","relation":{},"ISSN":["0885-7458","1573-7640"],"issn-type":[{"value":"0885-7458","type":"print"},{"value":"1573-7640","type":"electronic"}],"subject":[],"published":{"date-parts":[[2008,9,19]]}}}