{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,6]],"date-time":"2025-03-06T04:40:04Z","timestamp":1741236004826,"version":"3.38.0"},"reference-count":33,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2011,6,14]],"date-time":"2011-06-14T00:00:00Z","timestamp":1308009600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Int J Parallel Prog"],"published-print":{"date-parts":[[2012,4]]},"DOI":"10.1007\/s10766-011-0172-7","type":"journal-article","created":{"date-parts":[[2011,6,13]],"date-time":"2011-06-13T04:56:07Z","timestamp":1307940967000},"page":"141-163","source":"Crossref","is-referenced-by-count":5,"title":["The Performance Optimization of Threaded Prefetching for Linked Data Structures"],"prefix":"10.1007","volume":"40","author":[{"given":"Yan","family":"Huang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jie","family":"Tang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhi-min","family":"Gu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Min","family":"Cai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jianxun","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ninghan","family":"Zheng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2011,6,14]]},"reference":[{"issue":"3","key":"172_CR1","doi-asserted-by":"crossref","first-page":"473","DOI":"10.1145\/356887.356892","volume":"14","author":"A.J. Smith","year":"1982","unstructured":"Smith A.J.: Cache memories. Comput. Surv. 14(3), 473\u2013530 (1982)","journal-title":"Comput. Surv."},{"issue":"5","key":"172_CR2","doi-asserted-by":"crossref","first-page":"609","DOI":"10.1109\/12.381947","volume":"44","author":"T.F. Chen","year":"1995","unstructured":"Chen T.F., Baer J.-L.: Effective hardware-based data prefetching for high-performance processors. IEEE Trans. Comput. 44(5), 609\u2013623 (1995)","journal-title":"IEEE Trans. Comput."},{"issue":"1","key":"172_CR3","doi-asserted-by":"crossref","first-page":"55","DOI":"10.1145\/273011.273021","volume":"16","author":"T. Mowry","year":"1998","unstructured":"Mowry T.: Tolerating latency in multiprocessors through compiler inserted prefetching. ACM Trans. Comput. Syst. 16(1), 55\u201392 (1998)","journal-title":"ACM Trans. Comput. Syst."},{"key":"172_CR4","unstructured":"Collins, J.D., Sair, S., Calder, B., Tullsen, D.M.: Pointer cache assisted prefetching. In: MICRO-35 (2002)"},{"key":"172_CR5","doi-asserted-by":"crossref","unstructured":"Cooksey, R., Jourdan, S., Grunwald, D.: A stateless, content-directed data prefetching mechanism. In: ASPLOS-X (2002)","DOI":"10.1145\/605397.605427"},{"key":"172_CR6","doi-asserted-by":"crossref","unstructured":"Luk, C.K.: Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors. In: ISCA (2001)","DOI":"10.1145\/379240.379250"},{"key":"172_CR7","doi-asserted-by":"crossref","unstructured":"Roth, A., Moshovos, A., Sohi, G.S.: Dependence based prefetching for linked data structures. In: ASPLOS-8 (1998)","DOI":"10.1145\/291069.291034"},{"key":"172_CR8","doi-asserted-by":"crossref","unstructured":"Roth, A. Sohi, G.S.: Effective jump-pointer prefetching for linked data structures. In: ISCA-26 (1999)","DOI":"10.1145\/291069.291034"},{"key":"172_CR9","doi-asserted-by":"crossref","unstructured":"Zilles, C. Sohi, G.: Execution-based prediction using speculative slices. In: ISCA-28 (2001)","DOI":"10.1145\/379240.379246"},{"key":"172_CR10","unstructured":"Kim, D., Liao, S.S., Wan, P.H., del Cuvillo, J., Tian, X., Zou, X., Wang, H., Yeung, D., Girkar, M., Shen, J.P.: Physical experimentation with prefetching helper threads on Intel\u2019s hyper-threaded processors. In: Proceedings of the 2004 Annual Conference on Code Generation and Optimization (CGO-3), pp. 27\u201338, March 2004"},{"issue":"1","key":"172_CR11","doi-asserted-by":"crossref","first-page":"8","DOI":"10.1109\/L-CA.2011.2","volume":"10","author":"J. Tang","year":"2011","unstructured":"Tang J., Liu S., Gu Z., Liu C., Gaudiot J.L.: Prefetching in embedded mobile systems can be energy-efficient. IEEE Comput. Archit. 10(1), 8\u201311 (2011)","journal-title":"IEEE Comput. Archit."},{"key":"172_CR12","doi-asserted-by":"crossref","unstructured":"Liu, S., Eisenbeis, C., Gaudiot, J.-L.: Speculative execution on GPU: an exploratory study. In: Proceedings of the 39th International Conference on Parallel Processing, September 2010","DOI":"10.1109\/ICPP.2010.53"},{"key":"172_CR13","doi-asserted-by":"crossref","unstructured":"Liu, S., Eisenbeis, C., Gaudiot, J.-L.: A theoretical framework for value prediction in parallel systems. In: Proceedings of the 39th International Conference on Parallel Processing, September 2010","DOI":"10.1109\/ICPP.2010.10"},{"issue":"4","key":"172_CR14","doi-asserted-by":"crossref","first-page":"66","DOI":"10.1109\/2.917542","volume":"34","author":"G.S. Sohi","year":"2001","unstructured":"Sohi G.S., Roth A.: Speculative multithreaded processors. IEEE Comput. 34(4), 66\u201373 (2001)","journal-title":"IEEE Comput."},{"issue":"5","key":"172_CR15","doi-asserted-by":"crossref","first-page":"533","DOI":"10.1007\/s10766-010-0155-0","volume":"39","author":"S. Liu","year":"2010","unstructured":"Liu S., Eisenbeis C., Gaudiot J.-L.: Value prediction and speculative execution on GPU. Int. J. Parallel Program. 39(5), 533\u2013552 (2010)","journal-title":"Int. J. Parallel Program."},{"issue":"6","key":"172_CR16","doi-asserted-by":"crossref","first-page":"759","DOI":"10.1109\/TC.2009.28","volume":"58","author":"S. Liu","year":"2010","unstructured":"Liu S., Gaudiot J.L.: Potential Impact of Value Prediction on Communication in Many-Core Architectures. IEEE Trans. Comput. 58(6), 759\u2013769 (2010)","journal-title":"IEEE Trans. Comput."},{"issue":"3","key":"172_CR17","doi-asserted-by":"crossref","first-page":"405","DOI":"10.1007\/s11390-009-9233-4","volume":"24","author":"S. Byna","year":"2009","unstructured":"Byna S., Chen Y., Sun X.H.: A taxonomy of data prefetching mechanisms. J. Comput. Sci. Technol. 24(3), 405\u2013417 (2009)","journal-title":"J. Comput. Sci. Technol."},{"key":"172_CR18","unstructured":"Zilles, C., Sohi, G.: Master\/slave speculative parallelization. In: Proceedings of the 35th International Symposium on Micro-architecture, November 2002"},{"key":"172_CR19","doi-asserted-by":"crossref","unstructured":"Roth, A., Sohi, G.S.: A Quantitative framework for automated pre-execution thread selection. In: International Symposium on Micro-architecture, pp. 430\u2013441 (2002)","DOI":"10.1109\/MICRO.2002.1176270"},{"key":"172_CR20","unstructured":"Gu, Z., Zheng, N., Zhang, Y.: The stable conditions of a task-pair with helper-thread in CMP. In: Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, pp. 125\u2013130. Las Vegas, Nevada, USA (2009)"},{"key":"172_CR21","doi-asserted-by":"crossref","unstructured":"Yan Huang, Zhimin Gu.: Performance analysis of prefetching thread for linked data structure in CMPs. In: Proceedings of the International Conference on Computational Intelligence and Software Engineering, pp. 1\u20134 (2009)","DOI":"10.1109\/CISE.2009.5363620"},{"key":"172_CR22","unstructured":"http:\/\/www.intel.com\/cd\/software\/products\/apac\/zho\/245112.htm"},{"key":"172_CR23","unstructured":"Song, Y., Kalogeropulos, S., Tirumalai, P. (2005) Design and implementation of a compiler framework for helper threading on multi-core processors. In: Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT\u201905)"},{"issue":"9","key":"172_CR24","doi-asserted-by":"crossref","first-page":"1309","DOI":"10.1109\/TPDS.2008.224","volume":"20","author":"J. Lee","year":"2009","unstructured":"Lee J., Jung C., Lim D., Solihin Y.: Prefetching with helper threads for loosely coupled multiprocessor systems. IEEE Trans. Parallel Distrib. Syst. 20(9), 1309\u20131324 (2009)","journal-title":"IEEE Trans. Parallel Distrib. Syst."},{"key":"172_CR25","first-page":"1","volume":"6","author":"J. Lu","year":"2004","unstructured":"Lu J., Chen H., Yew P.C., Hsu W.C.: Design and implementation of a lightweight dynamic optimization system. J. Instr. Lev. Parallel. 6, 1\u201324 (2004)","journal-title":"J. Instr. Lev. Parallel."},{"key":"172_CR26","doi-asserted-by":"crossref","unstructured":"Kim, D., Yeung, D.: Design and evaluation of compiler algorithms for pre-execution. In: ASPLOS, pp. 159\u2013170 (2002)","DOI":"10.1145\/605432.605415"},{"key":"172_CR27","doi-asserted-by":"crossref","unstructured":"Liao et\u00a0al.: Post-pass binary adaptation for software-based speculative pre-computation. In: PLDI, pp. 117\u2013128 (2002)","DOI":"10.1145\/543552.512544"},{"key":"172_CR28","unstructured":"Lu et\u00a0al.: Dynamic helper threaded prefetching on the sun UltraSPARC CMP processor. In: MICRO, pp. 93\u2013104. September 2005"},{"key":"172_CR29","unstructured":"Collins, J.D., Tullsen, D.M., Wang, H., Shen, J.P.: Dynamic speculative pre-computation. In: Proceedings of the 34th International Symposium on Micro-architecture, pp. 306\u2013317 (2001)"},{"key":"172_CR30","doi-asserted-by":"crossref","unstructured":"Ganusov, I., Burtscher, M.: Future execution: a hardware prefetching technique for chip multiprocessors. In: International Conference on Parallel Architectures and Compilation Techniques, September 2005","DOI":"10.1109\/PACT.2005.23"},{"key":"172_CR31","doi-asserted-by":"crossref","unstructured":"Zhang, W., Tullsen, D.M., Calder, B.: Accelerating and adapting pre-computation threads for efficient prefetching. In: Proceedings of the 13th Symposium on High-Performance Computer Architecture, pp. 85\u201395 (2007)","DOI":"10.1109\/HPCA.2007.346187"},{"key":"172_CR32","doi-asserted-by":"crossref","unstructured":"Chilimbi, T.M, Hirzel, M.: Dynamic hot data stream prefetching for general-purpose programs. In: Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, pp. 199\u2013209 (2002)","DOI":"10.1145\/543552.512554"},{"key":"172_CR33","doi-asserted-by":"crossref","unstructured":"Lee, C., Mutlu, O., Narasiman, V., Patt, Y.: Prefetch-aware DRAM controllers. In Proceedings of MICRO (2008)","DOI":"10.1109\/MICRO.2008.4771791"}],"container-title":["International Journal of Parallel Programming"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-011-0172-7.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10766-011-0172-7\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-011-0172-7","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,6]],"date-time":"2025-03-06T04:09:18Z","timestamp":1741234158000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10766-011-0172-7"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,6,14]]},"references-count":33,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2012,4]]}},"alternative-id":["172"],"URL":"https:\/\/doi.org\/10.1007\/s10766-011-0172-7","relation":{},"ISSN":["0885-7458","1573-7640"],"issn-type":[{"type":"print","value":"0885-7458"},{"type":"electronic","value":"1573-7640"}],"subject":[],"published":{"date-parts":[[2011,6,14]]}}}