{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,10]],"date-time":"2026-07-10T20:29:40Z","timestamp":1783715380156,"version":"3.55.0"},"reference-count":37,"publisher":"Springer Science and Business Media LLC","issue":"3","license":[{"start":{"date-parts":[[2013,10,17]],"date-time":"2013-10-17T00:00:00Z","timestamp":1381968000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Int J Parallel Prog"],"published-print":{"date-parts":[[2015,6]]},"DOI":"10.1007\/s10766-013-0283-4","type":"journal-article","created":{"date-parts":[[2013,10,16]],"date-time":"2013-10-16T09:49:49Z","timestamp":1381916989000},"page":"381-402","source":"Crossref","is-referenced-by-count":18,"title":["Power Efficiency for Hardware\/Software Partitioning with Time and Area Constraints on MPSoC"],"prefix":"10.1007","volume":"43","author":[{"given":"Edwin","family":"Sha","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Li","family":"Wang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Qingfeng","family":"Zhuge","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jun","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jing","family":"Liu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2013,10,17]]},"reference":[{"key":"283_CR1","doi-asserted-by":"crossref","unstructured":"Arat\u00f3, P., Juh\u00e1sz, S., Mann, Z.\u00c1., Orb\u00e1n, A., Papp, D.: Hardware-software partitioning in embedded system design. In: Intelligent Signal Processing, 2003 IEEE International Symposium on, pp. 197\u2013202 (2003)","DOI":"10.1109\/ISP.2003.1275838"},{"issue":"1","key":"283_CR2","doi-asserted-by":"crossref","first-page":"136","DOI":"10.1145\/1044111.1044119","volume":"10","author":"P Arat\u00f3","year":"2005","unstructured":"Arat\u00f3, P., Mann, Z.\u00c1., Orb\u00e1n, A.: Algorithmic aspects of hardware\/software partitioning. ACM Trans. Des. Autom. Electron. Syst. 10(1), 136\u2013156 (2005)","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"key":"283_CR3","doi-asserted-by":"crossref","unstructured":"Bakshi, S., Gajski, D.D.: Hardware\/software partitioning and pipelining. In: Proceedings of the 34th annual Design Automation Conference, pp. 713\u2013716. ACM (1997)","DOI":"10.1109\/DAC.1997.597237"},{"key":"283_CR4","doi-asserted-by":"crossref","unstructured":"B\u00ecnh, N.N., Imai, M., Shiomi, A., Hikichi, N.: A hardware\/software partitioning algorithm for designing pipelined asips with least gate counts. In: Design Automation Conference Proceedings 1996, 33rd, pp. 527\u2013532 (1996)","DOI":"10.1145\/240518.240618"},{"issue":"1","key":"283_CR5","doi-asserted-by":"crossref","first-page":"23","DOI":"10.1023\/A:1008899229802","volume":"3","author":"T Blickle","year":"1998","unstructured":"Blickle, T., Teich, J., Thiele, L.: System-level synthesis using evolutionary algorithms. Des. Autom. Embed. Syst. 3(1), 23\u201358 (1998)","journal-title":"Des. Autom. Embed. Syst."},{"issue":"3\u20134","key":"283_CR6","doi-asserted-by":"crossref","first-page":"281","DOI":"10.1023\/A:1008954218909","volume":"5","author":"KS Chatha","year":"2000","unstructured":"Chatha, K.S., Vemuri, R.: An iterative algorithm for hardware-software partitioning, hardware design space exploration and scheduling. Des. Autom. Embed. Syst. 5(3\u20134), 281\u2013293 (2000)","journal-title":"Des. Autom. Embed. Syst."},{"key":"283_CR7","doi-asserted-by":"crossref","unstructured":"Chatha, K.S., Vemuri, R.: Magellan: multiway hardware-software partitioning and scheduling for latency minimization of hierarchical control-dataflow task graphs. In: Proceedings of the Ninth International Symposium on Hardware\/Software, Codesign, pp. 42\u201347 (2001)","DOI":"10.1145\/371636.371671"},{"issue":"3","key":"283_CR8","doi-asserted-by":"crossref","first-page":"193","DOI":"10.1109\/TVLSI.2002.1043323","volume":"10","author":"KS Chatha","year":"2002","unstructured":"Chatha, K.S., Vemuri, R.: Hardware-software partitioning and pipelined scheduling of transformative applications. IEEE Trans. Very Large Scale Integr. Syst. 10(3), 193\u2013208 (2002)","journal-title":"IEEE Trans. Very Large Scale Integr. Syst."},{"issue":"10","key":"283_CR9","doi-asserted-by":"crossref","first-page":"920","DOI":"10.1109\/43.728914","volume":"17","author":"RP Dick","year":"1998","unstructured":"Dick, R.P., Jha, N.K.: Mogac: A multiobjective genetic algorithm for hardware-software cosynthesis of distributed embedded systems. IEEE Trans. Comput. Aid. Des. Integr. Circuits Syst. 17(10), 920\u2013935 (1998)","journal-title":"IEEE Trans. Comput. Aid. Des. Integr. Circuits Syst."},{"key":"283_CR10","doi-asserted-by":"crossref","unstructured":"Dick, R.P., Rhodes, D.L., Wolf, W.: Tgff: task graphs for free. In: Proceedings of the 6th International Workshop on Hardware\/Software Codesign, pp. 97\u2013101. IEEE Computer Society (1998)","DOI":"10.1145\/278241.278309"},{"issue":"1","key":"283_CR11","doi-asserted-by":"crossref","first-page":"5","DOI":"10.1023\/A:1008857008151","volume":"2","author":"P Eles","year":"1997","unstructured":"Eles, P., Peng, Z., Kuchcinski, K., Doboli, A.: System level hardware\/software partitioning based on simulated annealing and tabu search. Des. Autom. Embed. Syst. 2(1), 5\u201332 (1997)","journal-title":"Des. Autom. Embed. Syst."},{"key":"283_CR12","doi-asserted-by":"crossref","unstructured":"Gohringer, D., Becker, J.: High performance reconfigurable multi-processor-based computing on fpgas. In: 2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum, pp. 1\u20134 (2010)","DOI":"10.1109\/IPDPSW.2010.5470800"},{"issue":"7","key":"283_CR13","doi-asserted-by":"crossref","first-page":"42","DOI":"10.1109\/MC.2005.239","volume":"38","author":"J Goodacre","year":"2005","unstructured":"Goodacre, J., Sloss, A.N.: Parallelism and the arm instruction set architecture. Computer 38(7), 42\u201350 (2005)","journal-title":"Computer"},{"key":"283_CR14","doi-asserted-by":"crossref","unstructured":"Grode, J., Knudsen, P.V., Madsen, J.: Hardware resource allocation for hardware\/software partitioning in the lycos system. In: Proceedings of the Design, Automation and Test in Europe, pp. 22\u201327 (1998)","DOI":"10.1109\/DATE.1998.655832"},{"issue":"2","key":"283_CR15","doi-asserted-by":"crossref","first-page":"273","DOI":"10.1109\/92.924041","volume":"9","author":"J Henkel","year":"2001","unstructured":"Henkel, J., Ernst, R.: An approach to automated hardware\/software partitioning using a flexible granularity that is driven by high-level estimation techniques. IEEE Trans. Very Large Scale Integr. Syst. 9(2), 273\u2013289 (2001)","journal-title":"IEEE Trans. Very Large Scale Integr. Syst."},{"key":"283_CR16","doi-asserted-by":"crossref","unstructured":"Jiang, Y., Zhang, H., Jiao, X., Song, X., Hung, W.N., Gu, M., Sun, J.: Uncertain model and algorithm for hardware\/software partitioning. In: VLSI, 2012 IEEE Computer Society Annual Symposium on, pp. 243\u2013248 (2012)","DOI":"10.1109\/ISVLSI.2012.14"},{"key":"283_CR17","doi-asserted-by":"crossref","unstructured":"Jigang, W., Chang, B., Srikanthan, T.: A hybrid branch-and-bound strategy for hardware\/software partitioning. In: Computer and Information Science, Eighth IEEE\/ACIS International Conference on, pp. 641\u2013644 (2009)","DOI":"10.1109\/ICIS.2009.152"},{"issue":"3","key":"283_CR18","doi-asserted-by":"crossref","first-page":"223","DOI":"10.1007\/s11227-006-8045-3","volume":"38","author":"W Jigang","year":"2006","unstructured":"Jigang, W., Srikanthan, T.: Algorithmic aspects of area-efficient hardware\/software partitioning. J. Supercomput. 38(3), 223\u2013235 (2006)","journal-title":"J. Supercomput."},{"issue":"4","key":"283_CR19","doi-asserted-by":"crossref","first-page":"532","DOI":"10.1109\/TC.2009.173","volume":"59","author":"W Jigang","year":"2010","unstructured":"Jigang, W., Srikanthan, T., Chen, G.: Algorithmic aspects of hardware\/software partitioning: 1D search algorithms. IEEE Trans. Comput. 59(4), 532\u2013544 (2010)","journal-title":"IEEE Trans. Comput."},{"issue":"4","key":"283_CR20","doi-asserted-by":"crossref","first-page":"345","DOI":"10.1007\/s10617-008-9032-0","volume":"12","author":"W Jigang","year":"2008","unstructured":"Jigang, W., Srikanthan, T., Jiao, T.: Algorithmic aspects for functional partitioning and scheduling in hardware\/software co-design. Des. Autom. Embed. Syst. 12(4), 345\u2013375 (2008)","journal-title":"Des. Autom. Embed. Syst."},{"issue":"9","key":"283_CR21","doi-asserted-by":"crossref","first-page":"819","DOI":"10.1109\/43.720318","volume":"17","author":"A Kalavade","year":"1998","unstructured":"Kalavade, A., Subrahmanyam, P.: Hardware\/software partitioning for multifunction systems. IEEE Trans. Comput. Aid. Des. Integr. Circuits Syst. 17(9), 819\u2013837 (1998)","journal-title":"IEEE Trans. Comput. Aid. Des. Integr. Circuits Syst."},{"issue":"2","key":"283_CR22","first-page":"334","volume":"8","author":"TY Lee","year":"2009","unstructured":"Lee, T.Y., Fan, Y.H., Tsai, C.C.: Adaptive multi-constraints in hardware-software partitioning for embedded multiprocessor fpga systems. WSEAS Trans. Comput. 8(2), 334\u2013343 (2009)","journal-title":"WSEAS Trans. Comput."},{"key":"283_CR23","unstructured":"Lin, T.Y., Hung, Y.T., Chang, R.G.: Efficient hardware\/software partitioning approach for embedded multiprocessor systems. In: VLSI Design, Automation and Test, 2006 International Symposium on, pp. 1\u20134 (2006)"},{"issue":"3","key":"283_CR24","doi-asserted-by":"crossref","first-page":"269","DOI":"10.1145\/785411.785412","volume":"8","author":"M L\u00f3pez-Vallejo","year":"2003","unstructured":"L\u00f3pez-Vallejo, M., L\u00f3pez, J.C.: On the hardware-software partitioning problem: System modeling and partitioning techniques. ACM Trans. Des. Autom. Electron. Syst. 8(3), 269\u2013297 (2003)","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"issue":"2","key":"283_CR25","doi-asserted-by":"crossref","first-page":"195","DOI":"10.1023\/A:1008884219274","volume":"2","author":"J Madsen","year":"1997","unstructured":"Madsen, J., Grode, J., Knudsen, P.V., Petersen, M.E., Haxthausen, A.: Lycos: The lyngby co-synthesis system. Des. Autom. Embed. Syst. 2(2), 195\u2013235 (1997)","journal-title":"Des. Autom. Embed. Syst."},{"key":"283_CR26","unstructured":"Niemann, R., Marwedel, P.: Hardware\/software partitioning using integer programming. In: Proceedings of the 1996 European Conference on Design and Test, p. 473. IEEE Computer Society (1996)"},{"issue":"2","key":"283_CR27","doi-asserted-by":"crossref","first-page":"165","DOI":"10.1023\/A:1008832202436","volume":"2","author":"R Niemann","year":"1997","unstructured":"Niemann, R., Marwedel, P.: An algorithm for hardware\/software partitioning using mixed integer linear programming. Des. Autom. Embed. Syst. 2(2), 165\u2013193 (1997)","journal-title":"Des. Autom. Embed. Syst."},{"key":"283_CR28","unstructured":"Srinivasan, V., Radhakrishnan, S., Vemuri, R.: Hardware software partitioning with integrated hardware design space exploration. In: Design, Automation and Test in Europe, 1998, Proceedings, pp. 28\u201335 (1998)"},{"issue":"3","key":"283_CR29","doi-asserted-by":"crossref","first-page":"413","DOI":"10.1145\/567270.567273","volume":"7","author":"F Vahid","year":"2002","unstructured":"Vahid, F.: Partitioning sequential programs for cad using a three-step approach. ACM Trans. Des. Autom. Electron. Syst. 7(3), 413\u2013429 (2002)","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"key":"283_CR30","doi-asserted-by":"crossref","unstructured":"Vahid, F., Gajski, D.D.: Clustering for improved system-level functional partitioning. In: System Synthesis, 1995, Proceedings of the Eighth International Symposium on, pp. 28\u201333 (1995)","DOI":"10.1145\/224486.224492"},{"key":"283_CR31","unstructured":"Vertex, Xilinx Inc., http:\/\/www.xilinx.com"},{"issue":"4","key":"283_CR32","doi-asserted-by":"crossref","first-page":"425","DOI":"10.1023\/A:1016567828852","volume":"6","author":"T Wiangtong","year":"2002","unstructured":"Wiangtong, T., Cheung, P.Y., Luk, W.: Comparing three heuristic search methods for functional partitioning in hardware-software codesign. Des. Autom. Embed. Syst. 6(4), 425\u2013449 (2002)","journal-title":"Des. Autom. Embed. Syst."},{"issue":"3","key":"283_CR33","doi-asserted-by":"crossref","first-page":"14","DOI":"10.1109\/MSP.2005.1425894","volume":"22","author":"T Wiangtong","year":"2005","unstructured":"Wiangtong, T., Cheung, P.Y., Luk, W.: Hardware\/software codesign: A systematic approach targeting data-intensive applications. IEEE Signal Process. Mag. 22(3), 14\u201322 (2005)","journal-title":"IEEE Signal Process. Mag."},{"issue":"10","key":"283_CR34","doi-asserted-by":"crossref","first-page":"1701","DOI":"10.1109\/TCAD.2008.923415","volume":"27","author":"W Wolf","year":"2008","unstructured":"Wolf, W., Jerraya, A.A., Martin, G.: Multiprocessor system-on-chip (mpsoc) technology. IEEE Trans. Comput. Aid. Des. Integr. Circuits Syst. 27(10), 1701\u20131713 (2008)","journal-title":"IEEE Trans. Comput. Aid. Des. Integr. Circuits Syst."},{"issue":"2","key":"283_CR35","doi-asserted-by":"crossref","first-page":"41","DOI":"10.1016\/j.ipl.2005.12.008","volume":"98","author":"J Wu","year":"2006","unstructured":"Wu, J., Srikanthan, T.: Low-complex dynamic programming algorithm for hardware\/software partitioning. Inf. Process. Lett. 98(2), 41\u201346 (2006)","journal-title":"Inf. Process. Lett."},{"issue":"4","key":"283_CR36","doi-asserted-by":"crossref","first-page":"1204","DOI":"10.1016\/j.matcom.2007.09.003","volume":"79","author":"J Wu","year":"2008","unstructured":"Wu, J., Srikanthan, T., Yan, C.: Algorithmic aspects for power-efficient hardware\/software partitioning. Math. Comput. Simul. 79(4), 1204\u20131215 (2008)","journal-title":"Math. Comput. Simul."},{"key":"283_CR37","unstructured":"Zivojnovic, V., Velarde, J.M., Schlager, C., Meyr, H.: Dspstone: A dsp-oriented benchmarking methodology. Signal Process. Appl. Technol. 94 (1994)"}],"container-title":["International Journal of Parallel Programming"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-013-0283-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10766-013-0283-4\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-013-0283-4","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,4,30]],"date-time":"2025-04-30T17:16:32Z","timestamp":1746033392000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10766-013-0283-4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,10,17]]},"references-count":37,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2015,6]]}},"alternative-id":["283"],"URL":"https:\/\/doi.org\/10.1007\/s10766-013-0283-4","relation":{},"ISSN":["0885-7458","1573-7640"],"issn-type":[{"value":"0885-7458","type":"print"},{"value":"1573-7640","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,10,17]]}}}