{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T07:44:28Z","timestamp":1740123868521,"version":"3.37.3"},"reference-count":24,"publisher":"Springer Science and Business Media LLC","issue":"6","license":[{"start":{"date-parts":[[2016,12,22]],"date-time":"2016-12-22T00:00:00Z","timestamp":1482364800000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Int J Parallel Prog"],"published-print":{"date-parts":[[2017,12]]},"DOI":"10.1007\/s10766-016-0480-z","type":"journal-article","created":{"date-parts":[[2016,12,24]],"date-time":"2016-12-24T00:46:04Z","timestamp":1482540364000},"page":"1536-1565","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":12,"title":["Runtime Vectorization Transformations of Binary Code"],"prefix":"10.1007","volume":"45","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1706-4110","authenticated-orcid":false,"given":"Nabil","family":"Hallou","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Erven","family":"Rohou","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Philippe","family":"Clauss","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2016,12,22]]},"reference":[{"key":"480_CR1","unstructured":"Intel 64 and IA-32 Architectures Optimization Reference Manual (2014)"},{"key":"480_CR2","unstructured":"Intel 64 and IA-32 Architectures Software Developer\u2019s Manual (2014)"},{"key":"480_CR3","doi-asserted-by":"publisher","unstructured":"Amdahl, G.M.: Validity of the single processor approach to achieving large scale computing capabilities. In: Spring Joint Computer Conference, AFIPS \u201967 (Spring), pp. 483\u2013485. ACM (1967). doi: 10.1145\/1465482.1465560","DOI":"10.1145\/1465482.1465560"},{"key":"480_CR4","unstructured":"Bellard, F.: QEMU, a fast and portable dynamic translator. In: USENIX ATC, FREENIX Track, pp. 41\u201346 (2005)"},{"key":"480_CR5","doi-asserted-by":"crossref","unstructured":"Beyler, J.C., Clauss, P.: Performance driven data cache prefetching in a dynamic software optimization system. In: ICS\u201907, pp. 202\u2013209. ACM (2007)","DOI":"10.1145\/1274971.1275000"},{"key":"480_CR6","unstructured":"Bruening, D.: Efficient, transparent, and comprehensive runtime code manipulation. Ph.D. thesis, MIT (2004)"},{"key":"480_CR7","doi-asserted-by":"crossref","unstructured":"Chen, H., Lu, J., Hsu, W.C., Yew, P.C.: Continuous adaptive object-code re-optimization framework. In: Advances in Computer Systems Architecture, LNCS, vol. 3189 (2004)","DOI":"10.1007\/978-3-540-30102-8_20"},{"issue":"2","key":"480_CR8","doi-asserted-by":"crossref","first-page":"56","DOI":"10.1109\/40.671403","volume":"18","author":"A Chernoff","year":"1998","unstructured":"Chernoff, A., Herdeg, M., Hookway, R., Reeve, C., Rubin, N., Tye, T., Yadavalli, S.B., Yates, J.: FX!32: A profile-directed binary translator. IEEE Micro 18(2), 56\u201364 (1998)","journal-title":"IEEE Micro"},{"key":"480_CR9","doi-asserted-by":"crossref","unstructured":"Clark, N., Hormati, A., Yehia, S., Mahlke, S., Flautner, K.: Liquid SIMD: abstracting SIMD hardware using lightweight dynamic mapping. In: HPCA (2007)","DOI":"10.1109\/HPCA.2007.346199"},{"key":"480_CR10","unstructured":"Dehnert, J.C., Grant, B.K., Banning, J.P., Johnson, R., Kistler, T., Klaiber, A., Mattson, J.: The Transmeta code morphing software: Using speculation, recovery, and adaptive retranslation to address real-life challenges. In: CGO (2003)"},{"key":"480_CR11","doi-asserted-by":"crossref","unstructured":"El-Shobaky, S., El-Mahdy, A., El-Nahas, A.: Automatic vectorization using dynamic compilation and tree pattern matching technique in Jikes RVM. In: ICOOOLPS (2009)","DOI":"10.1145\/1565824.1565833"},{"key":"480_CR12","doi-asserted-by":"crossref","unstructured":"Feautrier, P., Lengauer, C.: Polyhedron model. In: Padua, D. (ed.) Encyclopedia of Parallel Computing, pp. 1581\u20131592. Springer, US (2011)","DOI":"10.1007\/978-0-387-09766-4_502"},{"key":"480_CR13","doi-asserted-by":"crossref","unstructured":"Grosser, T., Groesslinger, A., Lengauer, C.: Polly\u2014performing polyhedral optimizations on a low-level intermediate representation. Parallel Process. Lett. 22(04), 1250010 (2012)","DOI":"10.1142\/S0129626412500107"},{"key":"480_CR14","unstructured":"Li, J., Zhang, Q., Xu, S., Huang, B.: Optimizing dynamic binary translation for SIMD instructions. In: CGO (2006)"},{"key":"480_CR15","doi-asserted-by":"crossref","unstructured":"Maleki, S., Gao, Y., Garzar\u00e1n, M.J., Wong, T., Padua, D.A.: An evaluation of vectorizing compilers. In: PACT\u201911, pp. 372\u2013382 (2011)","DOI":"10.1109\/PACT.2011.68"},{"key":"480_CR16","unstructured":"McSema: x86 to machine code translation framework. https:\/\/github.com\/trailofbits\/mcsema"},{"key":"480_CR17","doi-asserted-by":"crossref","unstructured":"Nie, J., Cheng, B., Li, S., Wang, L., Li, X.F.: Vectorization for Java. In: NPC (2010)","DOI":"10.1007\/978-3-642-15672-4_3"},{"key":"480_CR18","doi-asserted-by":"crossref","unstructured":"Nuzman, D., Dyshel, S., Rohou, E., Rosen, I., Williams, K., Yuste, D., Cohen, A., Zaks, A.: Vapor SIMD: auto-vectorize once, run everywhere. In: CGO (2011)","DOI":"10.1109\/CGO.2011.5764683"},{"key":"480_CR19","doi-asserted-by":"crossref","unstructured":"Nuzman, D., Henderson, R.: Multi-platform auto-vectorization. In: CGO (2006)","DOI":"10.1109\/CGO.2006.25"},{"key":"480_CR20","unstructured":"Pluto: an automatic parallelizer and locality optimizer for multicores"},{"issue":"4","key":"480_CR21","first-page":"39:1","volume":"8","author":"B Pradelle","year":"2012","unstructured":"Pradelle, B., Ketterlin, A., Clauss, P.: Polyhedral parallelization of binary code. ACM TACO 8(4), 39:1\u201339:21 (2012)","journal-title":"ACM TACO"},{"key":"480_CR22","unstructured":"Riou, E., Rohou, E., Clauss, P., Hallou, N., Ketterlin, A.: PADRONE: a platform for online profiling, analysis, and optimization. In: Dynamic Compilation Everywhere (2014)"},{"key":"480_CR23","doi-asserted-by":"crossref","unstructured":"Rohou, E., Dyshel, S., Nuzman, D., Rosen, I., Williams, K., Cohen, A., Zaks, A.: Speculatively vectorized bytecode. In: HiPEAC (2011)","DOI":"10.1145\/1944862.1944871"},{"key":"480_CR24","unstructured":"Valensi, C.: A generic approach to the definition of low-level components for multi-architecture binary analysis. Ph.D. thesis, Universit\u00e9 de Versailles Saint-Quentin-en-Yvelines (2014)"}],"container-title":["International Journal of Parallel Programming"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10766-016-0480-z\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-016-0480-z.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-016-0480-z.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,16]],"date-time":"2019-09-16T18:08:18Z","timestamp":1568657298000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10766-016-0480-z"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,12,22]]},"references-count":24,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2017,12]]}},"alternative-id":["480"],"URL":"https:\/\/doi.org\/10.1007\/s10766-016-0480-z","relation":{},"ISSN":["0885-7458","1573-7640"],"issn-type":[{"type":"print","value":"0885-7458"},{"type":"electronic","value":"1573-7640"}],"subject":[],"published":{"date-parts":[[2016,12,22]]}}}