{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,21]],"date-time":"2026-08-21T13:43:45Z","timestamp":1787319825939,"version":"build-2736575974"},"reference-count":44,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2019,8,8]],"date-time":"2019-08-08T00:00:00Z","timestamp":1565222400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2019,8,8]],"date-time":"2019-08-08T00:00:00Z","timestamp":1565222400000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Int J Parallel Prog"],"published-print":{"date-parts":[[2020,2]]},"DOI":"10.1007\/s10766-019-00640-3","type":"journal-article","created":{"date-parts":[[2019,8,8]],"date-time":"2019-08-08T14:06:48Z","timestamp":1565273208000},"page":"1-31","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":21,"title":["Source-to-Source Parallelization Compilers for Scientific Shared-Memory Multi-core and Accelerated Multiprocessing: Analysis, Pitfalls, Enhancement and Potential"],"prefix":"10.1007","volume":"48","author":[{"given":"Re\u2019em","family":"Harel","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Idan","family":"Mosseri","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Harel","family":"Levin","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Lee-or","family":"Alon","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Matan","family":"Rusanovsky","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8831-5423","authenticated-orcid":false,"given":"Gal","family":"Oren","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2019,8,8]]},"reference":[{"issue":"5","key":"640_CR1","doi-asserted-by":"publisher","first-page":"11","DOI":"10.1109\/MC.2005.160","volume":"38","author":"D Geer","year":"2005","unstructured":"Geer, D.: Chip makers turn to multicore processors. Computer 38(5), 11\u201313 (2005)","journal-title":"Computer"},{"issue":"6","key":"640_CR2","doi-asserted-by":"publisher","first-page":"26","DOI":"10.1109\/MSP.2009.934110","volume":"26","author":"G Blake","year":"2009","unstructured":"Blake, G., Dreslinski, R.G., Mudge, T.: A survey of multicore processors. IEEE Signal Process. Mag. 26(6), 26\u201337 (2009)","journal-title":"IEEE Signal Process. Mag."},{"key":"640_CR3","volume-title":"An Introduction to Parallel Programming","author":"P Pacheco","year":"2011","unstructured":"Pacheco, P.: An Introduction to Parallel Programming. Elsevier, Amsterdam (2011)"},{"key":"640_CR4","volume-title":"Parallel and Distributed Computing: A Survey of Models, Paradigms and Approaches","author":"C Leopold","year":"2001","unstructured":"Leopold, C.: Parallel and Distributed Computing: A Survey of Models, Paradigms and Approaches. Wiley, Hoboken (2001)"},{"issue":"1","key":"640_CR5","doi-asserted-by":"publisher","first-page":"46","DOI":"10.1109\/99.660313","volume":"5","author":"L Dagum","year":"1998","unstructured":"Dagum, L., Menon, R.: Openmp: an industry standard api for shared-memory programming. IEEE Comput. Sci. Eng. 5(1), 46\u201355 (1998)","journal-title":"IEEE Comput. Sci. Eng."},{"key":"640_CR6","doi-asserted-by":"publisher","DOI":"10.7551\/mitpress\/7055.001.0001","volume-title":"Using MPI-2: Advanced Features of the Message Passing Interface","author":"W Gropp","year":"1999","unstructured":"Gropp, W., Thakur, R., Lusk, E.: Using MPI-2: Advanced Features of the Message Passing Interface. MIT Press, Cambridge (1999)"},{"key":"640_CR7","volume-title":"MPI-the Complete Reference: The MPI Core","author":"M Snir","year":"1998","unstructured":"Snir, M., Otto, S., Huss-Lederman, S., Dongarra, J., Walker, D.: MPI-the Complete Reference: The MPI Core, vol. 1. MIT press, Cambridge (1998)"},{"key":"640_CR8","unstructured":"Boku, Taisuke, Sato, Mitsuhisa, Matsubara, Masazumi, Takahashi, Daisuke: Openmpi-openmp like tool for easy programming in mpi. In Sixth European Workshop on OpenMP, pages 83\u201388, (2004)"},{"key":"640_CR9","doi-asserted-by":"crossref","unstructured":"Nickolls, J., Buck, I., Garland, M., Skadron, K.: Scalable parallel programming with CUDA. In: ACM SIGGRAPH 2008 Classes, p. 16. ACM (2008)","DOI":"10.1145\/1401132.1401152"},{"issue":"1","key":"640_CR10","first-page":"46","volume":"9","author":"G Oren","year":"2018","unstructured":"Oren, G., Ganan, Y., Malamud, G.: Automp: an automatic openmp parallization generator for variable-oriented high-performance scientific codes. Int. J. Comb. Optim. Probl. Inform. 9(1), 46\u201353 (2018)","journal-title":"Int. J. Comb. Optim. Probl. Inform."},{"issue":"4","key":"640_CR11","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/1082983.1083143","volume":"30","author":"I Neamtiu","year":"2005","unstructured":"Neamtiu, I., Foster, J.S., Hicks, M.: Understanding source code evolution using abstract syntax tree matching. ACM SIGSOFT Softw. Eng. Notes 30(4), 1\u20135 (2005)","journal-title":"ACM SIGSOFT Softw. Eng. Notes"},{"key":"640_CR12","unstructured":"AutoPar documentations. http:\/\/rosecompiler.org\/ROSE_HTML_Reference\/auto_par.html . Accessed 8 Aug 2019"},{"key":"640_CR13","unstructured":"ROSE homepage. http:\/\/rosecompiler.org . Accessed 8 Aug 2019"},{"key":"640_CR14","unstructured":"Dever, M.: AutoPar: automating the parallelization of functional programs. PhD thesis, Dublin City University (2015)"},{"key":"640_CR15","unstructured":"Par4All homepage. http:\/\/par4all.github.io\/ . Accessed 8 Aug 2019"},{"key":"640_CR16","unstructured":"PIPS homepage. https:\/\/pips4u.org\/ . Accessed 8 Aug 2019"},{"key":"640_CR17","doi-asserted-by":"crossref","unstructured":"Ventroux, N., Sassolas, T., Guerre, A., Creusillet, B., Keryell, R.: SESAM\/Par4all: a tool for joint exploration of MPSoC architectures and dynamic dataflow code generation. In: Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, pp. 9\u201316. ACM (2012)","DOI":"10.1145\/2162131.2162133"},{"key":"640_CR18","unstructured":"Cetus homepage. https:\/\/engineering.purdue.edu\/Cetus\/ . Accessed 8 Aug 2019"},{"issue":"12","key":"640_CR19","doi-asserted-by":"publisher","first-page":"36","DOI":"10.1109\/MC.2009.385","volume":"42","author":"C Dave","year":"2009","unstructured":"Dave, C., Bae, H., Min, S.-J., Lee, S., Eigenmann, R., Midkiff, S.: Cetus: a source-to-source compiler infrastructure for multicores. Computer 42(12), 36\u201342 (2009)","journal-title":"Computer"},{"issue":"12","key":"640_CR20","doi-asserted-by":"publisher","first-page":"84","DOI":"10.1109\/2.546613","volume":"29","author":"MW Hall","year":"1996","unstructured":"Hall, M.W., Anderson, J.M., Amarasinghe, S.P., Murphy, B.R., Liao, S.-W., Bugnion, E., Lam, M.S.: Maximizing multiprocessor performance with the suif compiler. Computer 29(12), 84\u201389 (1996)","journal-title":"Computer"},{"key":"640_CR21","doi-asserted-by":"crossref","unstructured":"Pottenger, B., Eigenmann, R.: Idiom recognition in the Polaris parallelizing compiler. In: Proceedings of the 9th International Conference on Supercomputing, pp. 444\u2013448. ACM (1995)","DOI":"10.1145\/224538.224655"},{"issue":"1","key":"640_CR22","first-page":"36","volume":"6","author":"X Tian","year":"2002","unstructured":"Tian, X., Bik, A., Girkar, M., Grey, P., Saito, H., Su, E.: Intel\u00ae openmp c++\/fortran compiler for hyper-threading technology: implementation and performance. Intel Technol. J. 6(1), 36\u201346 (2002)","journal-title":"Intel Technol. J."},{"key":"640_CR23","unstructured":"Bondhugula, U., Hartono, A., Ramanujam, J., Sadayappan, P.: PLUTO: a practical and fully automatic polyhedral program optimization system. In: Proceedings of the ACM SIGPLAN 2008 Conference on Programming Language Design and Implementation (PLDI 08), Tucson, AZ (June 2008). Citeseer (2008)"},{"key":"640_CR24","doi-asserted-by":"crossref","unstructured":"Prema, S., Jehadeesan, R., Panigrahi, B.K.: Identifying pitfalls in automatic parallelization of NAS parallel benchmarks. In: 2017 National Conference on Parallel Computing Technologies (PARCOMPTECH), pp. 1\u20136. IEEE (2017)","DOI":"10.1109\/PARCOMPTECH.2017.8068329"},{"key":"640_CR25","doi-asserted-by":"crossref","unstructured":"Arenaz, M., Hernandez, O., Pleiter, D.: The technological roadmap of parallware and its alignment with the openpower ecosystem. In: International Conference on High Performance Computing, pp. 237\u2013253. Springer (2017)","DOI":"10.1007\/978-3-319-67630-2_19"},{"issue":"3","key":"640_CR26","doi-asserted-by":"publisher","first-page":"63","DOI":"10.1177\/109434209100500306","volume":"5","author":"DH Bailey","year":"1991","unstructured":"Bailey, D.H., Barszcz, E., Barton, J.T., Browning, D.S., Carter, R.L., Dagum, L., Fatoohi, R.A., Frederickson, P.O., Lasinski, T.A., Schreiber, R.S., et al.: The nas parallel benchmarks. Int. J. Supercomput. Appl. 5(3), 63\u201373 (1991)","journal-title":"Int. J. Supercomput. Appl."},{"issue":"4","key":"640_CR27","doi-asserted-by":"publisher","first-page":"49","DOI":"10.1145\/989393.989401","volume":"39","author":"SL Graham","year":"2004","unstructured":"Graham, S.L., Kessler, P.B., McKusick, M.K.: Gprof: a call graph execution profiler. ACM SIGPLAN Not. 39(4), 49\u201357 (2004)","journal-title":"ACM SIGPLAN Not."},{"issue":"5","key":"640_CR28","first-page":"471","volume":"3","author":"S Prema","year":"2013","unstructured":"Prema, S., Jehadeesan, R.: Analysis of parallelization techniques and tools. Int. J. Inf. Comput. Technol. 3(5), 471\u2013478 (2013)","journal-title":"Int. J. Inf. Comput. Technol."},{"issue":"5","key":"640_CR29","first-page":"17","volume":"5","author":"M Sohal","year":"2016","unstructured":"Sohal, M., Kaur, R.: Automatic parallelization: a review. Int. J. Comput. Sci. Mob. Comput. 5(5), 17\u201321 (2016)","journal-title":"Int. J. Comput. Sci. Mob. Comput."},{"issue":"02n03","key":"640_CR30","doi-asserted-by":"publisher","first-page":"215","DOI":"10.1142\/S0129626400000214","volume":"10","author":"D Quinlan","year":"2000","unstructured":"Quinlan, D.: ROSE: compiler support for object-oriented frameworks. Parallel Process. Lett. 10(02n03), 215\u2013226 (2000)","journal-title":"Parallel Process. Lett."},{"key":"640_CR31","unstructured":"Amini, M., Creusillet, B., Even, S., Keryell, R., Goubier, O., Guelton, S., McMahon, J.O., Pasquier, F.-X., P\u00e9an, G., Villalon, P.: Par4all: from convex array regions to heterogeneous computing. In: IMPACT 2012: Second International Workshop on Polyhedral Compilation Techniques HiPEAC 2012 (2012)"},{"key":"640_CR32","doi-asserted-by":"crossref","unstructured":"Lee, S.-I., Johnson, T.A., Eigenmann, R.: Cetus\u2014an extensible compiler infrastructure for source-to-source transformation. In: International Workshop on Languages and Compilers for Parallel Computing, pp. 539\u2013553. Springer (2003)","DOI":"10.1007\/978-3-540-24644-2_35"},{"key":"640_CR33","unstructured":"Liang, X., Humos, A.A., Pei, T.: Vectorization and parallelization of loops in C\/C++ code. In: Proceedings of the International Conference on Frontiers in Education: Computer Science and Computer Engineering (FECS). The Steering Committee of The World Congress in Computer Science, Computer, pp. 203\u2013206 (2017)"},{"key":"640_CR34","unstructured":"Jubb, C.: Loop optimizations in modern c compilers (2014)"},{"key":"640_CR35","volume-title":"Intel Xeon Phi Coprocessor High Performance Programming","author":"J Jeffers","year":"2013","unstructured":"Jeffers, J., Reinders, J.: Intel Xeon Phi Coprocessor High Performance Programming. Newnes, Oxford (2013)"},{"key":"640_CR36","doi-asserted-by":"crossref","unstructured":"Lu, M., Zhang, L., Huynh, H.P., Ong, Z., Liang, Y., He, B., Goh, R.S.M., Huynh, R.: Optimizing the mapreduce framework on Intel Xeon Phi coprocessor. In 2013 IEEE International Conference on Big Data, pp. 125\u2013130. IEEE (2013)","DOI":"10.1109\/BigData.2013.6691563"},{"key":"640_CR37","doi-asserted-by":"crossref","unstructured":"Heinecke, A., Vaidyanathan, K., Smelyanskiy, M., Kobotov, A., Dubtsov, R., Henry, G., Shet, A.G., Chrysos, G., Dubey, P.: Design and implementation of the linpack benchmark for single and multi-node systems based on Intel\u00ae Xeon Phi coprocessor. In: 2013 IEEE 27th International Symposium on Parallel & Distributed Processing (IPDPS), pp. 126\u2013137. IEEE (2013)","DOI":"10.1109\/IPDPS.2013.113"},{"key":"640_CR38","first-page":"1254","volume-title":"Encyclopedia of Parallel Computing","author":"DH Bailey","year":"2011","unstructured":"Bailey, D.H.: NAS parallel benchmarks. In: Padua, D. (ed.) Encyclopedia of Parallel Computing, pp. 1254\u20131259. Springer, Heidelberg (2011)"},{"key":"640_CR39","unstructured":"NPB in C homepage. http:\/\/aces.snu.ac.kr\/software\/snu-npb\/ . Accessed 8 Aug 2019"},{"issue":"6","key":"640_CR40","doi-asserted-by":"crossref","first-page":"702","DOI":"10.1002\/cpe.1556","volume":"22","author":"M Geimer","year":"2010","unstructured":"Geimer, M., Wolf, F., Wylie, B.J.N., \u00c1brah\u00e1m, E., Becker, D., Mohr, B.: The scalasca performance toolset architecture. Concurr. Comput. Pract. Exp. 22(6), 702\u2013719 (2010)","journal-title":"Concurr. Comput. Pract. Exp."},{"key":"640_CR41","volume-title":"Using OpenMP The Next Step: Affinity, Accelerators, Tasking, and SIMD","author":"R Van der Pas","year":"2017","unstructured":"Van der Pas, R., Stotzer, E., Terboven, C.: Using OpenMP The Next Step: Affinity, Accelerators, Tasking, and SIMD. MIT Press, Cambridge (2017)"},{"key":"640_CR42","doi-asserted-by":"crossref","unstructured":"Sui, Y., Fan, X.I., Zhou, H., Xue, J.: Loop-oriented array-and field-sensitive pointer analysis for automatic SIMD vectorization. In: ACM SIGPLAN Notices, vol. 51, pp. 41\u201351. ACM (2016)","DOI":"10.1145\/2980930.2907957"},{"key":"640_CR43","unstructured":"Zhou, H.: Compiler techniques for improving SIMD parallelism. PhD thesis, University of New South Wales, Sydney, Australia (2016)"},{"key":"640_CR44","unstructured":"NegevHPC Project. https:\/\/www.negevhpc.com . Accessed 8 Aug 2019"}],"container-title":["International Journal of Parallel Programming"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-019-00640-3.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10766-019-00640-3\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-019-00640-3.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,9,18]],"date-time":"2023-09-18T19:08:06Z","timestamp":1695064086000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10766-019-00640-3"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,8,8]]},"references-count":44,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2020,2]]}},"alternative-id":["640"],"URL":"https:\/\/doi.org\/10.1007\/s10766-019-00640-3","relation":{},"ISSN":["0885-7458","1573-7640"],"issn-type":[{"value":"0885-7458","type":"print"},{"value":"1573-7640","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,8,8]]},"assertion":[{"value":"14 November 2018","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"31 July 2019","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"8 August 2019","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}