{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T07:44:35Z","timestamp":1740123875271,"version":"3.37.3"},"reference-count":22,"publisher":"Springer Science and Business Media LLC","issue":"4","license":[{"start":{"date-parts":[[2020,6,24]],"date-time":"2020-06-24T00:00:00Z","timestamp":1592956800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2020,6,24]],"date-time":"2020-06-24T00:00:00Z","timestamp":1592956800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"funder":[{"DOI":"10.13039\/501100002347","name":"Bundesministerium f\u00fcr Bildung und Forschung","doi-asserted-by":"publisher","award":["01IS16026A"],"award-info":[{"award-number":["01IS16026A"]}],"id":[{"id":"10.13039\/501100002347","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Int J Parallel Prog"],"published-print":{"date-parts":[[2020,8]]},"DOI":"10.1007\/s10766-020-00670-2","type":"journal-article","created":{"date-parts":[[2020,6,24]],"date-time":"2020-06-24T14:03:20Z","timestamp":1593007400000},"page":"675-691","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":2,"title":["Massively Parallel Rule-Based Interpreter Execution on GPUs Using Thread Compaction"],"prefix":"10.1007","volume":"48","author":[{"given":"M.","family":"K\u00f6ster","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.","family":"Gro\u00df","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Kr\u00fcger","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2020,6,24]]},"reference":[{"key":"670_CR1","unstructured":"AMD: AMD Vega Instruction Set Architecture (2019)"},{"key":"670_CR2","doi-asserted-by":"crossref","unstructured":"Billeter, M., Olsson, O., Assarsson, U.: Efficient stream compaction on wide simd many-core architectures. In: Proceedings of the Conference on High Performance Graphics 2009, HPG \u201909, pp. 159\u2013166. Association for Computing Machinery, New York, NY, USA (2009)","DOI":"10.1145\/1572769.1572795"},{"key":"670_CR3","doi-asserted-by":"publisher","first-page":"152","DOI":"10.1007\/978-3-319-04132-2_11","volume-title":"Practical Aspects of Declarative Languages","author":"F Campeotto","year":"2014","unstructured":"Campeotto, F., Dal Pal\u00f9, A., Dovier, A., Fioretto, F., Pontelli, E.: Exploring the use of GPUs in constraint solving. In: Flatt, M., Guo, H.F. (eds.) Practical Aspects of Declarative Languages, pp. 152\u2013167. Springer, Cham (2014)"},{"key":"670_CR4","doi-asserted-by":"crossref","unstructured":"Fung, W.W.L., Aamodt, T.M.: Thread block compaction for efficient SIMT control flow. In: 2011 IEEE 17th International Symposium on High Performance Computer Architecture, pp. 25\u201336 (2011)","DOI":"10.1109\/HPCA.2011.5749714"},{"key":"670_CR5","doi-asserted-by":"publisher","first-page":"141","DOI":"10.1016\/S0020-0190(00)00048-X","volume":"74","author":"L Granvilliers","year":"2000","unstructured":"Granvilliers, L., Hains, G.: A conservative scheme for parallel interval narrowing. Inf. Process. Lett. 74, 141\u2013146 (2000)","journal-title":"Inf. Process. Lett."},{"key":"670_CR6","doi-asserted-by":"crossref","unstructured":"Hoberock, J., Lu, V., Jia, Y., Hart, J.: Stream compaction for deferred shading, pp. 173\u2013180 (2009)","DOI":"10.1145\/1572769.1572797"},{"issue":"6","key":"670_CR7","doi-asserted-by":"publisher","first-page":"178","DOI":"10.1111\/cgf.12083","volume":"32","author":"DM Hughes","year":"2013","unstructured":"Hughes, D.M., Lim, I.S., Jones, M.W., Knoll, A., Spencer, B.: Ink-compact: in-kernel stream compaction and its application to multi-kernel data visualization on general-purpose GPUs. Comput. Graph. Forum 32(6), 178\u2013188 (2013)","journal-title":"Comput. Graph. Forum"},{"key":"670_CR8","unstructured":"Hunger, R.: Floating Point Operations in Matrix\u2013Vector Calculus. Technical report, Technische Universit\u00e4t M\u00fcnchen (2007)"},{"key":"670_CR9","series-title":"Cambridge Monographs on Mechanics","volume-title":"Lagrangian Fluid Dynamics Using Smoothed Particle Hydrodynamics","author":"M Kelager","year":"2006","unstructured":"Kelager, M.: Lagrangian Fluid Dynamics Using Smoothed Particle Hydrodynamics. Cambridge Monographs on Mechanics, vol. 77. University of Copenhagen, Copenhagen (2006)"},{"key":"670_CR10","doi-asserted-by":"crossref","unstructured":"K\u00f6ster, M., Gro\u00df, J., Kr\u00fcger, A.: FANG: fast and efficient successor-state generation for heuristic optimization on GPUs. In: International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP). Springer (2019)","DOI":"10.1007\/978-3-030-38991-8_15"},{"key":"670_CR11","doi-asserted-by":"crossref","unstructured":"K\u00f6ster, M., Gro\u00df, J., Kr\u00fcger, A.: Parallel tracking and reconstruction of states in heuristic optimization systems on GPUs. In: International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT-2019). IEEE (2019)","DOI":"10.1109\/PDCAT46702.2019.00016"},{"key":"670_CR12","doi-asserted-by":"publisher","first-page":"01","DOI":"10.5121\/ijcga.2016.6301","volume":"6","author":"M K\u00f6ster","year":"2016","unstructured":"K\u00f6ster, M., Kr\u00fcger, A.: Adaptive position-based fluids: improving performance of fluid simulations for real-time applications. Int. J. Comput. Graph. Animat. 6, 01\u201316 (2016)","journal-title":"Int. J. Comput. Graph. Animat."},{"key":"670_CR13","doi-asserted-by":"publisher","first-page":"1441003","DOI":"10.1142\/S0129626414410035","volume":"24","author":"M K\u00f6ster","year":"2014","unstructured":"K\u00f6ster, M., Lei\u00dfa, R., Hack, S., Membarth, R., Slusallek, P.: Code refinement of stencil codes. Parallel Process. Lett. 24, 1441003 (2014)","journal-title":"Parallel Process. Lett."},{"key":"670_CR14","doi-asserted-by":"crossref","unstructured":"Lustig, D., Sahasrabuddhe, S., Giroux, O.: A formal analysis of the NVIDIA PTX memory consistency model. In: Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS \u201919, pp. 257\u2013270. Association for Computing Machinery, New York, NY, USA (2019)","DOI":"10.1145\/3297858.3304043"},{"key":"670_CR15","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/2461912.2461984","volume":"32","author":"M Macklin","year":"2013","unstructured":"Macklin, M., M\u00fcller, M.: Position based fluids. ACM Trans. Graph. 32, 1\u2013104 (2013)","journal-title":"ACM Trans. Graph."},{"issue":"2","key":"670_CR16","doi-asserted-by":"publisher","first-page":"109","DOI":"10.1016\/j.jvcir.2007.01.005","volume":"18","author":"M M\u00fcller","year":"2007","unstructured":"M\u00fcller, M., Heidelberger, B., Hennix, M., Ratcliff, J.: Position based dynamics. J. Vis. Commun. Image Represent. 18(2), 109\u2013118 (2007)","journal-title":"J. Vis. Commun. Image Represent."},{"key":"670_CR17","unstructured":"NVIDIA: Faster Parallel Reductions on Kepler (2014)"},{"key":"670_CR18","unstructured":"NVIDIA: CUDA C Programming Guide v10 (2019)"},{"key":"670_CR19","volume-title":"Types and Programming Languages","author":"BC Pierce","year":"2002","unstructured":"Pierce, B.C.: Types and Programming Languages, 1st edn. The MIT Press, Cambridge (2002)","edition":"1"},{"issue":"3","key":"670_CR20","doi-asserted-by":"publisher","first-page":"356","DOI":"10.1145\/2508148.2485953","volume":"41","author":"M Rhu","year":"2013","unstructured":"Rhu, M., Erez, M.: Maximizing SIMD resource utilization in GPGPUs with SIMD lane permutation. SIGARCH Comput. Archit. News 41(3), 356\u2013367 (2013)","journal-title":"SIGARCH Comput. Archit. News"},{"key":"670_CR21","unstructured":"Ruiz-Andino, A., Araujo, L., S\u00e1enz-P\u00e9rez, F., Ruz, J.J.: Parallel arc-consistency for functional constraints. In: Implementation Technology for Programming Languages based on Logic (1998)"},{"key":"670_CR22","doi-asserted-by":"crossref","unstructured":"Wald, I.: Active thread compaction for GPU path tracing. In: Proceedings of the ACM SIGGRAPH Symposium on High Performance Graphics, HPG \u201911, pp. 51\u201358. Association for Computing Machinery, New York, NY, USA (2011)","DOI":"10.1145\/2018323.2018331"}],"container-title":["International Journal of Parallel Programming"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-020-00670-2.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s10766-020-00670-2\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s10766-020-00670-2.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,6,24]],"date-time":"2021-06-24T00:22:47Z","timestamp":1624494167000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s10766-020-00670-2"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,6,24]]},"references-count":22,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2020,8]]}},"alternative-id":["670"],"URL":"https:\/\/doi.org\/10.1007\/s10766-020-00670-2","relation":{},"ISSN":["0885-7458","1573-7640"],"issn-type":[{"type":"print","value":"0885-7458"},{"type":"electronic","value":"1573-7640"}],"subject":[],"published":{"date-parts":[[2020,6,24]]},"assertion":[{"value":"8 October 2019","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"15 June 2020","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"24 June 2020","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}