{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,16]],"date-time":"2025-01-16T05:38:07Z","timestamp":1737005887228,"version":"3.33.0"},"reference-count":40,"publisher":"Springer Science and Business Media LLC","issue":"2-3","license":[{"start":{"date-parts":[[2007,4,20]],"date-time":"2007-04-20T00:00:00Z","timestamp":1177027200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[2007,6]]},"DOI":"10.1007\/s10836-006-0552-x","type":"journal-article","created":{"date-parts":[[2007,4,17]],"date-time":"2007-04-17T06:12:39Z","timestamp":1176790359000},"page":"131-144","source":"Crossref","is-referenced-by-count":2,"title":["A Built-in Self-test and Diagnosis Strategy for Chemically Assembled Electronic Nanotechnology"],"prefix":"10.1007","volume":"23","author":[{"given":"Jason G.","family":"Brown","sequence":"first","affiliation":[]},{"given":"R. D.","family":"Blanton","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2007,4,20]]},"reference":[{"key":"10552_CR1","volume-title":"Digital Systems Testing and Testable Design","author":"M. Abramovici","year":"1990","unstructured":"M. Abramovici, M.A. Breuer, and A.D. Friedman, Digital Systems Testing and Testable Design, Piscataway, NJ: IEEE, 1990."},{"key":"10552_CR2","doi-asserted-by":"crossref","unstructured":"J.G. Brown and R.D. Blanton, \u201cCAEN\u2013BIST: Testing the NanoFabric,\u201d in International Test Conference, Oct. 2004, pp. 462\u2013471.","DOI":"10.1109\/TEST.2004.1386982"},{"key":"10552_CR3","doi-asserted-by":"crossref","unstructured":"M. Butts, A. DeHon, and S.C. Goldstein, \u201cMolecular Electronics: Devices, Systems and Tools for Gigagate, Gigabit Chip,\u201d in Proceedings of International Conference on Computer Aided Design, 2002, pp. 443\u2013440.","DOI":"10.1145\/774572.774636"},{"key":"10552_CR4","doi-asserted-by":"crossref","first-page":"391","DOI":"10.1126\/science.285.5426.391","volume":"285","author":"C.P. Collier","year":"1999","unstructured":"C.P. Collier et al., \u201cElectronically Configurable Molecular-based Logic Gates,\u201d Science, vol. 285, pp. 391\u2013394, July 1999.","journal-title":"Science"},{"key":"10552_CR5","doi-asserted-by":"crossref","first-page":"2214","DOI":"10.1063\/1.1363692","volume":"78","author":"Y. Cui","year":"2001","unstructured":"Y. Cui et al., \u201cDiameter-controlled Synthesis of Single Crystal Silicon Nanowires,\u201d Appl. Phys. Lett., vol. 78, pp. 2214\u20132216, 2001.","journal-title":"Appl. Phys. Lett."},{"key":"10552_CR6","doi-asserted-by":"crossref","unstructured":"B. Culbertson et al., \u201cDefect Tolerance on the Teramac Custom Computer,\u201d in Proceedings of 5th IEEE Symposium on Field-programmable Custom Computing Machines, 1997, pp. 140\u2013147.","DOI":"10.1109\/FPGA.1997.624611"},{"key":"10552_CR7","doi-asserted-by":"crossref","unstructured":"L. Durbek and N.J. Macias, \u201cDefect Tolerant, Fine-Grained Parallel Testing of a Cell Matrix,\u201d in Proceedings of SPIE ITCom, vol. 4867, 2002.","DOI":"10.1117\/12.455473"},{"key":"10552_CR8","doi-asserted-by":"crossref","unstructured":"S.C. Goldstein and M. Budiu, \u201cNanoFabrics: Spatial Computing Using Molecular Electronics,\u201d in Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001, pp. 178\u2013191.","DOI":"10.1145\/384285.379262"},{"key":"10552_CR9","doi-asserted-by":"crossref","unstructured":"S.C. Goldstein and D. Rosewater, \u201cDigital Logic Using Molecular Electronics,\u201d in Proceedings of the IEEE International Solid State Circuits Conference, 2002, pp. 204\u2013205.","DOI":"10.1109\/ISSCC.2002.993007"},{"key":"10552_CR10","doi-asserted-by":"crossref","unstructured":"S. Goldstein et al., \u201cReconfigurable Computing and Electronic Nanotechnology,\u201d in Proceedings of IEEE International Conference on Application-Specific Systems, Architectures, and Processors, 2003, pp. 132\u2013142.","DOI":"10.1109\/ASAP.2003.1212837"},{"key":"10552_CR11","doi-asserted-by":"crossref","first-page":"1716","DOI":"10.1126\/science.280.5370.1716","volume":"280","author":"J.R. Heath","year":"1998","unstructured":"J.R. Heath et al., \u201cA Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology,\u201d Science, vol. 280, pp. 1716\u20131721, 1998 (June).","journal-title":"Science"},{"key":"10552_CR12","unstructured":"J. Huang, M.B. Tahoori, and F. Lombardi, \u201cOn the Defect Tolerance of Nano-Scale Two-dimensional Crossbars,\u201d in IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004, pp. 96\u2013104."},{"key":"10552_CR13","doi-asserted-by":"crossref","unstructured":"N.K. Jha and S. Gupta, Testing of Digital Systems, ch. 15, Cambridge, UK: Cambridge University Press, 2003.","DOI":"10.1017\/CBO9780511816321"},{"key":"10552_CR14","doi-asserted-by":"crossref","first-page":"562","DOI":"10.1063\/1.125852","volume":"76","author":"T. Kamins","year":"2000","unstructured":"T. Kamins et al., \u201cChemical-vapor Deposition of Si Nanowires Nucleated by TiSi2 islands on Si,\u201d Appl. Phys. Lett., vol. 76, pp. 562\u2013564, 2000.","journal-title":"Appl. Phys. Lett."},{"key":"10552_CR15","doi-asserted-by":"crossref","first-page":"519","DOI":"10.1002\/1439-7641(20020617)3:6<519::AID-CPHC519>3.0.CO;2-2","volume":"3","author":"Y. Luo","year":"2002","unstructured":"Y. Luo et al., \u201cTwo-dimensional Molecular Electronics Circuits,\u201d ChemPhysChem, vol. 3, pp. 519\u2013525, 2002.","journal-title":"ChemPhysChem"},{"key":"10552_CR16","doi-asserted-by":"crossref","first-page":"249","DOI":"10.1002\/1521-4095(200102)13:4<249::AID-ADMA249>3.0.CO;2-9","volume":"13","author":"J. Mbindyo","year":"2001","unstructured":"J. Mbindyo et al., \u201cDNA-directed Assembly of Gold Nanowires on Complementary Surfaces,\u201d Adv. Mater., vol. 13, pp. 249\u2013254, 2001.","journal-title":"Adv. Mater."},{"key":"10552_CR17","doi-asserted-by":"crossref","unstructured":"C. Metra et al., \u201cNovel Technique for Testing FPGAs,\u201d in Proceedings of Design, Automation and Test in Europe, February 1998, pp. 89\u201394.","DOI":"10.1109\/DATE.1998.655841"},{"key":"10552_CR18","unstructured":"M. Mishra and S.C. Goldstein, \u201cScalable Defect Tolerance for Molecular Electronics,\u201d in Proceedings of International Symposium on High-performance Architecture, Feb. 2002."},{"key":"10552_CR19","doi-asserted-by":"crossref","unstructured":"M. Mishra and S.C. Goldstein, \u201cDefect Tolerance at the End of the Roadmap,\u201d in Proceedings of International Test Conference, Sept\u2013Oct 2003, pp. 1201\u20131210.","DOI":"10.1109\/TEST.2003.1271109"},{"key":"10552_CR20","doi-asserted-by":"crossref","unstructured":"D.J. Pena et al., \u201cElectrochemical Synthesis of Multi-material Nanowires as Building Blocks for Functional Nanostructures,\u201d in MRS Symposium Proceedings, vol. 636, 2001.","DOI":"10.1557\/PROC-636-D4.6.1"},{"key":"10552_CR21","doi-asserted-by":"crossref","unstructured":"R. Rajsuman, \u201cDesign and Test of Large Embedded Memories: An Overview,\u201d in IEEE Design and Test of Computers, vol. 18, May\u2013June 2001, pp. 16\u201327.","DOI":"10.1109\/54.922800"},{"key":"10552_CR22","unstructured":"M.A. Reed and T. Lee, ed., Molecular Electronics, ch. 13, American Scientific, 2003."},{"key":"10552_CR23","doi-asserted-by":"crossref","first-page":"94","DOI":"10.1126\/science.289.5476.94","volume":"289","author":"T. Rueckes","year":"2000","unstructured":"T. Rueckes et al., \u201cCarbon Nanotube-based Nonvolatile Random Access Memory for Molecular Computing,\u201d Science, vol. 289, pp. 94\u201397, 2000.","journal-title":"Science"},{"issue":"553","key":"10552_CR24","doi-asserted-by":"crossref","first-page":"782","DOI":"10.1126\/science.293.5531.782","volume":"293","author":"R. Service","year":"2001","unstructured":"R. Service, \u201cAssembling Nanocircuits from the Bottom Up,\u201d Science, vol. 293, no. 553, pp. 782\u2013785, 2001.","journal-title":"Science"},{"key":"10552_CR25","doi-asserted-by":"crossref","unstructured":"S.K. Sinha et al., \u201cTunable Fault Tolerance for Runtime Reconfigurable Architectures,\u201d in IEEE Symposium on Field-programmable Custom Computing Machines, April 2000, pp. 185\u2013192.","DOI":"10.1109\/FPGA.2000.903405"},{"key":"10552_CR26","doi-asserted-by":"crossref","first-page":"627","DOI":"10.1063\/1.124462","volume":"75","author":"H. Soh","year":"1999","unstructured":"H. Soh et al., \u201cIntegrated Nanotube Circuits: Controlled Growth and Ohmic Contacting of Single-walled Carbon Nanotubes.\u201d Appl. Phys. Lett., vol. 75, pp. 627\u2013629, 1999.","journal-title":"Appl. Phys. Lett."},{"key":"10552_CR27","doi-asserted-by":"crossref","unstructured":"M.R. Stan et al., \u201cMolecular Electronics: From Devices and Interconnect to Circuits and Architecture,\u201d in Proceedings of the IEEE, vol. 91, November 2003, pp. 1940\u20131957.","DOI":"10.1109\/JPROC.2003.818327"},{"key":"10552_CR28","doi-asserted-by":"crossref","unstructured":"C. Stroud et al., \u201cBuilt-in Self-test of Logic Blocks in FPGAs (Finally, a Free Lunch: BIST Without Overhead!),\u201d in Proceedings of IEEE VLSI Test Symposium, 1996, pp. 387\u2013392.","DOI":"10.1109\/VTEST.1996.510883"},{"key":"10552_CR29","doi-asserted-by":"crossref","unstructured":"C. Stroud, E. Lee, and M. Abramovici, \u201cBIST-based Diagnostics for FPGA Logic Blocks,\u201d in Proceedings of IEEE Inter-national Test Conference, 1997, pp. 539\u2013547.","DOI":"10.1109\/TEST.1997.639662"},{"key":"10552_CR30","unstructured":"M.B. Tahoori and S. Mitra, \u201cFault Detection and Diagnosis Techniques for Molecular Computing,\u201d in Proceedings of NSTI Nanotechnology Conference and Trade Show, 2004, pp. 57\u201360."},{"key":"10552_CR31","doi-asserted-by":"crossref","unstructured":"M.B. Tahoori and S. Mitra, \u201cDefect and Fault Tolerance of Reconfigurable Molecular Computing,\u201d in Proceedings of Field Custom Computing Machines Conference, 2004, pp. 176\u2013185.","DOI":"10.1109\/FCCM.2004.26"},{"key":"10552_CR32","doi-asserted-by":"crossref","unstructured":"D.E. Thomas and P. Moorby, The Verilog Hardware Description Language, Kluwer, Dordrecht, The Netherlands, 1991.","DOI":"10.1007\/978-1-4615-3992-6"},{"key":"10552_CR33","unstructured":"F. Toth, \u201cGet the EasyPath Solution,\u201d Xcell Journal, Summer 2003."},{"issue":"1","key":"10552_CR34","doi-asserted-by":"crossref","first-page":"19","DOI":"10.1109\/54.902819","volume":"18","author":"S. Venkataraman","year":"2001","unstructured":"S. Venkataraman and S.B. Drummonds, \u201cPoirot: Applications of a Logic Fault Diagnosis Tool,\u201d IEEE Design and Test of Computers, vol. 18, no. 1, pp. 19\u201330, 2001.","journal-title":"IEEE Design and Test of Computers"},{"key":"10552_CR35","doi-asserted-by":"crossref","unstructured":"Z. Wang and K. Chakrabarty, \u201cBuilt-in Self-test of Molecular Electronics-Based Nanofabrics,\u201d in Proceedings of European Test Symposium, May 2005, pp. 168\u2013173.","DOI":"10.1109\/ETS.2005.10"},{"key":"10552_CR36","first-page":"100","volume":"146","author":"S.J. Wang","year":"1999","unstructured":"S.J. Wang and T.M. Tsai, \u201cTest and Diagnosis of Faulty Logic Blocks in FPGAs,\u201d IEE Proc. E, vol. 146, pp. 100\u2013106, March 1999.","journal-title":"IEE Proc. E"},{"key":"10552_CR37","doi-asserted-by":"crossref","first-page":"539","DOI":"10.1038\/28998","volume":"394","author":"E. Winfree","year":"1998","unstructured":"E. Winfree et al., \u201cDesign and Self-assembly of Two-dimensional DNA Crystals,\u201d Nature, vol. 394, pp. 539\u2013544, 1998.","journal-title":"Nature"},{"key":"10552_CR38","doi-asserted-by":"crossref","first-page":"1823","DOI":"10.1021\/cr980002q","volume":"99","author":"Y. Xia","year":"1999","unstructured":"Y. Xia et al., \u201cUnconventional Methods for Fabricating and Patterning Nanostructures,\u201d Chem Rev., vol. 99, pp. 1823\u20131848, 1999.","journal-title":"Chem Rev."},{"key":"10552_CR39","doi-asserted-by":"crossref","unstructured":"M.M. Ziegler and M.R. Stan, \u201cA Case for CMOS\/Nano Co-design,\u201d in Proceedings of the International Conference on Computer-aided Design, November 2002, pp. 348\u2013352.","DOI":"10.1145\/774572.774624"},{"key":"10552_CR40","doi-asserted-by":"crossref","unstructured":"M.M. Ziegler and M.R. Stan, \u201cThe CMOS\/Nano Interface from a Circuits Perspective,\u201d in Proceedings of the International Symposium on Circuits and Systems, May 2003, pp. 904\u2013907.","DOI":"10.1109\/ISCAS.2003.1206367"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-006-0552-x.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10836-006-0552-x\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-006-0552-x","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,15]],"date-time":"2025-01-15T20:23:50Z","timestamp":1736972630000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10836-006-0552-x"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,4,20]]},"references-count":40,"journal-issue":{"issue":"2-3","published-print":{"date-parts":[[2007,6]]}},"alternative-id":["10552"],"URL":"https:\/\/doi.org\/10.1007\/s10836-006-0552-x","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"type":"print","value":"0923-8174"},{"type":"electronic","value":"1573-0727"}],"subject":[],"published":{"date-parts":[[2007,4,20]]}}}