{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,17]],"date-time":"2025-01-17T07:40:21Z","timestamp":1737099621787,"version":"3.33.0"},"reference-count":29,"publisher":"Springer Science and Business Media LLC","issue":"4","license":[{"start":{"date-parts":[[2007,6,7]],"date-time":"2007-06-07T00:00:00Z","timestamp":1181174400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[2007,8]]},"DOI":"10.1007\/s10836-007-0760-z","type":"journal-article","created":{"date-parts":[[2007,6,14]],"date-time":"2007-06-14T06:21:20Z","timestamp":1181802080000},"page":"275-292","source":"Crossref","is-referenced-by-count":2,"title":["Functionally Fault-tolerant DSP Microprocessor using Sigma\u2013delta Modulated Signals"],"prefix":"10.1007","volume":"23","author":[{"given":"Erik","family":"Sch\u00fcler","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marcelo Ienczczak","family":"Erigson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luigi","family":"Carro","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2007,6,7]]},"reference":[{"issue":"3","key":"10760_CR1","doi-asserted-by":"crossref","first-page":"258","DOI":"10.1109\/4.121546","volume":"27","author":"F.L. Yang","year":"1992","unstructured":"F.L. Yang and R.A. Saleh, \u201cSimulation and Analysis of Transient Faults in Digital Circuits,\u201d IEEE J. Solid-state Circuits, vol. 27, no. 3, pp. 258\u2013264, March 1992.","journal-title":"IEEE J. Solid-state Circuits"},{"issue":"3","key":"10760_CR2","doi-asserted-by":"crossref","first-page":"468","DOI":"10.1109\/23.277547","volume":"39","author":"G.C. Messenger","year":"1992","unstructured":"G.C. Messenger, \u201cA Summary Review of Displacement Damage from High-energy Radiation in Silicon Semiconductors and Semiconductor Devices,\u201d IEEE Trans. Nucl. Sci., vol. 39, no. 3, pp. 468\u2013473, June 1992.","journal-title":"IEEE Trans. Nucl. Sci."},{"key":"10760_CR3","doi-asserted-by":"crossref","first-page":"1859","DOI":"10.1109\/23.211378","volume":"39","author":"E.C. Smith","year":"1992","unstructured":"E.C. Smith and M. Shoga, \u201cDouble Upsets from Glancing Collisions: A Simple Model Verified with Flight Data,\u201d IEEE Trans. Nucl. Sci., vol. 39, pp. 1859\u20131864, 1992.","journal-title":"IEEE Trans. Nucl. Sci."},{"key":"10760_CR4","doi-asserted-by":"crossref","unstructured":"P.K. Chande, A.K. Ramani, and P.C. Sharma, \u201cModular TMR Multiprocessor System,\u201d IEEE Trans. Ind. Electron., vol. 36, no. 1, Feb. 1989.","DOI":"10.1109\/41.20342"},{"key":"10760_CR5","unstructured":"M. Rebaudengo and M.S. Reorda, \u201cEvaluating cost and effectiveness of software redundancy techniques for hardware errors detection,\u201d Digest of Fast Abstracts: FTCS-28, The 28th Annual International Symposium on Fault-tolerant Computing, June 23\u201325, Munich (Germany), pp. 88\u201389."},{"key":"10760_CR6","first-page":"476","volume-title":"Delta\u2013sigma Data Converters: Theory, Design and Simulation","author":"S.R. Norsworthy","year":"1997","unstructured":"S.R. Norsworthy, R. Schreier, G.C. Temes, Delta\u2013sigma Data Converters: Theory, Design and Simulation, New York: IEEE Press, 1997, 476 p."},{"key":"10760_CR7","doi-asserted-by":"crossref","unstructured":"E. Sch\u00fcler and L. Carro, \u201cIncreasing Fault Tolerance to Multiple Upsets Using Digital Sigma\u2013Delta Modulators,\u201d 11th International On-line Testing Symposium (IOLTS\u201905). France, 2005. June 27\u201329, 2005.","DOI":"10.1109\/IOLTS.2005.37"},{"key":"10760_CR8","doi-asserted-by":"crossref","unstructured":"E. Sch\u00fcler and L. Carro, \u201cReliable Digital Circuits Design using Sigma\u2013delta Modulated Signals,\u201d 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2005 (DFT\u201905), 03\u201305 Oct. 2005, USA.","DOI":"10.1109\/DFTVS.2005.57"},{"key":"10760_CR9","doi-asserted-by":"crossref","unstructured":"P. Basedau and H. Qiuting, \u201cA post processing method for reducing substrate coupling in mixed-signal integrated circuits,\u201d Symposium on VLSI Circuits, Kyoto, 8\u201310 June, pp. 41\u201342, 1995.","DOI":"10.1109\/VLSIC.1995.520679"},{"key":"10760_CR10","unstructured":"IBM. \u201cSOI Technology: IBM\u2019s Next Advance in Chip Design\u201d. Last access: Oct. 2005. http:\/\/www-03.ibm.com\/chips\/about\/technology\/technologies\/soi\/ ."},{"key":"10760_CR11","doi-asserted-by":"crossref","unstructured":"H. Weaver, et al., \u201cAn SEU Tolerant Memory Cell Derived from Fundamental Studies of SEU Mechanisms in SRAM,\u201d IEEE Trans. Nucl. Sci., vol. 34, no. 6, Dec. 1987.","DOI":"10.1109\/TNS.1987.4337466"},{"key":"10760_CR12","first-page":"702","volume-title":"Digital Integrated Circuits\u2014A Design Perspective","author":"J.M. Rabaey","year":"1996","unstructured":"J.M. Rabaey, Digital Integrated Circuits\u2014A Design Perspective, Upper Saddle River, NJ: Prentice Hall, 1996, 702 p."},{"issue":"2","key":"10760_CR13","doi-asserted-by":"crossref","first-page":"149","DOI":"10.1023\/A:1011125927317","volume":"17","author":"E.F. Cota","year":"2001","unstructured":"E.F. Cota, et al., \u201cSynthesis of an 8051-like Microcontroller Tolerant to Transient Faults,\u201d J. Electron. Testing-Theory App., (Dordrecht) vol. 17, no. 2, pp. 149\u2013162, 2001.","journal-title":"J. Electron. Testing-Theory App., (Dordrecht)"},{"key":"10760_CR14","unstructured":"J.S. Plank, \u201cA Tutorial on Reed\u2013Solomon Coding for Fault-tolerance in RAID-like Systems,\u201d Department of Computer Science, University of Tennessee."},{"key":"10760_CR15","doi-asserted-by":"crossref","first-page":"518","DOI":"10.1109\/TC.1984.1676475","volume":"33","author":"K.H. Huang","year":"1984","unstructured":"K.H. Huang and J.A. Abraham, \u201cAlgorithm-Based Fault Tolerance for Matrix Operations,\u201d IEEE Trans. Comput., vol. 33, pp. 518\u2013528, 1984.","journal-title":"IEEE Trans. Comput."},{"issue":"3","key":"10760_CR16","doi-asserted-by":"crossref","first-page":"216","DOI":"10.1109\/MDT.2004.11","volume":"21","author":"S.K. Gupta","year":"2004","unstructured":"S.K. Gupta, M.A. Breuer, and T.M. Mak, \u201cDefect and Error Tolerance in the Presence of Massive Numbers of Defects,\u201d IEEE Des. Test Comput., vol. 21, no. 3, pp. 216\u2013227, May 2004.","journal-title":"IEEE Des. Test Comput."},{"key":"10760_CR17","unstructured":"B.W. Johnson, \u201cFault Tolerance,\u201d The Electrical Engineering Handbook, R.C. Dorf, ed., Boca Raton, FL: CRC Press, 1993, p. 2020."},{"key":"10760_CR18","doi-asserted-by":"crossref","unstructured":"K. Nepal, R.I. Bahar, J. Mundy, W.R. Patterson, A. Zaslavsky, \u201cDesigning Logic Circuits for Probabilistic Computation in the Presence of Noise,\u201d Proceedings of 42nd IEEE Design and Automation Conference (DAC2005), June 13\u201317, 2005, Anaheim, CA.","DOI":"10.1145\/1065579.1065706"},{"key":"10760_CR19","doi-asserted-by":"crossref","unstructured":"L. Anghel, D. Alexandrescu, and M. Nicolaidis, \u201cEvaluation of soft error tolerance technique based on time and\/or space redundancy,\u201d Proceedings of 13rd IEEE Symposium on Integrated Circuits and Systems Design (ICSD 2000), Manaus, Brazil, September 2000, pp. 237\u2013242.","DOI":"10.1109\/SBCCI.2000.876036"},{"issue":"8","key":"10760_CR20","doi-asserted-by":"crossref","first-page":"2110","DOI":"10.1109\/78.533736","volume":"44","author":"C.L. Janer","year":"1996","unstructured":"C.L Janer, J.M. Quero, J.G. Ortega, and L.G. Franquelo, \u201cFully Parallel Stochastic Computation Architecture,\u201d IEEE Trans. Signal Process., vol. 44, no. 8, pp. 2110\u20132117, IEEE Computer Society, New York, 1996.","journal-title":"IEEE Trans. Signal Process"},{"key":"10760_CR21","isbn-type":"print","doi-asserted-by":"crossref","first-page":"289","DOI":"10.1109\/DFTVS.2004.1347851","volume-title":"Arithmetic Operators Robust to Multiple Simultaneous Upsets, Proceedings of the 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems\u2014DFT 2004","author":"C. Lisb\u00f4a","year":"2004","unstructured":"C. Lisb\u00f4a and L. Carro, \u201cArithmetic Operators Robust to Multiple Simultaneous Upsets,\u201d Proceedings of the 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems\u2014DFT 2004, pp. 289\u2013297, ISBN0-7695-2241-6. IEEE Computer Society, New York, October 2004.","ISBN":"https:\/\/id.crossref.org\/isbn\/0769522416"},{"key":"10760_CR22","doi-asserted-by":"crossref","unstructured":"J.C. Candy and G.C. Temes, Over Sampling Delta\u2013sigma Data Converters: Theory, Design, and Simulation, New York: IEEE Press, c1992. vol. xii, no. 499 p. il.","DOI":"10.1109\/9780470545461"},{"key":"10760_CR23","doi-asserted-by":"crossref","first-page":"122","DOI":"10.1007\/978-1-4615-2341-3","volume-title":"Analog Signal Generation for Built-in-self-test of Mixed-signal Integrated Circuits","author":"G.W. Robert","year":"1995","unstructured":"G.W. Robert and A.K. Lu, Analog Signal Generation for Built-in-self-test of Mixed-signal Integrated Circuits, Boston, MA: Kluwer, 1995, p122."},{"key":"10760_CR24","first-page":"2645","volume":"6","author":"F. Maloberti","year":"1992","unstructured":"F. Maloberti, \u201cNon Conventional Signal Processing by the Use of Sigma Delta Technique: A Tutorial Introduction,\u201d Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), vol. 6, pp. 2645\u20132648, May 1992.","journal-title":"Proc. IEEE Int. Symp. Circuits Syst. (ISCAS)"},{"key":"10760_CR25","doi-asserted-by":"crossref","first-page":"421","DOI":"10.1109\/ISCAS.1994.409399","volume":"5","author":"V. Fonte Dias da","year":"1994","unstructured":"V. da Fonte Dias, \u201cSigma\u2013Delta Signal Processing,\u201d IEEE Int. Symp. Circuits Syst. ISCAS\u201994, vol. 5, pp. 421\u2013424, 30 May\u20132 June 1994.","journal-title":"IEEE Int. Symp. Circuits Syst. ISCAS\u201994"},{"key":"10760_CR26","doi-asserted-by":"crossref","unstructured":"B.E. Boser and B.A. Wooley, \u201cThe Design of Sigma\u2013delta Modulation Analog-to-Digital Converters,\u201d IEEE J. Solid-state Circuits, vol. 23, no. 6, Dec. 1988.","DOI":"10.1109\/4.90025"},{"key":"10760_CR27","doi-asserted-by":"crossref","unstructured":"E. Sch\u00fcler, D.S. Farenzena, L. Carro, \u201cEvaluating Sigma\u2013Delta modulated signals to develop fault-tolerant circuits,\u201d Proc. of 11th IEEE European Test Symposium, 2006. ETS\u2019O6, Southampton, UK, 21\u201325 May, 2006.","DOI":"10.1109\/ETS.2006.19"},{"key":"10760_CR28","unstructured":"Available at http:\/\/www.analog.com Last access: Jan. 2006."},{"key":"10760_CR29","unstructured":"J.M.A. Tanskanen, \u201cCoefficient Quantization Error Free Fixed-point IIR Polynomial Predictor Design,\u201d Proc. 2000 IEEE Nordic Signal Processing Symposium, Kolmarden, Sweden, June 2000, pp. 219\u2013222."}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-007-0760-z.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10836-007-0760-z\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-007-0760-z","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,17]],"date-time":"2025-01-17T07:07:20Z","timestamp":1737097640000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10836-007-0760-z"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,6,7]]},"references-count":29,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2007,8]]}},"alternative-id":["10760"],"URL":"https:\/\/doi.org\/10.1007\/s10836-007-0760-z","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"type":"print","value":"0923-8174"},{"type":"electronic","value":"1573-0727"}],"subject":[],"published":{"date-parts":[[2007,6,7]]}}}