{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,26]],"date-time":"2025-01-26T05:30:02Z","timestamp":1737869402291,"version":"3.33.0"},"reference-count":20,"publisher":"Springer Science and Business Media LLC","issue":"1-3","license":[{"start":{"date-parts":[[2008,1,4]],"date-time":"2008-01-04T00:00:00Z","timestamp":1199404800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[2008,6]]},"DOI":"10.1007\/s10836-007-5032-4","type":"journal-article","created":{"date-parts":[[2008,1,3]],"date-time":"2008-01-03T21:26:29Z","timestamp":1199395589000},"page":"181-192","source":"Crossref","is-referenced-by-count":12,"title":["A Built-In Redundancy-Analysis Scheme for Random Access Memories with Two-Level Redundancy"],"prefix":"10.1007","volume":"24","author":[{"given":"Da-Ming","family":"Chang","sequence":"first","affiliation":[]},{"given":"Jin-Fu","family":"Li","sequence":"additional","affiliation":[]},{"given":"Yu-Jen","family":"Huang","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2008,1,4]]},"reference":[{"key":"5032_CR1","doi-asserted-by":"crossref","unstructured":"Bhavsar DK (1999) An algorithm for row-column self-repair of RAMs and its implementation in the Alpha 21264. In: Proc. Int\u2019l Test Conf. (ITC). Atlantic City, pp 311\u2013318, Sept","DOI":"10.1109\/TEST.1999.805645"},{"issue":"4","key":"5032_CR2","doi-asserted-by":"crossref","first-page":"386","DOI":"10.1109\/TR.2003.821925","volume":"52","author":"C-T Huang","year":"2003","unstructured":"Huang C-T, Wu C-F, Li J-F, Wu C-W (2003) Built-in redundancy analysis for memory yield improvement. IEEE Trans Reliab 52(4):386\u2013399, Dec","journal-title":"IEEE Trans Reliab"},{"key":"5032_CR3","unstructured":"Huang R-F, Li J-F, Yeh J-C, Wu C-W (2002) A simulator for evaluating redundancy analysis algorithms of repairable embedded memories. In: Proc. IEEE Int\u2019l Workshop on Memory Technology, Design and Testing (MTDT). Isle of Bendor, France, pp 68\u201373, July"},{"issue":"3","key":"5032_CR4","doi-asserted-by":"crossref","first-page":"323","DOI":"10.1109\/43.46807","volume":"9","author":"W-K Huang","year":"1990","unstructured":"Huang W-K, Shen Y-N, Lombardi F (1990) New approaches for the repair of memories with redundancy by row\/column deletion for yield enhancement. IEEE Trans Comput-Aided Des Integr Circuits Syst 9(3):323\u2013328, Mar","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"},{"key":"5032_CR5","doi-asserted-by":"crossref","unstructured":"Kawagoe T, Ohtani J, Niiro M, Ooishi T, Hamada M, Hidaka H (2000) A built-in self-repair analyzer (CRESTA) for embedded DRAMs. In: Proc. Int\u2019l Test Conf. (ITC), pp 567\u2013574","DOI":"10.1109\/TEST.2000.894250"},{"key":"5032_CR6","unstructured":"Kim I, Zorian Y, Komoriya G, Pham H, Higgins FP, Lweandowski JL (1998) Built in self repair for embedded high density SRAM. In: Proc. Int\u2019l Test Conf. (ITC), pp 1112\u20131119, Oct"},{"issue":"1","key":"5032_CR7","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1109\/MDT.1987.295111","volume":"4","author":"S-Y Kuo","year":"1987","unstructured":"Kuo S-Y, Fuchs WK (1987) Efficient spare allocation in reconfigurable arrays. IEEE Des Test Comput 4(1):24\u201331, Feb","journal-title":"IEEE Des Test Comput"},{"key":"5032_CR8","unstructured":"Li J-F, Wu C-W (2001) Memory fault diagnosis by syndrome compression. In: Proc. Conf. Design, Automation, and Test in Europe (DATE). Munich, pp 97\u2013101, Mar"},{"issue":"6","key":"5032_CR9","doi-asserted-by":"crossref","first-page":"742","DOI":"10.1109\/TVLSI.2005.848824","volume":"13","author":"J-F Li","year":"2005","unstructured":"Li J-F, Yeh J-C, Huang R-F, Wu C-W (2005) A built-in self-repair design for rams with 2-d redundancies. IEEE Trans Very Large Scale Integr (VLSI) Syst 13(6):742\u2013745, June","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"issue":"1","key":"5032_CR10","doi-asserted-by":"crossref","first-page":"34","DOI":"10.1109\/TVLSI.2005.863189","volume":"14","author":"S-K Lu","year":"2006","unstructured":"Lu S-K, Tsai Y-C, Hsu C-H, Wang K-H, Wu C-W (2006) Efficient built-in redundancy analysis for embedded memories with 2-D redundancy. IEEE Trans Very Large Scale Integr (VLSI) Syst 14(1):34\u201342, Jan","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"key":"5032_CR11","doi-asserted-by":"crossref","unstructured":"Nakahara S, Higeta K, Kohno M, Kawamura T, Kakitani K (1999) Built-in self-test for GHz embedded SRAMs using flexible pattern generator and new repair algorithm. In: Proc. Int\u2019l Test Conf. (ITC), pp 301\u2013310","DOI":"10.1109\/TEST.1999.805644"},{"key":"5032_CR12","doi-asserted-by":"crossref","unstructured":"Schober V, Paul S, Picot O (2001) Memory built-in self-repair using redundant words. In: Proc. Int\u2019l Test Conf. (ITC). Baltimore, pp 995\u20131001, Oct","DOI":"10.1109\/TEST.2001.966724"},{"key":"5032_CR13","unstructured":"Semiconductor Industry Association (2005) International technology roadmap for semiconductors (ITRS), 2005 edn. Seoul, Korea, Dec"},{"issue":"11","key":"5032_CR14","doi-asserted-by":"crossref","first-page":"1525","DOI":"10.1109\/4.165332","volume":"27","author":"A Tanabe","year":"1992","unstructured":"Tanabe A, Takeshima T, Koike H, Aimoto Y, Takada M, Ishijima T, Kasai N, Hada H, Shibahara K, Kunio T, Tanigawa T, Saeki T, Sakao M, Miyamoto H, Nozue H, Ohya S, Murotani T, Koyama K, Okuda T (1992) A 30-ns 64-Mb DRAM with built-in self-test and self-repair function. IEEE J Solid-State Circuits 27(11):1525\u20131533, Nov","journal-title":"IEEE J Solid-State Circuits"},{"key":"5032_CR15","doi-asserted-by":"crossref","unstructured":"Tseng T-W, Li J-F, Chang D-M (2006) A built-in redundancy-analysis scheme for rams with 2D redundancy using 1D local bitmap. In: Proc. Conf. Design, Automation, and Test in Europe (DATE). Munich, pp 53\u201358, Mar","DOI":"10.1109\/DATE.2006.243969"},{"key":"5032_CR16","doi-asserted-by":"crossref","unstructured":"Tseng T-W, Li J-F, Hsu C-C, Pao A, Chiu K, Chen E (2006) A reconfigurable built-in self-repair scheme for multiple repairable rams in socs. In: Proc. Int\u2019l Test Conf. (ITC). Santa Clara, pp 1\u20138, Oct.","DOI":"10.1109\/TEST.2006.297688"},{"issue":"6","key":"5032_CR17","doi-asserted-by":"crossref","first-page":"637","DOI":"10.1023\/A:1020805224219","volume":"18","author":"C-W Wang","year":"2002","unstructured":"Wang C-W, Wu C-F, Li J-F, Wu C-W, Teng T, Chiu K, Lin H-P (2002) A built-in self-test and self-diagnosis scheme for embedded SRAM. J Elect Testing Theory Applic 18(6): 637\u2013647, Dec","journal-title":"J Elect Testing Theory Applic"},{"issue":"3","key":"5032_CR18","first-page":"222","volume":"6","author":"C-L Wey","year":"1987","unstructured":"Wey C-L, Lombardi F (1987) On the repair of redundant RAM\u2019s. IEEE Trans Comput-Aided Des Integr Circuits Syst 6(3):222\u2013231, Mar","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"},{"key":"5032_CR19","doi-asserted-by":"crossref","unstructured":"Xiaogang D, Reddy SM, Cheng W-T, Rayhawk J, Mukherjee N (2004) At-speed built-in self-repair analyzer for embedded word-oriented memories. In: International Conference on VLSI Design. Mumbai, pp 895\u2013900, Jan","DOI":"10.1109\/ICVD.2004.1261044"},{"key":"5032_CR20","doi-asserted-by":"crossref","unstructured":"Zorian Y (2002) Embedded memory test & repair: Infrastructure IP for SOC yield. In: Proc. Int\u2019l Test Conf. (ITC). Baltmore, pp 340\u2013349, Oct","DOI":"10.1109\/TEST.2002.1041777"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-007-5032-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10836-007-5032-4\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-007-5032-4","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,25]],"date-time":"2025-01-25T08:57:18Z","timestamp":1737795438000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10836-007-5032-4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,1,4]]},"references-count":20,"journal-issue":{"issue":"1-3","published-print":{"date-parts":[[2008,6]]}},"alternative-id":["5032"],"URL":"https:\/\/doi.org\/10.1007\/s10836-007-5032-4","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"type":"print","value":"0923-8174"},{"type":"electronic","value":"1573-0727"}],"subject":[],"published":{"date-parts":[[2008,1,4]]}}}