{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,26]],"date-time":"2025-01-26T05:36:38Z","timestamp":1737869798942,"version":"3.33.0"},"reference-count":30,"publisher":"Springer Science and Business Media LLC","issue":"1-3","license":[{"start":{"date-parts":[[2008,1,8]],"date-time":"2008-01-08T00:00:00Z","timestamp":1199750400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[2008,6]]},"DOI":"10.1007\/s10836-007-5038-y","type":"journal-article","created":{"date-parts":[[2008,1,7]],"date-time":"2008-01-07T18:57:32Z","timestamp":1199732252000},"page":"193-201","source":"Crossref","is-referenced-by-count":5,"title":["Substrate Testing on a Multi-Site\/Multi-Probe ATE"],"prefix":"10.1007","volume":"24","author":[{"given":"Xiaojun","family":"Ma","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fabrizio","family":"Lombardi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2008,1,8]]},"reference":[{"issue":"2","key":"5038_CR1","doi-asserted-by":"crossref","first-page":"303","DOI":"10.1145\/1059876.1059882","volume":"10","author":"S Bhattacharya","year":"2005","unstructured":"Bhattacharya S, Chatterjee A (2005) Optimized wafer-probe and assembled package test design. ACM Transact Des Automat Electron Syst 10(2):303\u2013329","journal-title":"ACM Transact Des Automat Electron Syst"},{"key":"5038_CR2","doi-asserted-by":"crossref","unstructured":"Bruce RH, Meuli WP, Ho JM (1989) Multi chip modules. In: Proceedings of ACM\/IEEE design automation conference, pp 389\u2013393, June","DOI":"10.1145\/74382.74447"},{"issue":"1","key":"5038_CR3","doi-asserted-by":"crossref","first-page":"56","DOI":"10.1109\/96.296431","volume":"17","author":"L Economikos","year":"1994","unstructured":"Economikos L, Morrison T, Crnic F (1994) Electrical test of multichip substrates. IEEE Trans Compon Packaging Manuf Technol Part B: Advanced Packaging 17(1):56\u201361, February","journal-title":"IEEE Trans Compon Packaging Manuf Technol Part B: Advanced Packaging"},{"key":"5038_CR4","unstructured":"Flying probe test systems: ATG test systems, http:\/\/www.atg-test-systems.de\/products\/products_f_lesstest.htm"},{"key":"5038_CR5","unstructured":"Frye RC, Jui CL, Johnson MG (1994) Crosstalk noise in mixed-signal silicon-on silicon multichip modules. In: Proceedings of 1994 ISHM symposium & exhibition on microelectronics, November"},{"issue":"3","key":"5038_CR6","doi-asserted-by":"crossref","first-page":"344","DOI":"10.1109\/4.494196","volume":"31","author":"R Gharpurey","year":"1996","unstructured":"Gharpurey R, Meyer R (1996) Modeling and analysis of substrate coupling in integrated circuits. IEEE J Solid-State Circuits 31(3):344\u2013353, March","journal-title":"IEEE J Solid-State Circuits"},{"issue":"3","key":"5038_CR7","doi-asserted-by":"crossref","first-page":"442","DOI":"10.1049\/ip-cdt:20050046","volume":"152","author":"SK Goel","year":"2005","unstructured":"Goel SK, Marinissen EJ (2005) Optimization of on-chip design-for-test infrastructure for maximal multi-site test throughput. IEE Proc Comput Digit Tech 152(3):442\u2013456","journal-title":"IEE Proc Comput Digit Tech"},{"issue":"2\/3","key":"5038_CR8","doi-asserted-by":"crossref","first-page":"250","DOI":"10.1147\/rd.342.0250","volume":"34","author":"SD Golladay","year":"1990","unstructured":"Golladay SD, Wagner NA, Rudert JR (1990) SRN Electron-beam technology for open\/short testing of multi-chip substrates. IBM J Res Develop 34(2\/3):250\u2013259, March\/May","journal-title":"IBM J Res Develop"},{"issue":"12","key":"5038_CR9","doi-asserted-by":"crossref","first-page":"1965","DOI":"10.1109\/5.192076","volume":"80","author":"J Hagge","year":"1992","unstructured":"Hagge J, Wagner R (1992) High-yield assembly of multichip modules through known-good IC\u2019s and effective test strategies. Proc IEEE 80(12):1965\u20131994, December","journal-title":"Proc IEEE"},{"key":"5038_CR10","doi-asserted-by":"crossref","unstructured":"Hashempour H, Meyer F, Lombardi F, Karimi F (2003) Hybrid multisite testing at manufacturing. In: Proceedings of international test conference, pp 927\u2013936","DOI":"10.1109\/TEST.2003.1271079"},{"key":"5038_CR11","doi-asserted-by":"crossref","unstructured":"Iyengar V, Goel SK, Marinissen EJ, Chakrabarty K (2002) Test resource optimization for multi-site testing of SOCs under are memory depth constraints. In: Proceedings of IEEE ITC, pp 1159-1168","DOI":"10.1109\/TEST.2002.1041874"},{"key":"5038_CR12","doi-asserted-by":"crossref","unstructured":"Kahng AB, Robinsy G, Walkupz EA (1992) New results and algorithms for MCM substrate testing. In: Proceedings of IEEE International symp. circuits and systems, vol 3, pp 1113\u20131116, May","DOI":"10.1109\/ISCAS.1992.230284"},{"issue":"4","key":"5038_CR13","doi-asserted-by":"crossref","first-page":"595","DOI":"10.1142\/S0129156495000213","volume":"6","author":"AB Kahng","year":"1995","unstructured":"Kahng AB, Robinsy G, Walkupz EA (1995) Optimal algorithms for substrate testing in multi-chip modules. Int J High Speed Elect Syst 6(4):595\u2013612","journal-title":"Int J High Speed Elect Syst"},{"key":"5038_CR14","doi-asserted-by":"crossref","first-page":"358","DOI":"10.1109\/T-C.1974.223950","volume":"C-23","author":"WH Kautz","year":"1974","unstructured":"Kautz WH (1974) Testing for faults in wiring networks. IEEE Trans Comput C-23:358\u2013363, April","journal-title":"IEEE Trans Comput"},{"key":"5038_CR15","doi-asserted-by":"crossref","unstructured":"Kim B, Chatterjee A, Swaminathan M, Schimmel D (1995) A novel low-cost approach to MCM interconnect test. In: Proceedings of international test conference, pp 184\u2013192, October","DOI":"10.1109\/TEST.1995.529832"},{"issue":"1","key":"5038_CR16","doi-asserted-by":"crossref","first-page":"2","DOI":"10.1109\/96.554413","volume":"20","author":"B Kim","year":"1997","unstructured":"Kim B, Swaminathan M, Chatterjee A, Schimmel D (1997) A novel test technique for MCM substrates. IEEE Trans Compon Packaging Manuf Technol Part B: Advanced Packaging 20(1):2\u201312, February","journal-title":"IEEE Trans Compon Packaging Manuf Technol Part B: Advanced Packaging"},{"key":"5038_CR17","doi-asserted-by":"crossref","unstructured":"Kimura H, Iyenaga N (1998) A unified technique for PCB\/MCM design by combining electromagnetic field analysis with circuit simulator. In: Proceedings of design automation and test in Europe (DATE \u201998), pp 951\u2013952, February","DOI":"10.1109\/DATE.1998.655984"},{"key":"5038_CR18","unstructured":"Kramer R, Proskauer D (2005) ATE implementation for multisite device test. Evalaution engineering, July"},{"key":"5038_CR19","doi-asserted-by":"crossref","unstructured":"Masui S (1992) Simulation of substrate coupling in mixed-signal MOS circuits. In: Proceedings of IEEE symposium on VLSI circuits, pp 42\u201343, June","DOI":"10.1109\/VLSIC.1992.229245"},{"key":"5038_CR20","doi-asserted-by":"crossref","unstructured":"Nagata M, Kashima Y, Tamura D, Morie T, Iwata A (1999) Measurements and analysis of substrate noise waveform in mixed-signal IC environment. In: Proceedings of IEEE custom integrated circuits conference, pp 575\u2013578, May","DOI":"10.1109\/CICC.1999.777347"},{"key":"5038_CR21","doi-asserted-by":"crossref","first-page":"1178","DOI":"10.1109\/43.775636","volume":"18","author":"R Pendurkar","year":"1999","unstructured":"Pendurkar R, Tovey C, Chatterjee A (1999) Single probe traversal optimization for testing of MCM substrate interconnections. IEEE Trans Comput-Aided Des Integr Circuits Syst 18:1178\u20131191","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"},{"issue":"3","key":"5038_CR22","doi-asserted-by":"crossref","first-page":"253","DOI":"10.1023\/A:1011204026940","volume":"28","author":"RM Secareanu","year":"2001","unstructured":"Secareanu RM, Warner S, Seabridge S, Burke C, Watrobski T, Morton C, Staub W, Tellier T, Friedman EG (2001) Placement of substrate contacts to minimize substrate noise in mixed-signal integrated circuits. Analog Integr Circuits Signal Process 28(3):253\u2013264, September","journal-title":"Analog Integr Circuits Signal Process"},{"issue":"3","key":"5038_CR23","doi-asserted-by":"crossref","first-page":"226","DOI":"10.1109\/4.278344","volume":"29","author":"B Stanisic","year":"1994","unstructured":"Stanisic B, Verghese N, Rutenbar R, Carley L, Allstot D (1994) Addressing substrate coupling in mixed-mode IC\u2019s: simulation and power distribution synthesis. IEEE J Solid-State Circuits 29(3):226\u2013237, March","journal-title":"IEEE J Solid-State Circuits"},{"issue":"4","key":"5038_CR24","doi-asserted-by":"crossref","first-page":"420","DOI":"10.1109\/4.210024","volume":"28","author":"DK Su","year":"1993","unstructured":"Su DK, Loinaz MJ, Masui S, Wooley BA (1993) Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits. IEEE J Solid-State Circuits 28(4):420\u2013430, April","journal-title":"IEEE J Solid-State Circuits"},{"key":"5038_CR25","doi-asserted-by":"crossref","unstructured":"Tai K (2000) System-in-package (sip): challenges and opportunities. In: Proceedings of Asia and South Pacific design automation conference 2000, pp 191\u2013196, January 2000","DOI":"10.1145\/368434.368603"},{"issue":"7","key":"5038_CR26","doi-asserted-by":"crossref","first-page":"1002","DOI":"10.1109\/4.848209","volume":"35","author":"M Heilningen Van","year":"2000","unstructured":"Van\u00a0Heilningen M, Copiet J, Wambacq P, Donnay S, Gngels M, Bolsens I (2000) Analysis and experimental verification of digital substrate noise generation for epi-type substrates. IEEE J Solid-State Circuits 35(7):1002\u20131008, July","journal-title":"IEEE J Solid-State Circuits"},{"key":"5038_CR27","doi-asserted-by":"crossref","unstructured":"Volkerink E, Khoche A, Rivoir J, Hilliges KD (2002) Test economics for multi-site test with modern cost reduction techniques. In: Proceedings of IEEE VTS, pp 411\u2013418","DOI":"10.1109\/VTS.2002.1011173"},{"key":"5038_CR28","doi-asserted-by":"crossref","unstructured":"Yao S-Z, Chou N-C, Cheng C-K, Hu T (1991) A multi-chip module substrate testing algorithm. In: Proceedings of 4th annual IEEE intl. ASIC conference and exhibit, pp P9:4.1\u2013P9:4.4, September","DOI":"10.1109\/ASIC.1991.242925"},{"key":"5038_CR29","unstructured":"Yao S-Z, Chou N-C, Cheng C-K, Hu T (1992) An optimal probe testing algorthm for the connectivity verification of MCM substrates. In: Proceedings of international conference on computer-aided design, pp 264\u2013267"},{"issue":"1","key":"5038_CR30","doi-asserted-by":"crossref","first-page":"110","DOI":"10.1109\/43.273744","volume":"13","author":"S-Z Yao","year":"1994","unstructured":"Yao S-Z, Chou N-C, Cheng C-K, Hu T (1994) A multi-probe approach for MCM substrate testing. IEEE Trans Comput-Aided Des Integr Circuits Syst 13(1):110\u2013121, January","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-007-5038-y.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10836-007-5038-y\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-007-5038-y","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,25]],"date-time":"2025-01-25T11:56:28Z","timestamp":1737806188000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10836-007-5038-y"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,1,8]]},"references-count":30,"journal-issue":{"issue":"1-3","published-print":{"date-parts":[[2008,6]]}},"alternative-id":["5038"],"URL":"https:\/\/doi.org\/10.1007\/s10836-007-5038-y","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"type":"print","value":"0923-8174"},{"type":"electronic","value":"1573-0727"}],"subject":[],"published":{"date-parts":[[2008,1,8]]}}}