{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,1]],"date-time":"2022-04-01T22:38:26Z","timestamp":1648852706041},"reference-count":16,"publisher":"Springer Science and Business Media LLC","issue":"2-3","license":[{"start":{"date-parts":[[2009,1,31]],"date-time":"2009-01-31T00:00:00Z","timestamp":1233360000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[2009,6]]},"DOI":"10.1007\/s10836-008-5096-9","type":"journal-article","created":{"date-parts":[[2009,1,30]],"date-time":"2009-01-30T08:14:18Z","timestamp":1233303258000},"page":"127-144","source":"Crossref","is-referenced-by-count":3,"title":["A SPICE-Like 2T-FLOTOX Core-Cell Model for Defect Injection and Faulty Behavior Prediction in eFlash"],"prefix":"10.1007","volume":"25","author":[{"given":"O.","family":"Ginez","sequence":"first","affiliation":[]},{"given":"J.-M.","family":"Daga","sequence":"additional","affiliation":[]},{"given":"P.","family":"Girard","sequence":"additional","affiliation":[]},{"given":"C.","family":"Landrault","sequence":"additional","affiliation":[]},{"given":"S.","family":"Pravossoudovitch","sequence":"additional","affiliation":[]},{"given":"A.","family":"Virazel","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2009,1,31]]},"reference":[{"key":"5096_CR1","doi-asserted-by":"crossref","first-page":"776","DOI":"10.1109\/5.220908","volume":"81","author":"S Aritome","year":"1993","unstructured":"Aritome S, Shirota R, Hemink G, Endoh T, Masuoka F (1993) Reliability issues of flash memory cells. Proc IEEE 81:776\u2013788, N\u00b0 5, May","journal-title":"Proc IEEE"},{"key":"5096_CR2","doi-asserted-by":"crossref","first-page":"374","DOI":"10.1109\/JSSC.1976.1050739","volume":"11","author":"JF Dickson","year":"1976","unstructured":"Dickson JF (1976) On-chip high-voltage generation in NMOS integrated circuits using an improved voltage multiplier technique. IEEE J Solid-State Circuits 11:374\u2013378, N\u00b0 3, June","journal-title":"IEEE J Solid-State Circuits"},{"key":"5096_CR3","doi-asserted-by":"crossref","unstructured":"Ginez O, Daga J-M, Combe M, Girard P, Landrault C, Pravossoudovitch S, Virazel A (2006) An overview of failure mechanisms in embedded flash memories. Proc IEEE VLSI Test Symposium 108\u2013113","DOI":"10.1109\/VTS.2006.19"},{"key":"5096_CR4","doi-asserted-by":"crossref","unstructured":"Ginez O, Girard P, Landrault C, Pravossoudovitch S, Virazel A, Daga J-M (2007) Retention and reliability problems in embedded flash memories: analysis and test of defective 2T-FLOTOX tunnel window. Proc IEEE VLSI Test Symposium 47\u201352","DOI":"10.1109\/VTS.2007.52"},{"key":"5096_CR5","unstructured":"Horng Y-L, Huang J-R, Chang T-S (2000) A realistic fault model for flash memories. Proc IEEE Asian Test Symposium 274\u2013281"},{"key":"5096_CR6","unstructured":"IEEE Standard Definitions and Characterization of Floating-gate Semiconductor Arrays. IEEE 1005\u20131998, Revision of the IEEE standard 1005\u20131991"},{"key":"5096_CR7","doi-asserted-by":"crossref","unstructured":"Itoh K (2001) VLSI memory chip design. Springer, Vol. 5","DOI":"10.1007\/978-3-662-04478-0"},{"key":"5096_CR8","doi-asserted-by":"crossref","first-page":"563","DOI":"10.1109\/LED.2005.852525","volume":"26","author":"YH Kang","year":"2005","unstructured":"Kang YH, Hong S (2005) A simple flash memory cell model for transient circuit simulation. IEEE Electron Device Lett 26:563\u2013565, N\u00b0 8, August","journal-title":"IEEE Electron Device Lett"},{"key":"5096_CR9","doi-asserted-by":"crossref","first-page":"278","DOI":"10.1063\/1.1657043","volume":"40","author":"M Lenzlinger","year":"1969","unstructured":"Lenzlinger M, Snow EH (1969) Fowler-Nordheim tunneling into thermally grown SiO2. J Appl Physi 40:278\u2013283, January","journal-title":"J Appl Physi"},{"key":"5096_CR10","doi-asserted-by":"crossref","unstructured":"Mohammad M, Saluja K (2001) Flash memory disturbances: modeling and test. Proc IEEE VLSI Test Symposium 218\u2013224","DOI":"10.1109\/VTS.2001.923442"},{"key":"5096_CR11","doi-asserted-by":"crossref","first-page":"2286","DOI":"10.1109\/TED.2003.816546","volume":"50","author":"M Mohammad","year":"2003","unstructured":"Mohammad M, Saluja K (2003) Simulating disturb faults in flash memories using SPICE compatible electrical model. IEEE Trans Elec Dev 50:2286\u20132291, N\u00b0 11, November","journal-title":"IEEE Trans Elec Dev"},{"key":"5096_CR12","doi-asserted-by":"crossref","unstructured":"O\u2019Shea M, Concannon A, McCarthy K, Lane B, Mathewson A, Slotboom M (2000) Development and application of a macro model for flash EEPROM design. Proc IEEE International ASIC\/SOC Conference 192\u2013196","DOI":"10.1109\/ASIC.2000.880700"},{"key":"5096_CR13","doi-asserted-by":"crossref","first-page":"1248","DOI":"10.1109\/5.622505","volume":"85","author":"P Pavan","year":"1997","unstructured":"Pavan P, Bez R, Olivo P, Zanoni E (1997) Flash memory cells\u2014an overview. Proc IEEE 85:1248\u20131271, N\u00b0 8, August","journal-title":"Proc IEEE"},{"key":"5096_CR14","first-page":"799","volume":"3","author":"JM Portal","year":"2002","unstructured":"Portal JM, Forli L, Nee D (2002) Floating-gate EEPROM cell model based on MOS model 9. IEEE Int Symp Circuits Syst 3:799\u2013802","journal-title":"IEEE Int Symp Circuits Syst"},{"key":"5096_CR15","unstructured":"Semiconductor Industry Association (SIA) (2005) International Technology Roadmap for Semiconductors (ITRS)"},{"key":"5096_CR16","volume-title":"Semiconductor memories: technology, testing and reliability","author":"A-K Sharma","year":"1997","unstructured":"Sharma A-K (1997) Semiconductor memories: technology, testing and reliability. IEEE, Piscataway"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-008-5096-9.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10836-008-5096-9\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-008-5096-9","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,31]],"date-time":"2019-05-31T01:57:44Z","timestamp":1559267864000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10836-008-5096-9"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,1,31]]},"references-count":16,"journal-issue":{"issue":"2-3","published-print":{"date-parts":[[2009,6]]}},"alternative-id":["5096"],"URL":"https:\/\/doi.org\/10.1007\/s10836-008-5096-9","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"value":"0923-8174","type":"print"},{"value":"1573-0727","type":"electronic"}],"subject":[],"published":{"date-parts":[[2009,1,31]]}}}