{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,5,31]],"date-time":"2024-05-31T04:33:11Z","timestamp":1717129991521},"reference-count":25,"publisher":"Springer Science and Business Media LLC","issue":"3","license":[{"start":{"date-parts":[[2010,1,9]],"date-time":"2010-01-09T00:00:00Z","timestamp":1262995200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[2010,6]]},"DOI":"10.1007\/s10836-009-5139-x","type":"journal-article","created":{"date-parts":[[2010,1,8]],"date-time":"2010-01-08T10:31:00Z","timestamp":1262946660000},"page":"337-353","source":"Crossref","is-referenced-by-count":6,"title":["One-to-Many: Context-Oriented Code for Concurrent Error Detection"],"prefix":"10.1007","volume":"26","author":[{"given":"Osnat","family":"Keren","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2010,1,9]]},"reference":[{"issue":"8","key":"5139_CR1","doi-asserted-by":"crossref","first-page":"1547","DOI":"10.1109\/TCAD.2005.855933","volume":"25","author":"S Almukhaizim","year":"2006","unstructured":"Almukhaizim S, Drineas P, Makris Y (2006) Entropy-driven parity-tree selection for low-overhead concurrent error detection in finite state machines. IEEE Trans Comput-Aided Des Integr Circuits Syst 25(8):1547\u20131554","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"},{"key":"5139_CR2","doi-asserted-by":"crossref","first-page":"68","DOI":"10.1016\/S0019-9958(61)80037-5","volume":"4","author":"JM Berger","year":"1961","unstructured":"Berger JM (1961) A note on error detection codes for asymmetric channels. Inf Control 4:68\u201373","journal-title":"Inf Control"},{"issue":"1","key":"5139_CR3","doi-asserted-by":"crossref","first-page":"66","DOI":"10.1109\/18.179343","volume":"39","author":"M Blaum","year":"1993","unstructured":"Blaum M, Roth RM (1993) New array codes for multiple phased burst correction. IEEE Trans Inf Theory 39(1):66\u201377","journal-title":"IEEE Trans Inf Theory"},{"key":"5139_CR4","doi-asserted-by":"crossref","first-page":"1026","DOI":"10.1109\/TC.1985.1676535","volume":"34","author":"B Bose","year":"1985","unstructured":"Bose B, Lin DJ (1985) Systematic unidirectional error-detecting codes. IEEE Trans Comput 34:1026\u20131032","journal-title":"IEEE Trans Comput"},{"key":"5139_CR5","unstructured":"Choudhury MR, Mohanram K (2008) Approximate logic circuits for low overhead, non-intrusive concurrent error detection. In: Proceedings of DATE 2008, pp 903\u2013908"},{"key":"5139_CR6","doi-asserted-by":"crossref","first-page":"5","DOI":"10.1007\/s004930170002","volume":"21","author":"R Cole","year":"2001","unstructured":"Cole R, Ost K, Schirra S (2001) Edge coloring bipartite multigraphs in O(E log D) time. Combinatorica 21:5\u201312","journal-title":"Combinatorica"},{"key":"5139_CR7","doi-asserted-by":"crossref","first-page":"485","DOI":"10.1016\/S0019-9958(64)90181-0","volume":"7","author":"TM Cover","year":"1964","unstructured":"Cover TM, Thomas JA (1964) Elements of information theory. Wiley-Interscience, 1991. Inf Control 7:485\u2013507","journal-title":"Inf Control"},{"issue":"6","key":"5139_CR8","doi-asserted-by":"crossref","first-page":"878","DOI":"10.1109\/43.229762","volume":"12","author":"NK Jha","year":"1993","unstructured":"Jha NK, Wang SJ (1993) Design and synthesis of self-checking VLSI circuits IEEE Trans CAD 12(6):878-887","journal-title":"IEEE Trans CAD"},{"issue":"2","key":"5139_CR9","doi-asserted-by":"crossref","first-page":"186","DOI":"10.1109\/92.285745","volume":"2","author":"De Kaushik","year":"1994","unstructured":"Kaushik De, Natarajan C, Nair D, Banerjee P (1994) RSYN: a system for automated synthesis of reliable multilevel circuits. IEEE Trans VLSI Syst 2(2):186\u2013195","journal-title":"IEEE Trans VLSI Syst"},{"key":"5139_CR10","doi-asserted-by":"crossref","unstructured":"Keren O, Levin I, Ostrovsky V, Abramov B (2008) Arbitrary error detection in combinational circuits by using partitioning. In: The 23rd IEEE international symposium on defect and fault tolerance in VLSI systems (DFT\u201908), pp 361\u2013369","DOI":"10.1109\/DFT.2008.34"},{"issue":"6","key":"5139_CR11","doi-asserted-by":"crossref","first-page":"1843","DOI":"10.1109\/18.641550","volume":"43","author":"O Keren","year":"1997","unstructured":"Keren O, Litsyn S (1997) A class of array codes correcting multiple column erasures. IEEE Trans Inf Theory 43(6):1843\u20131851","journal-title":"IEEE Trans Inf Theory"},{"key":"5139_CR12","doi-asserted-by":"crossref","first-page":"453","DOI":"10.1007\/BF01456961","volume":"77","author":"D Konig","year":"1916","unstructured":"Konig D (1916) Uber graphen und ihre anwendung auf determinantentheorie und mengenlehre. Math Ann 77:453\u2013465","journal-title":"Math Ann"},{"key":"5139_CR13","doi-asserted-by":"crossref","unstructured":"Kubalik P, Fiser P, Kubatova H (2006) Fault tolerant system design method based on self-checking circuits. In: Proceedings of the 12th IEEE international on-line testing symposium, pp 185\u2013186","DOI":"10.1109\/IOLTS.2006.37"},{"key":"5139_CR14","volume-title":"Self-checking and fault-tolerant digital design","author":"P Lala","year":"2000","unstructured":"Lala P (2000) Self-checking and fault-tolerant digital design. Morgan Kaufmann, San-Francisco"},{"key":"5139_CR15","unstructured":"Levin I, Karpovsky M (1998) On-line self-checking of microprogram control units. In: The 4-th IEEE international on-line testing workshop, Capri, pp 153\u2013159"},{"key":"5139_CR16","volume-title":"The theory of error-correcting codes","author":"FJ MacWilliams","year":"1977","unstructured":"MacWilliams FJ, Sloane NJA (1977) The theory of error-correcting codes. North-Holland, Amsterdam"},{"key":"5139_CR17","doi-asserted-by":"crossref","unstructured":"Ostrovsky V, Levin I (2005) Implementation of concurrent checking circuits by independent sub-circuits. In: Proceedings of 20th IEEE international symposium on defect and fault tolerance in VLSI systems (DFT\u201905), pp 343\u2013351","DOI":"10.1109\/DFTVS.2005.39"},{"issue":"1","key":"5139_CR18","first-page":"1","volume":"1","author":"V Ostrovsky","year":"2007","unstructured":"Ostrovsky V, Levin I, Keren O, Abramov B (2007) Designing concurrent checking circuits by using partitioning. International Journal of Highly Reliable Electronic System Design 1(1):1\u201311","journal-title":"International Journal of Highly Reliable Electronic System Design"},{"key":"5139_CR19","unstructured":"Saposhnikov VV, Morosov A, Saposhnikov VlV, Gossel M (1996) Design of self-checking unidirectional combinational circuits with low area overhead. In: Proceeding of the 2nd IEEE international on-line testing workshop, pp 56\u201367"},{"key":"5139_CR20","doi-asserted-by":"crossref","first-page":"41","DOI":"10.1023\/A:1008257118423","volume":"12","author":"VV Saposhnikov","year":"1998","unstructured":"Saposhnikov VV, Morosov A, Saposhnikov VlV, Gossel M (1998) A new design method for self-checking unidirectional combinational circuits. J Electron Test Theory Appl 12:41\u201353","journal-title":"J Electron Test Theory Appl"},{"key":"5139_CR21","doi-asserted-by":"crossref","first-page":"841","DOI":"10.1137\/S0097539796299266","volume":"28","author":"A Schrijver","year":"1998","unstructured":"Schrijver A (1998) Bipartite edge coloring in O(\u0394m) time. SIAM J Comput 28:841\u2013846","journal-title":"SIAM J Comput"},{"issue":"8","key":"5139_CR22","doi-asserted-by":"crossref","first-page":"741","DOI":"10.1109\/TC.1984.5009361","volume":"33","author":"JE Smith","year":"1984","unstructured":"Smith JE (1984) On separable unordered codes. IEEE Trans Comput 33(8):741\u2013743","journal-title":"IEEE Trans Comput"},{"issue":"2","key":"5139_CR23","first-page":"280","volume":"35","author":"ES Sogomonyan","year":"1974","unstructured":"Sogomonyan ES (1974) Design of built-in self-checking monitoring circuits for combinational devices. Autom Remote Control 35(2):280\u2013289","journal-title":"Autom Remote Control"},{"key":"5139_CR24","doi-asserted-by":"crossref","first-page":"783","DOI":"10.1109\/43.644041","volume":"16","author":"NA Touba","year":"1997","unstructured":"Touba NA, McCluskey EJ (1997) Logic synthesis of multilevel circuits with concurrent error detection. IEEE Trans Comput-Aided Des Integr Circuits Syst 16:783\u2013789","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"},{"key":"5139_CR25","doi-asserted-by":"crossref","unstructured":"Vemu R, Jas A, Abraham JA, Patil S, Galivanche R (2008) A low-cost concurrent error detection technique for processor control logic. In: Proc. of design, automation and test in Europe (DATE), pp 897\u2013902","DOI":"10.1145\/1403375.1403592"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-009-5139-x.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10836-009-5139-x\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-009-5139-x","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,20]],"date-time":"2021-10-20T01:20:31Z","timestamp":1634692831000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10836-009-5139-x"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,1,9]]},"references-count":25,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2010,6]]}},"alternative-id":["5139"],"URL":"https:\/\/doi.org\/10.1007\/s10836-009-5139-x","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"value":"0923-8174","type":"print"},{"value":"1573-0727","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,1,9]]}}}