{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T12:03:01Z","timestamp":1759147381006},"reference-count":35,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2010,2,12]],"date-time":"2010-02-12T00:00:00Z","timestamp":1265932800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[2010,4]]},"DOI":"10.1007\/s10836-010-5147-x","type":"journal-article","created":{"date-parts":[[2010,2,11]],"date-time":"2010-02-11T09:11:06Z","timestamp":1265879466000},"page":"195-209","source":"Crossref","is-referenced-by-count":14,"title":["Fault Table Computation on GPUs"],"prefix":"10.1007","volume":"26","author":[{"given":"Kanupriya","family":"Gulati","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sunil P.","family":"Khatri","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2010,2,12]]},"reference":[{"key":"5147_CR1","doi-asserted-by":"crossref","unstructured":"Abramovici A, Levendel Y, Menon P (1983) A logic simulation engine. In: IEEE transactions on computer-aided design, vol\u00a02, pp\u00a082\u201394","DOI":"10.1109\/TCAD.1983.1270024"},{"key":"5147_CR2","doi-asserted-by":"crossref","first-page":"214","DOI":"10.1109\/DAC.1983.1585651","volume-title":"DAC \u201983: proceedings of the 20th conference on Design automation","author":"M Abramovici","year":"1983","unstructured":"Abramovici M, Menon PR, Miller DT (1983) Critical path tracing\u2014an alternative to fault simulation. In: DAC \u201983: proceedings of the 20th conference on Design automation. IEEE, Piscataway, pp\u00a0214\u2013220"},{"key":"5147_CR3","volume-title":"Digital systems testing and testable design","author":"M Abramovici","year":"1990","unstructured":"Abramovici M, Breuer MA, Friedman AD (1990) Digital systems testing and testable design. Computer Science, New\u00a0York"},{"issue":"5","key":"5147_CR4","doi-asserted-by":"crossref","first-page":"28","DOI":"10.1109\/MDT.1987.295211","volume":"4","author":"P Agrawal","year":"1987","unstructured":"Agrawal P, Dally WJ, Fischer WC, Jagadish HV, Krishnakumar AS, Tutundjian R (1987) MARS: a multiprocessor-based programmable accelerator. IEEE Des Test 4(5):28\u201336","journal-title":"IEEE Des Test"},{"issue":"3","key":"5147_CR5","doi-asserted-by":"crossref","first-page":"277","DOI":"10.1023\/A:1008275810655","volume":"10","author":"MB Amin","year":"1997","unstructured":"Amin MB, Vinnakota B (1997) Workload distribution in fault simulation. J Electron Test 10(3):277\u2013282","journal-title":"J Electron Test"},{"issue":"2","key":"5147_CR6","doi-asserted-by":"crossref","first-page":"183","DOI":"10.1109\/92.766745","volume":"7","author":"MB Amin","year":"1999","unstructured":"Amin MB, Vinnakota B (1999) Data parallel fault simulation. IEEE Trans Very Large Scale Integr (VLSI) Syst 7(2):183\u2013190","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"issue":"5","key":"5147_CR7","doi-asserted-by":"crossref","first-page":"704","DOI":"10.1109\/TCAD.1987.1270316","volume":"6","author":"K Antreich","year":"1987","unstructured":"Antreich K, Schulz M (1987) Accelerated fault simulation and fault grading in combinational circuits. IEEE Trans Comput-Aided Des Integr Circuits Syst 6(5):704\u2013712","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"},{"key":"5147_CR8","unstructured":"Banerjee P (1994) Parallel algorithms for VLSI computer-aided design. Prentice Hall, Englewood Cliffs. ISBN-13: 978-0130158352 (ISBN-10: 0130158356)"},{"key":"5147_CR9","doi-asserted-by":"crossref","first-page":"218","DOI":"10.1109\/DAC.1988.14761","volume-title":"DAC \u201988: proceedings of the 25th ACM\/IEEE conference on design automation","author":"DK Beece","year":"1988","unstructured":"Beece DK, Deibert G, Papp G, Villante F (1988) The IBM engineering verification engine. In: DAC \u201988: proceedings of the 25th ACM\/IEEE conference on design automation. IEEE Computer Society, Los Alamitos, pp\u00a0218\u2013224"},{"issue":"11","key":"5147_CR10","doi-asserted-by":"crossref","first-page":"1252","DOI":"10.1109\/T-C.1971.223124","volume":"20","author":"DC Bossen","year":"1971","unstructured":"Bossen DC, Hong SJ (1971) Cause-effect analysis for multiple fault detection in combinational networks. IEEE Trans Comput 20(11):1252\u20131257","journal-title":"IEEE Trans Comput"},{"key":"5147_CR11","doi-asserted-by":"crossref","unstructured":"Gulati K, Khatri SP (2008) Towards acceleration of fault simulation using graphics processing units. In: Proceedings of the 45th annual conference on design automation, pp\u00a0822\u2013827","DOI":"10.1145\/1391469.1391679"},{"key":"5147_CR12","unstructured":"Harel D, Sheng R, Udell J (1987) Efficient single fault propagation in combinational circuits. In: Proceedings of the international conference on computer-aided design ICCAD, pp\u00a02\u20135"},{"key":"5147_CR13","unstructured":"Hong SJ (1979) Fault simulation strategy for combinational logic networks. In: Proceedings of eighth international symposium on fault-tolerant computing, pp\u00a096\u201399"},{"key":"5147_CR14","unstructured":"Ishiura N, Ito M, Yajima S (1987) High-speed fault simulation using a vector processor. In: Proceedings of the international conference on computer-aided design ICCAD"},{"key":"5147_CR15","doi-asserted-by":"crossref","unstructured":"Kitamura Y (1989) Exact critical path tracing fault simulation on massively parallel processor AAP2. In: Proceedings of the 1989 IEEE\/ACM international conference on computer-aided design, pp\u00a0474\u2013477","DOI":"10.1109\/ICCAD.1989.76994"},{"key":"5147_CR16","first-page":"946","volume-title":"Proceedings of the IEEE international test conference on test","author":"HK Lee","year":"1991","unstructured":"Lee HK, Ha DS (1991) An efficient, forward fault simulation algorithm based on the parallel pattern single fault propagation. In: Proceedings of the IEEE international test conference on test. IEEE Computer Society, Washington, pp\u00a0946\u2013955"},{"key":"5147_CR17","doi-asserted-by":"crossref","first-page":"208","DOI":"10.1145\/1188455.1188672","volume-title":"SC\u00a0\u201906: proceedings of the 2006 ACM\/IEEE conference on supercomputing","author":"D Luebke","year":"2006","unstructured":"Luebke D, Harris M, Govindaraju N, Lefohn A, Houston M, Owens J, Segal M, Papakipos M, Buck I (2006) GPGPU: general-purpose computation on graphics hardware. In: SC\u00a0\u201906: proceedings of the 2006 ACM\/IEEE conference on supercomputing. ACM, New York, p\u00a0208"},{"key":"5147_CR18","doi-asserted-by":"crossref","unstructured":"Mueller-Thuns R, Saab D, Damiano R, Abraham J (1993) VLSI logic and fault simulation on general-purpose parallel computers. In: IEEE transactions on computer-aided design of integrated circuits and systems, vol\u00a012, pp\u00a0446\u2013460","DOI":"10.1109\/43.215006"},{"issue":"1","key":"5147_CR19","doi-asserted-by":"crossref","first-page":"79","DOI":"10.1007\/BF00159833","volume":"3","author":"V Narayanan","year":"1992","unstructured":"Narayanan V, Pitchumani V (1992) Fault simulation on massively parallel SIMD machines: algorithms, implementations and results. J Electron Test 3(1):79\u201392","journal-title":"J Electron Test"},{"key":"5147_CR20","unstructured":"NVIDIA CUDA Homepage. http:\/\/developer.nvidia.com\/object\/cuda.html"},{"key":"5147_CR21","unstructured":"NVIDIA Tesla GPU Computing Processor. http:\/\/www.nvidia.com\/object\/IO_43499.html"},{"key":"5147_CR22","doi-asserted-by":"crossref","first-page":"2","DOI":"10.1145\/1281500.1281643","volume-title":"SIGGRAPH \u201907: ACM SIGGRAPH 2007 courses","author":"J Owens","year":"2007","unstructured":"Owens J (2007) GPU architecture overview. In: SIGGRAPH \u201907: ACM SIGGRAPH 2007 courses. ACM, New York, p\u00a02"},{"key":"5147_CR23","doi-asserted-by":"crossref","unstructured":"Ozguner F, Daoud R (1988) Vectorized fault simulation on the cray X-MP supercomputer. In: IEEE International conference on computer-aided design, 1988. ICCAD-88. Digest of Technical Papers, pp\u00a0198\u2013201","DOI":"10.1109\/ICCAD.1988.122493"},{"key":"5147_CR24","doi-asserted-by":"crossref","first-page":"1108","DOI":"10.1145\/63047.63064","volume-title":"Proceedings of the third conference on hypercube concurrent computers and applications","author":"F Ozguner","year":"1988","unstructured":"Ozguner F, Aykanat C, Khalid O, (1988) Logic fault simulation on a vector hypercube multiprocessor. In: Proceedings of the third conference on hypercube concurrent computers and applications. ACM, New York pp\u00a01108\u20131116"},{"key":"5147_CR25","unstructured":"Parallel Reduction. http:\/\/developer.download.nvidia.com\/~reduction.pdf"},{"key":"5147_CR26","first-page":"616","volume-title":"ICCD \u201995: proceedings of the 1995 international conference on computer design","author":"S Parkes","year":"1995","unstructured":"Parkes S, Banerjee P, Patel J (1995) A parallel algorithm for fault simulation based on PROOFS. In ICCD \u201995: proceedings of the 1995 international conference on computer design. IEEE Computer Society, Washington, p\u00a0616"},{"key":"5147_CR27","doi-asserted-by":"crossref","first-page":"1542","DOI":"10.1109\/43.103504","volume":"10","author":"S Patil","year":"1991","unstructured":"Patil S, Banerjee P (1991) Performance trade-offs in a parallel test generation\/fault simulation environment. IEEE Trans Comput-Aided Des 10:1542\u20131558","journal-title":"IEEE Trans Comput-Aided Des"},{"key":"5147_CR28","first-page":"51","volume-title":"DAC \u201982: proceedings of the 19th conference on design automation","author":"GF Pfister","year":"1982","unstructured":"Pfister GF (1982) The Yorktown simulation engine: introduction. In: DAC \u201982: proceedings of the 19th conference on design automation. IEEE, Piscataway, pp 51\u201354"},{"key":"5147_CR29","doi-asserted-by":"crossref","first-page":"272","DOI":"10.1109\/ICCAD.1992.279361","volume-title":"ICCAD \u201992: 1992 IEEE\/ACM international conference proceedings on computer-aided design","author":"I Pomeranz","year":"1992","unstructured":"Pomeranz I, Reddy SM (1992) On the generation of small dictionaries for fault location. In: ICCAD \u201992: 1992 IEEE\/ACM international conference proceedings on computer-aided design. IEEE Computer Society, Los Alamitos, pp\u00a0272\u2013279"},{"key":"5147_CR30","doi-asserted-by":"crossref","first-page":"1474","DOI":"10.1145\/1403375.1403730","volume-title":"DATE \u201908: proceedings of the conference on design, automation and test in Europe","author":"I Pomeranz","year":"2008","unstructured":"Pomeranz I, Reddy SM (2008) A same\/different fault dictionary: an extended pass\/fail fault dictionary with improved diagnostic resolution. In: DATE \u201908: proceedings of the conference on design, automation and test in Europe. ACM, New York, pp\u00a01474\u20131479"},{"key":"5147_CR31","doi-asserted-by":"crossref","unstructured":"Pomeranz I, Reddy S, Tangirala R (1992) On achieving zero aliasing for modeled faults. In: Proc. [3rd] European conference on design automation, pp\u00a0291\u2013299","DOI":"10.1109\/EDAC.1992.205941"},{"key":"5147_CR32","doi-asserted-by":"crossref","unstructured":"Raghavan R, Hayes J, Martin W (1988) Logic simulation on vector processors. In: Computer-aided design, digest of technical papers. IEEE international conference on, pp\u00a0268\u2013271","DOI":"10.1109\/ICCAD.1988.122508"},{"key":"5147_CR33","unstructured":"Richman J, Bowden KR (1985) The modern fault dictionary. In: Proc. international test conference, pp\u00a0696\u2013702"},{"key":"5147_CR34","unstructured":"Tai S, Bhattacharya D (1993) Pipelined fault simulation on parallel machines using the circuitflow graph. In: Computer design: VLSI in computers and processors, pp\u00a0564\u2013567"},{"key":"5147_CR35","unstructured":"Tulloss RE (1980) Fault dictionary compression: recognizing when a fault may be unambiguously represented by a single failure detection. In: Proc test conference, pp\u00a0368\u2013370"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-010-5147-x.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10836-010-5147-x\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-010-5147-x","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,30]],"date-time":"2019-05-30T21:57:45Z","timestamp":1559253465000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10836-010-5147-x"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,2,12]]},"references-count":35,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2010,4]]}},"alternative-id":["5147"],"URL":"https:\/\/doi.org\/10.1007\/s10836-010-5147-x","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"value":"0923-8174","type":"print"},{"value":"1573-0727","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,2,12]]}}}