{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,4,25]],"date-time":"2023-04-25T12:58:28Z","timestamp":1682427508849},"reference-count":19,"publisher":"Springer Science and Business Media LLC","issue":"6","license":[{"start":{"date-parts":[[2014,9,30]],"date-time":"2014-09-30T00:00:00Z","timestamp":1412035200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[2014,12]]},"DOI":"10.1007\/s10836-014-5482-4","type":"journal-article","created":{"date-parts":[[2014,9,29]],"date-time":"2014-09-29T15:40:20Z","timestamp":1412005220000},"page":"673-685","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":5,"title":["Efficient LFSR Reseeding Based on Internal-Response Feedback"],"prefix":"10.1007","volume":"30","author":[{"given":"Wei-Cheng","family":"Lien","sequence":"first","affiliation":[]},{"given":"Kuen-Jong","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Tong-Yu","family":"Hsieh","sequence":"additional","affiliation":[]},{"given":"Krishnendu","family":"Chakrabarty","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2014,9,30]]},"reference":[{"key":"5482_CR1","unstructured":"Bui HT, Al-Sheraidah AK, Wang Y (2000) New 4-transistor XOR and XNOR designs. Proc. Asia Pacific Conf. on ASICs, pp.25-28"},{"key":"5482_CR2","doi-asserted-by":"crossref","unstructured":"Carletta J, Papachristou C (1994) Structural constraints for circular self-test paths. VLSI Test Symp., pp. 87\u201392","DOI":"10.1109\/VTEST.1994.292329"},{"issue":"3","key":"5482_CR3","doi-asserted-by":"crossref","first-page":"223","DOI":"10.1023\/A:1023788727542","volume":"19","author":"C Fagot","year":"2003","unstructured":"Fagot C, Gascuel O, Girard P, Landrault C (2003) A Ring Architecture Strategy for BIST Test Pattern Generation. J Electron Test Theory Appl 19(3):223\u2013231","journal-title":"J Electron Test Theory Appl"},{"issue":"2","key":"5482_CR4","doi-asserted-by":"crossref","first-page":"223","DOI":"10.1109\/12.364534","volume":"44","author":"S Hellebrand","year":"1995","unstructured":"Hellebrand S, Rajski J, Tarnick S, Venkataraman S, Courtois B (1995) Built-in test for circuits with scan based on reseeding of multiple-polynomial linear feedback shift registers. IEEE Trans Comput 44(2):223\u2013233","journal-title":"IEEE Trans Comput"},{"key":"5482_CR5","unstructured":"Jishun K, Xiong O, Zhiqiang Y (2008) A Novel BIST scheme using test vectors applied by circuit-under-test itself. Proc. Asian Test Symp., pp. 75\u201380"},{"key":"5482_CR6","doi-asserted-by":"crossref","unstructured":"Kalligeros E, Bakalis D, Kavousianos X, Nikolos D (2005) Reseeding-based test set embedding with reduced test sequences. Proc. International Symp. on Quality Electronic Design, pp. 226\u2013231","DOI":"10.1109\/ISQED.2005.105"},{"key":"5482_CR7","doi-asserted-by":"crossref","unstructured":"Kalligeros E, Kavousianos X, Bakalis D, Nikolos D (2002) An efficient seeds selection method for LFSR-based test-per-clock BIST. Proc. International Symp. on Quality Electronic Design, pp. 261\u2013266","DOI":"10.1109\/ISQED.2002.996747"},{"issue":"3","key":"5482_CR8","doi-asserted-by":"crossref","first-page":"315","DOI":"10.1023\/A:1015039323168","volume":"18","author":"E Kalligeros","year":"2002","unstructured":"Kalligeros E, Kavousianos X, Bakalis D, Nikolos D (2002) On-the-Fly Reseeding: a new reseeding technique for Test-Per-Clock BIST. J Electron Test Theory Appl 18(3):315\u2013332","journal-title":"J Electron Test Theory Appl"},{"key":"5482_CR9","unstructured":"Koenemann B (1991) LFSR-coded test patterns for scan designs. Proc. European Test Conf., pp.237-242"},{"issue":"1","key":"5482_CR10","doi-asserted-by":"crossref","first-page":"46","DOI":"10.1109\/43.21818","volume":"8","author":"A Krasniewski","year":"1989","unstructured":"Krasniewski A, Pilarski S (1989) Circuilar self-test path: a low-cost BIST technique for VLSI circuits. IEEE Trans Comput Aided Des Integr Circ Syst 8(1):46\u201355","journal-title":"IEEE Trans Comput Aided Des Integr Circ Syst"},{"key":"5482_CR11","doi-asserted-by":"crossref","unstructured":"Lien WC, Hsieh TY, Lee KJ (2012) A Test-Per-Clock LFSR Reseeding Algorithm for Concurrent Reduction on Test Sequence Length and Test Data Volume. Proc. Asian Test Symp., pp.278-283","DOI":"10.1109\/ATS.2012.11"},{"key":"5482_CR12","unstructured":"Lien WC, Hsieh TY, Lee KJ (2012) Routing-Efficient Implementation of An Internal-Response-Based BIST Architecture. Proc. VLSI Design, Automation and Test Symp., pp. 1\u20134"},{"key":"5482_CR13","unstructured":"Lien WC, Lee KJ (2010) A Complete Logic BIST Technology with No Storage Requirement. Proc. Asian Test Symp., pp. 129\u2013134"},{"key":"5482_CR14","doi-asserted-by":"crossref","unstructured":"Reeb B, Wunderlich HJ (1996) Deterministic pattern generation for weighted random pattern testing. Proc. VLSI European Design and Test Conf., pp. 30\u201336","DOI":"10.1109\/EDTC.1996.494124"},{"issue":"5","key":"5482_CR15","doi-asserted-by":"crossref","first-page":"668","DOI":"10.1109\/TVLSI.2002.801564","volume":"10","author":"NA Touba","year":"2002","unstructured":"Touba NA (2002) Circular BIST with State Skipping. IEEE Trans Very Large Scale Integr Syst 10(5):668\u2013672","journal-title":"IEEE Trans Very Large Scale Integr Syst"},{"issue":"4","key":"5482_CR16","doi-asserted-by":"crossref","first-page":"545","DOI":"10.1109\/43.918212","volume":"20","author":"NA Touba","year":"2001","unstructured":"Touba NA, McCluskey EJ (2001) Bit-fixing in pseudorandom sequences for scan BIST. IEEE Trans Comput Aided Des Integr Circ Syst 20(4):545\u2013555","journal-title":"IEEE Trans Comput Aided Des Integr Circ Syst"},{"issue":"8","key":"5482_CR17","doi-asserted-by":"crossref","first-page":"1251","DOI":"10.1109\/TCAD.2009.2021731","volume":"28","author":"Z Wang","year":"2009","unstructured":"Wang Z, Chakrabarty K, Wang S (2009) Integrated LFSR Reseeding, Test-Access Optimization, and Test Scheduling for Core-Based System-on-Chip. IEEE Trans Comput Aided Des Integr Circ Syst 28(8):1251\u20131264","journal-title":"IEEE Trans Comput Aided Des Integr Circ Syst"},{"key":"5482_CR18","volume-title":"VLSI Test Principles and Architectures: Design for Testability","author":"L-T Wang","year":"2006","unstructured":"Wang L-T, Wu C-W, Wen X (2006) VLSI Test Principles and Architectures: Design for Testability. Morgan Kaufmann, San Francisco"},{"issue":"S1","key":"5482_CR19","doi-asserted-by":"crossref","first-page":"20","DOI":"10.1016\/S1007-0214(07)70078-0","volume":"12","author":"K Wen","year":"2007","unstructured":"Wen K, Hu Y, Li X (2007) Deterministic circular self-test path. Tsinghua Sci Technol 12(S1):20\u201325","journal-title":"Tsinghua Sci Technol"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-014-5482-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10836-014-5482-4\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-014-5482-4","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,15]],"date-time":"2019-08-15T15:01:54Z","timestamp":1565881314000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10836-014-5482-4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,9,30]]},"references-count":19,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2014,12]]}},"alternative-id":["5482"],"URL":"https:\/\/doi.org\/10.1007\/s10836-014-5482-4","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"value":"0923-8174","type":"print"},{"value":"1573-0727","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,9,30]]}}}