{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:58:34Z","timestamp":1759147114555,"version":"3.37.3"},"reference-count":22,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2020,1,23]],"date-time":"2020-01-23T00:00:00Z","timestamp":1579737600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2020,1,23]],"date-time":"2020-01-23T00:00:00Z","timestamp":1579737600000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[2020,2]]},"DOI":"10.1007\/s10836-020-05858-5","type":"journal-article","created":{"date-parts":[[2020,1,23]],"date-time":"2020-01-23T23:02:29Z","timestamp":1579820549000},"page":"33-46","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["On Using Approximate Computing to Build an Error Detection Scheme for Arithmetic Circuits"],"prefix":"10.1007","volume":"36","author":[{"given":"B.","family":"Deveautour","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7398-7107","authenticated-orcid":false,"given":"A.","family":"Virazel","sequence":"additional","affiliation":[]},{"given":"P.","family":"Girard","sequence":"additional","affiliation":[]},{"given":"V.","family":"Gherman","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2020,1,23]]},"reference":[{"key":"5858_CR1","doi-asserted-by":"crossref","unstructured":"Al-Maaitah K, Qiqieh I, Soltan A, Yakovlev A (2017) Configurable-accuracy approximate adder design with light-weight fast convergence error recovery circuit. In: Proc. IEEE Jordan Conference on Applied Electrical Engineering and Computing Technologies (AEECT), pp 1\u20136","DOI":"10.1109\/AEECT.2017.8257753"},{"key":"5858_CR2","doi-asserted-by":"crossref","unstructured":"Bottoni C, Coeffic B, Daveau J-M, Naviner L, Roche P (2015) Partial Triplication of a Sparc-v8 Microprocessor using Fault Injection. In: Proc. of IEEE Latin American Symposium on Circuits and Systems, pp 1\u20134","DOI":"10.1109\/LASCAS.2015.7250415"},{"key":"5858_CR3","unstructured":"Design Compiler. [Online]. Available: https:\/\/www.synopsys.com\/"},{"key":"5858_CR4","doi-asserted-by":"crossref","unstructured":"Fazeli M, Ahmadian S, Miremadi S, Asadi H, Tahoori M (2011) Soft Error Rate Estimation of Digital Circuits in the Presence of Multiple Event Transients. In: Proc. of Design Automation and Test in Europe, pp 1\u20136","DOI":"10.1109\/DATE.2011.5763020"},{"issue":"9\u201310","key":"5858_CR5","doi-asserted-by":"publisher","first-page":"2072","DOI":"10.1016\/j.microrel.2015.06.125","volume":"55","author":"IAC Gomes","year":"2015","unstructured":"Gomes IAC, Martins M, Reis A, Kastensmidt FL (2015) Exploring the use of approximate TMR to mask transient faults in logic with low area overhead. Microelectron Reliab 55(9\u201310):2072\u20132076","journal-title":"Microelectron Reliab"},{"key":"5858_CR6","doi-asserted-by":"crossref","unstructured":"Krsti\u0107 M, Weidling S, Petrovi\u0107 V, Goessel M (2014) Improved circuitry for soft error correction in combinational logic in pipelined designs. In: Proc. of IEEE 20th International On-Line Testing Symposium, pp 93\u201398","DOI":"10.1109\/IOLTS.2014.6873678"},{"key":"5858_CR7","doi-asserted-by":"crossref","unstructured":"Leveugle R, Calvez A, Maistri P, Vanhauwaert P (2009) Statistical fault injection: Quantified error and confidence. In: Proc. of IEEE\/ACM\/EDAA Design Automation and Test in Europe, pp 502\u2013506","DOI":"10.1109\/DATE.2009.5090716"},{"key":"5858_CR8","doi-asserted-by":"crossref","unstructured":"Maniatakos M, Makris Y (2010) Workload-Driven Selective Hardening of Control State Elements in Modern Microprocessors. In: Proc. of IEEE VLSI Test Symposium, pp 159\u2013164","DOI":"10.1109\/VTS.2010.5469589"},{"key":"5858_CR9","doi-asserted-by":"crossref","unstructured":"Mohanram K, Touba N (2003) Cost-Effective Approach for Reducing Soft Error Failure Rate in Logic Circuits. In: Proc. of IEEE Int. Test Conference, pp 893\u2013901","DOI":"10.1109\/TEST.2003.1271075"},{"key":"5858_CR10","doi-asserted-by":"crossref","unstructured":"Mrazek V, Hrbacek R, Vasicek Z, Sekanina L (2017) Evoapprox8b: Library of Approx Adders and Multipliers for Circuit Design and Benchmarking of Approximation Methods. In: Proc. of IEEE\/ACM\/EDAA Design Automation and Test in Europe, pp 258\u2013261","DOI":"10.23919\/DATE.2017.7926993"},{"key":"5858_CR11","unstructured":"NanGate. Nangate 45nm open cell library. [Online]. Available: http:\/\/www.nangate.com\/?page id=2325"},{"key":"5858_CR12","doi-asserted-by":"crossref","unstructured":"Pagliarini SN et al (2012) Selective Hardening Methodology for Combinational Logic. In: Proc. of IEEE Latin American Test Workshop, pp 1\u20136","DOI":"10.1109\/LATW.2012.6261262"},{"issue":"3","key":"5858_CR13","doi-asserted-by":"publisher","first-page":"54","DOI":"10.1109\/MDT.2010.120","volume":"28","author":"I Polian","year":"2011","unstructured":"Polian I, Hayes J (2011) Selective hardening: toward cost-effective error tolerance. IEEE Design Test of Computers 28(3):54\u201363","journal-title":"IEEE Design Test of Computers"},{"key":"5858_CR14","doi-asserted-by":"crossref","unstructured":"Polian I, Reddy S, Becker B (2008) Scalable Calculation of Logical Masking Effects for Selective Hardening Against Soft Errors. In: Proc. of IEEE Annual Symposium on VLSI, pp 257\u2013262","DOI":"10.1109\/ISVLSI.2008.22"},{"issue":"4","key":"5858_CR15","doi-asserted-by":"publisher","first-page":"1871","DOI":"10.1109\/TR.2016.2604918","volume":"65","author":"AJ Sanchez-Clemente","year":"2016","unstructured":"Sanchez-Clemente AJ, Entrena L, Hrbacek R, Sekanina L (2016) Error mitigation using approximate logic circuits : a comparison of probabilistic and evolutionary approaches. IEEE Trans Reliab 65(4):1871\u20131883","journal-title":"IEEE Trans Reliab"},{"key":"5858_CR16","doi-asserted-by":"crossref","unstructured":"Traiola M, Virazel A, Girard P, Barbareschi M, Bosio A (2018) Testing approximate digital circuits: Challenges and opportunities. In: Proc. of IEEE Latin American Test Symposium, pp 1\u20136","DOI":"10.1109\/LATW.2018.8349681"},{"key":"5858_CR17","doi-asserted-by":"crossref","unstructured":"Wali I, Deveautour B, Virazel A, Bosio A, Dilillo L, Girard P (2015) An Effective Hybrid Fault-Tolerant Architecture for Pipelined Cores. In: Proc. of IEEE European Test Symposium, pp 1\u20136","DOI":"10.1109\/ETS.2015.7138733"},{"issue":"2","key":"5858_CR18","doi-asserted-by":"publisher","first-page":"147","DOI":"10.1007\/s10836-016-5578-0","volume":"32","author":"I Wali","year":"2016","unstructured":"Wali I, Virazel A, Bosio A, Girard P, Pravossoudovitch S, Sonza Reorda M (2016) A hybrid fault-tolerant architecture for highly reliable processing cores. Journal of Electronic Testing \u2013 Theory and Applications 32(2):147\u2013161","journal-title":"Journal of Electronic Testing \u2013 Theory and Applications"},{"issue":"31","key":"5858_CR19","doi-asserted-by":"publisher","first-page":"25","DOI":"10.1007\/s10836-017-5640-6","volume":"33","author":"I Wali","year":"2017","unstructured":"Wali I, Deveautour B, Virazel A, Bosio A, Girard P, Sonza Reorda M (2017) A low-cost reliability vs. cost trade-off methodology to selectively harden logic circuits. Journal of Electronic Testing \u2013 Theory and Applications 33(31):25\u201336","journal-title":"Journal of Electronic Testing \u2013 Theory and Applications"},{"key":"5858_CR20","doi-asserted-by":"crossref","unstructured":"Weidling S, Sogomonyan ES, Goessel M (2013) Error Correction of Transient Errors in a Sum-Bit Duplicated Adder by Error Detection. In: Proc. of Euromicro Conference on Digital System Design, pp 855\u2013862","DOI":"10.1109\/DSD.2013.95"},{"issue":"6","key":"5858_CR21","doi-asserted-by":"publisher","first-page":"2928","DOI":"10.1109\/TNS.2008.2006265","volume":"55","author":"G Wirth","year":"2008","unstructured":"Wirth G, Kastensmidt L, Fernanda IR (2008) Single event transients in logic circuits-load and propagation induced pulse broadening. IEEE Trans Nucl Sci 55(6):2928\u20132935","journal-title":"IEEE Trans Nucl Sci"},{"key":"5858_CR22","doi-asserted-by":"crossref","unstructured":"Zoellin C, Wunderlich H, Polian I, Becker B (2008) Selective Hardening in early Design Steps. In: Proc. of IEEE European Test Symposium, pp 185\u2013190","DOI":"10.1109\/ETS.2008.30"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-020-05858-5.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s10836-020-05858-5\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-020-05858-5.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,1,22]],"date-time":"2021-01-22T00:56:25Z","timestamp":1611276985000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s10836-020-05858-5"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,1,23]]},"references-count":22,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2020,2]]}},"alternative-id":["5858"],"URL":"https:\/\/doi.org\/10.1007\/s10836-020-05858-5","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"type":"print","value":"0923-8174"},{"type":"electronic","value":"1573-0727"}],"subject":[],"published":{"date-parts":[[2020,1,23]]},"assertion":[{"value":"22 July 2019","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"12 January 2020","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"23 January 2020","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}