{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,15]],"date-time":"2026-01-15T03:13:29Z","timestamp":1768446809199,"version":"3.49.0"},"reference-count":47,"publisher":"Springer Science and Business Media LLC","issue":"1","license":[{"start":{"date-parts":[[2023,2,1]],"date-time":"2023-02-01T00:00:00Z","timestamp":1675209600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2023,2,1]],"date-time":"2023-02-01T00:00:00Z","timestamp":1675209600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Electron Test"],"published-print":{"date-parts":[[2023,2]]},"DOI":"10.1007\/s10836-023-06046-x","type":"journal-article","created":{"date-parts":[[2023,2,28]],"date-time":"2023-02-28T14:02:50Z","timestamp":1677592970000},"page":"11-25","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":8,"title":["Network-on-Chip and Photonic Network-on-Chip Basic Concepts: A Survey"],"prefix":"10.1007","volume":"39","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4328-7358","authenticated-orcid":false,"given":"Bahareh","family":"Asadi","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3083-9133","authenticated-orcid":false,"given":"Syed Maqsood","family":"Zia","sequence":"additional","affiliation":[]},{"given":"Hamza Mohammed Ridha","family":"Al-Khafaji","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5156-287X","authenticated-orcid":false,"given":"Asghar","family":"Mohamadian","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2023,2,28]]},"reference":[{"key":"6046_CR1","unstructured":"Achballah AB, Ben Saoud S (2007) On network-on-chip comparison. In: Proc. 10th Euromicro Conf. on Digital System Design Architectures, Methods and Tools. pp 503\u2013510"},{"key":"6046_CR2","unstructured":"Agarwal A, Shankar R (2009) Survey of Network on Chip (NoC) architectures & contributions. J Eng Comp Arch 3(1)"},{"issue":"11","key":"6046_CR3","first-page":"786","volume":"14","author":"B Asadi","year":"2016","unstructured":"Asadi B, Reshadi M (2016) Photonic Network-on-Chip: A Survey. International Journal of Computer Science and Information Security (IJCSIS) 14(11):786\u2013792","journal-title":"International Journal of Computer Science and Information Security (IJCSIS)"},{"issue":"1","key":"6046_CR4","doi-asserted-by":"publisher","first-page":"52","DOI":"10.1007\/s11107-016-0656-x","volume":"34","author":"B Asadi","year":"2017","unstructured":"Asadi B, Reshadi M, Khademzadeh A (2017) A routing algorithm for reducing optical loss in photonic Network-on-Chip. Photonic Netw Commun 34(1):52\u201362","journal-title":"Photonic Netw Commun"},{"issue":"2","key":"6046_CR5","first-page":"230","volume":"96","author":"RG Beausoleil","year":"2008","unstructured":"Beausoleil RG, Kuekes PJ, Sinder GS, Wang SY, Stanley R (2008) Nanoelectronic and Nanophotonic Interconnect. Proc IEEE 96(2):230\u2013247","journal-title":"Nanoelectronic and Nanophotonic Interconnect. Proc IEEE"},{"issue":"9","key":"6046_CR6","first-page":"61","volume":"4","author":"A Ben Achballah","year":"2013","unstructured":"Ben Achballah A, Ben Saoud S (2013) A Survey of Network-on-Chip Tools. Int J Adv Comput Sci Appl 4(9):61\u201367","journal-title":"Int J Adv Comput Sci Appl"},{"issue":"1","key":"6046_CR7","doi-asserted-by":"publisher","first-page":"70","DOI":"10.1109\/2.976921","volume":"35","author":"L Benini","year":"2002","unstructured":"Benini L, Micheli GD (2002) Networks on chips: A new SoC paradigm. Computer 35(1):70\u201378","journal-title":"Computer"},{"key":"6046_CR8","doi-asserted-by":"crossref","unstructured":"Bergmen K, Carloni LP, Biberman A, Chan J, Hendry G (2014) Photonic network-on-chip Design. Springer","DOI":"10.1007\/978-1-4419-9335-9"},{"issue":"1","key":"6046_CR9","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/1132952.1132953","volume":"38","author":"T Bjerregaard","year":"2006","unstructured":"Bjerregaard T, Mahadevan S (2006) A survey of research and practices of network-on-chip. ACM Comp Surv 38(1):1\u201351","journal-title":"ACM Comp Surv"},{"key":"6046_CR10","doi-asserted-by":"crossref","unstructured":"Borkar S (2007) thousand core chips: a technology perspective. In: Proc. 44th ACM\/IEEE Design Automation Conf. pp 746\u2013749","DOI":"10.1109\/DAC.2007.375263"},{"key":"6046_CR11","doi-asserted-by":"crossref","unstructured":"Campobello G, Castano M, Ciofi C, Mangano D (2006) GALS networks on chip: A new solution for asynchronous delay-insensitive links. In: Proc. Design, Automation and Test in Europe Conf. pp 160\u2013165","DOI":"10.1109\/DATE.2006.243842"},{"issue":"10","key":"6046_CR12","doi-asserted-by":"publisher","first-page":"1507","DOI":"10.1109\/TCAD.2011.2157157","volume":"30","author":"J Chan","year":"2011","unstructured":"Chan J, Hendry G, Bergman K, Carloni LP\u00a0(2011) Physical-Layer Modeling and System-Level Design of Chip-Scale Photonic Interconnection Networks. IEEE Transaction on Computer-Aided Design of Integrated Circuit and Systems 30(10):1507\u20131520","journal-title":"IEEE Transaction on Computer-Aided Design of Integrated Circuit and Systems"},{"key":"6046_CR13","unstructured":"Chan JW (2012) Architectural exploration and design methodologies of photonic interconnection networks. PhD Dissertation, Columbia University, New York, USA"},{"key":"6046_CR14","unstructured":"Chen J, Gillard P, Li C (2011) Network-on-Chip (NoC) topologies and performance: A review.\u00a0https:\/\/www.semanticscholar.org\/, Corpus ID: 102342317"},{"issue":"7","key":"6046_CR15","doi-asserted-by":"publisher","first-page":"729","DOI":"10.1109\/71.877831","volume":"11","author":"G-M Chiu","year":"2000","unstructured":"Chiu G-M (2000) The odd-even turn model for adaptive routing. IEEE Trans Parallel Distrib Syst 11(7):729\u2013738","journal-title":"IEEE Trans Parallel Distrib Syst"},{"key":"6046_CR16","doi-asserted-by":"publisher","unstructured":"Enright Jerger ND, Peh L-S (2009) On-chip networks. Synthesis lectures on computer architecture. https:\/\/doi.org\/10.2200\/S00209ED1V01Y200907CAC008","DOI":"10.2200\/S00209ED1V01Y200907CAC008"},{"key":"6046_CR17","doi-asserted-by":"crossref","unstructured":"Guerrier P, Greiner A (2000) A generic architecture for on-chip packet-switched interconnections. In: Proc. Design, Automation and Test in Europe Conf. pp 250\u2013256","DOI":"10.1145\/343647.343776"},{"issue":"1","key":"6046_CR18","first-page":"337","volume":"9","author":"M Hatamirad","year":"2012","unstructured":"Hatamirad M, Reza A, Shabani H, Niazmand B, Reshadi M (2012) Loss-Aware Router Design Approach for Dimension-Ordered Routing Algorithms in photonic Networks-on-Chip. International Journal of Computer Science Issues 9(1):337\u2013345","journal-title":"International Journal of Computer Science Issues"},{"key":"6046_CR19","doi-asserted-by":"publisher","unstructured":"Hendry G, Kamil S, Biberman A, Chan J, Lee BG, Mohiyuddin M, Bergman K, Carloni LP, Oliker L, Shalf J (2009) Analysis of photonic networks for a chip multiprocessor using scientific applications. In: Proc. 3rd ACM\/IEEE International Symposium on Networks-on-Chip. La Jolla, CA, USA, pp 104\u2013113. https:\/\/doi.org\/10.1109\/NOCS.2009.5071458","DOI":"10.1109\/NOCS.2009.5071458"},{"key":"6046_CR20","doi-asserted-by":"crossref","unstructured":"Hendry G, Robinson E, Gleyzer V, Chan J, Carloni L, Bliss N (2010) Circuit-switched memory access in photonic interconnection networks for high-performance embedded computing. In: Proc. ACM\/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis. New Orleans, LA, USA, pp 1\u201312","DOI":"10.21236\/ADA532933"},{"issue":"5","key":"6046_CR21","doi-asserted-by":"publisher","first-page":"641","DOI":"10.1016\/j.jpdc.2010.09.009","volume":"71","author":"G Hendry","year":"2011","unstructured":"Hendry G, Robinsonet E, Gleyzer V, Chan J, Carloni LP, Bliss N, Bergmen K (2011) Time-division-multiplexed arbitration in silicon nanophotonic networks-on-chip for high-performance chip multiprocessors. J Parallel Distrib Comput 71(5):641\u2013650","journal-title":"J Parallel Distrib Comput"},{"key":"6046_CR22","unstructured":"Hendry GR (2011) Architectures and Design Automation for Photonic Networks on Chip, Columbia University"},{"key":"6046_CR23","doi-asserted-by":"crossref","unstructured":"Kachris C, Bergman K, Tomkos I (2012) Optical Interconnects for Future Data Center Networks, Springer New York Heidelberg Dordrecht London","DOI":"10.1007\/978-1-4614-4630-9"},{"key":"6046_CR24","doi-asserted-by":"crossref","unstructured":"Kachris C, Tomkos I (2012) A Survey on Optical Interconnects for Data Centers. IEEE Comm Surveys Tutorials 14(4)","DOI":"10.1109\/SURV.2011.122111.00069"},{"issue":"7","key":"6046_CR25","doi-asserted-by":"publisher","first-page":"293","DOI":"10.1016\/j.sysarc.2010.04.003","volume":"56","author":"YE Krasteva","year":"2010","unstructured":"Krasteva YE, de la Torre E, Riesgo T (2010) Reconfigurable networks on chip: DRNoC architecture. J Syst Arch: the EUROMICRO Journal 56(7):293\u2013302","journal-title":"J Syst Arch: the EUROMICRO Journal"},{"key":"6046_CR26","doi-asserted-by":"crossref","unstructured":"Micheli GD, Seiculescu C, Murali S, Benini L (2010) Networks on chips: From research to products. In: Proc. Design Automation Conf. pp 300\u2013305","DOI":"10.1145\/1837274.1837352"},{"issue":"23","key":"6046_CR27","doi-asserted-by":"publisher","first-page":"3736","DOI":"10.1109\/JLT.2012.2227945","volume":"30","author":"R Min","year":"2012","unstructured":"Min R, Ji R, Chen Q, Zhang L, Yang L (2012) A universal method for constructing N-port nonblocking optical router for photonic networks-on-chip. J Light Technol 30(23):3736\u20133741","journal-title":"J Light Technol"},{"key":"6046_CR28","doi-asserted-by":"crossref","unstructured":"Mo KH, Ye Y, Wu X, Zhang W, Liu W, Xu J (2010) A hierarchical hybrid optical-electronic network-on-chip. In: Proc. IEEE Computer Society Annual Symposium on VLSI. Lixouri, Greece, pp 327\u2013332","DOI":"10.1109\/ISVLSI.2010.17"},{"key":"6046_CR29","unstructured":"Moadeli M (2010) Quarc: An Architecture for Effcient On-Chip Communication, PhD Thesis, University of Glasgow"},{"key":"6046_CR30","unstructured":"Nikdast M, Xu J (2007) Crosstalk noise and Loss Analysis Platform (CLAP). Hong Kong Univ Sci Technol 1\u201317. http:\/\/www.ece.ust.hk\/~eexu\/CLAP.html"},{"key":"6046_CR31","doi-asserted-by":"crossref","unstructured":"Pan Y, Kumar P, Kim J, Memik G, Zhang Y, Choudhary A (2009) Firefly: Illuminating future network-on-chip with nanophotonics. In: Proc. 36th\u00a0Annual Symposium on Computer Architecture. Austin, Texas, USA, pp 429\u2013440","DOI":"10.1145\/1555754.1555808"},{"key":"6046_CR32","doi-asserted-by":"crossref","unstructured":"Petracca M, Bergman K, Carloni LP (2008) Photonic network-on-chip: Opportunities and challenges. IEEE Int Symp Circuits Syst pp 2789\u20132792","DOI":"10.1109\/ISCAS.2008.4542036"},{"key":"6046_CR33","doi-asserted-by":"crossref","unstructured":"Rahimi A, Salehi ME, Mohammadi S, Fakhraie SM, Azarpeyvand A (2010) Energy\/throughput trade-off in a fully asynchronous NoC for GALS-based MPSoC architectures. In: Proc. IEEE International Conf. on Design & Technology of Integrated Systems in Nanoscale Era. Hammamet, Tunisia, pp 1\u20136","DOI":"10.1109\/DTIS.2010.5487580"},{"key":"6046_CR34","unstructured":"Salminen E, Kulmala A, Hamalainin TD (2008) Survey of network-on-chip proposals. OCP-IP White Paper pp 1\u201313"},{"key":"6046_CR35","doi-asserted-by":"crossref","unstructured":"Seiculescu C, Murali S, Benini L, De Micheli G (2009) SunFloor 3D: A tool for networks on chip topology synthesis for 3D systems on chips. In: Proc. Design, Automation and Test in Europe Conf. and Exhibition. pp 9\u201314","DOI":"10.1109\/DATE.2009.5090625"},{"key":"6046_CR36","doi-asserted-by":"crossref","unstructured":"Shacham A, Bergman K, Carloni LP (2007) On the design of a photonic network-on-chip. In: Proc. First International Symposium on Networks-on-Chip (NOCS'07). Princeton, NJ, USA, pp 53\u201364","DOI":"10.1109\/NOCS.2007.35"},{"issue":"9","key":"6046_CR37","doi-asserted-by":"publisher","first-page":"1246","DOI":"10.1109\/TC.2008.78","volume":"57","author":"A Shacham","year":"2008","unstructured":"Shacham A, Bergmen K, Carloni LP (2008) Photonic network-on-chip for future generations of chip multiprocessors. IEEE Trans Comput 57(9):1246\u20131260","journal-title":"IEEE Trans Comput"},{"key":"6046_CR38","doi-asserted-by":"crossref","first-page":"29","DOI":"10.1109\/HOTI.2007.9","volume-title":"15th Annual IEEE Symposium on High-Performance Interconnects (HOTI 2007)","author":"A Shacham","year":"2007","unstructured":"Shacham A, Lee BG, Chen Q, Carloni LP (2007) Photonic NoC for DMA communications in chip multiprocessors. 15th Annual IEEE Symposium on High-Performance Interconnects (HOTI 2007). Stanford, CA, USA, pp 29\u201338"},{"key":"6046_CR39","unstructured":"Singh A (2005) Load-balanced routing in interconnection networks. PhD Dissertation, Stanford University, Palo Alto, CA, USA"},{"key":"6046_CR40","doi-asserted-by":"publisher","unstructured":"Tsai W-C, Lan Y-C, Hu YH, Chen S-J (2012) Networks on chips: Structure and design methodologies. J Electr Comp Eng. https:\/\/doi.org\/10.1155\/2012\/509465","DOI":"10.1155\/2012\/509465"},{"issue":"2","key":"6046_CR41","doi-asserted-by":"publisher","first-page":"223","DOI":"10.1109\/71.910875","volume":"12","author":"AS Vaidya","year":"2001","unstructured":"Vaidya AS, Sivasubramaniam A, Das CR (2001) Impact of virtual channels and adaptive routing on application performance. IEEE Trans Parallel Distrib Syst 12(2):223\u2013237","journal-title":"IEEE Trans Parallel Distrib Syst"},{"issue":"1","key":"6046_CR42","doi-asserted-by":"publisher","first-page":"29","DOI":"10.1109\/JSSC.2007.910957","volume":"43","author":"SR Vangal","year":"2008","unstructured":"Vangal SR, Howard J, Ruhl G, Dighe S, Wilson H, Tschanz J (2008) An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS. IEEE J Solid-State Circuits 43(1):29\u201341","journal-title":"IEEE J Solid-State Circuits"},{"key":"6046_CR43","unstructured":"Wu X, Gopalan P (2010) Xilinx Next Generation 28 nm FPGA Technology Overview Available at www.xilinx.com\/support\/documentation\/white_papers\/wp312_Next_Gen_28_nm_Overview.pdf"},{"key":"6046_CR44","doi-asserted-by":"crossref","unstructured":"Xie Y, Nikdast M, Xu J, Zhang W, Li Q, Wu X, Ye Y, Wang X, Liu W (2010) Crosstalk noise and bit error rate analysis for optical network-on-chip. In: Proc. Design Automation Conf. (DAC). Anaheim, CA, USA, pp 657\u2013660","DOI":"10.1145\/1837274.1837441"},{"issue":"15","key":"6046_CR45","first-page":"3550","volume":"34","author":"Y Xie","year":"2012","unstructured":"Xie Y, Song T, Zhang Z, He C, Li J, Xu C, Nikdast M, Xu J, Wu X, Zhang W, Ye Y, Wang X, Wang Z, Liu W (2012) Formal worst-case analysis of crosstalk noise in mesh-based optical Networks-on-Chip. IEEE Trans Very Large Scale Integr VLSI Syst 34(15):3550\u20133562","journal-title":"IEEE Trans Very Large Scale Integr VLSI Syst"},{"key":"6046_CR46","doi-asserted-by":"crossref","unstructured":"Xie Y, Vijaykrishnan N, Das C (2009) Three-dimensional network-on-chip architecture. In: Xie Y, Cong J, Sapatnekar S (eds) Three dimensional integrated circuit design, Springer, pp 189\u2013217","DOI":"10.1007\/978-1-4419-0784-4_8"},{"key":"6046_CR47","doi-asserted-by":"crossref","unstructured":"Zarkesh-Ha P, Beaerra GBP, Forrest S (2010) Hybrid network on chip (HNoC): Local buses with a global mesh architecture. In: Proc. ACM\/IEEE International Workshop on System Level Interconnect Prediction. pp 9\u201314","DOI":"10.1145\/1811100.1811104"}],"container-title":["Journal of Electronic Testing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-023-06046-x.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/article\/10.1007\/s10836-023-06046-x\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/s10836-023-06046-x.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,10,15]],"date-time":"2024-10-15T10:35:15Z","timestamp":1728988515000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/s10836-023-06046-x"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,2]]},"references-count":47,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2023,2]]}},"alternative-id":["6046"],"URL":"https:\/\/doi.org\/10.1007\/s10836-023-06046-x","relation":{},"ISSN":["0923-8174","1573-0727"],"issn-type":[{"value":"0923-8174","type":"print"},{"value":"1573-0727","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,2]]},"assertion":[{"value":"2 September 2021","order":1,"name":"received","label":"Received","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"24 January 2023","order":2,"name":"accepted","label":"Accepted","group":{"name":"ArticleHistory","label":"Article History"}},{"value":"28 February 2023","order":3,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}},{"order":1,"name":"Ethics","group":{"name":"EthicsHeading","label":"Declarations"}},{"value":"The authors declare that they have no competing interests.","order":2,"name":"Ethics","group":{"name":"EthicsHeading","label":"Conflict of Interest"}}]}}