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However, its performance on superconducting hardware has remained unverified. In this work, we present a hardware-efficient implementation of the M\u00f8lmer\u2013S\u00f8rensen gate and characterize its performance using quantum process tomography (QPT) on IBM Quantum\u2019s superconducting processors. Our implementation achieves a process fidelity of 92.47% on the real quantum hardware, a performance competitive with the 93.02% fidelity of the device\u2019s native controlled-NOT (CX) gate. Furthermore, for the\n                    <jats:inline-formula>\n                      <jats:alternatives>\n                        <jats:tex-math>$$\\vert {00} \\rangle $$<\/jats:tex-math>\n                        <mml:math xmlns:mml=\"http:\/\/www.w3.org\/1998\/Math\/MathML\">\n                          <mml:mrow>\n                            <mml:mo>|<\/mml:mo>\n                            <mml:mn>00<\/mml:mn>\n                            <mml:mo>\u27e9<\/mml:mo>\n                          <\/mml:mrow>\n                        <\/mml:math>\n                      <\/jats:alternatives>\n                    <\/jats:inline-formula>\n                    input state, the gate prepares the target Bell state with\n                    <jats:inline-formula>\n                      <jats:alternatives>\n                        <jats:tex-math>$$94.2\\%$$<\/jats:tex-math>\n                        <mml:math xmlns:mml=\"http:\/\/www.w3.org\/1998\/Math\/MathML\">\n                          <mml:mrow>\n                            <mml:mn>94.2<\/mml:mn>\n                            <mml:mo>%<\/mml:mo>\n                          <\/mml:mrow>\n                        <\/mml:math>\n                      <\/jats:alternatives>\n                    <\/jats:inline-formula>\n                    success probability, confirming its correct logical operation. These results demonstrate that non-native entangling gates can be optimized to perform on par with hardware-native operations. This work expands the effective gate set for algorithm design on fixed-architecture processors and provides a critical benchmark for cross-platform gate evaluation, underscoring the role of hardware-aware compilation in advancing noisy intermediate-scale quantum (NISQ) computing.\n                  <\/jats:p>","DOI":"10.1007\/s11128-026-05167-4","type":"journal-article","created":{"date-parts":[[2026,4,21]],"date-time":"2026-04-21T06:43:50Z","timestamp":1776753830000},"update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["A hardware-efficient M\u00f8lmer\u2013S\u00f8rensen gate for superconducting quantum computers"],"prefix":"10.1007","volume":"25","author":[{"given":"Muhammad","family":"AbuGhanem","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2026,4,21]]},"reference":[{"key":"5167_CR1","doi-asserted-by":"publisher","first-page":"33","DOI":"10.1007\/s12200-024-00133-3","volume":"17","author":"M AbuGhanem","year":"2024","unstructured":"AbuGhanem, M.: Information processing at the speed of light. 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