{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,2]],"date-time":"2022-04-02T22:20:43Z","timestamp":1648938043451},"reference-count":14,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2010,2,9]],"date-time":"2010-02-09T00:00:00Z","timestamp":1265673600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"published-print":{"date-parts":[[2011,8]]},"DOI":"10.1007\/s11227-010-0388-0","type":"journal-article","created":{"date-parts":[[2010,2,8]],"date-time":"2010-02-08T09:01:39Z","timestamp":1265619699000},"page":"203-215","source":"Crossref","is-referenced-by-count":1,"title":["Software transactional memories: an\u00a0approach\u00a0for\u00a0multicore programming"],"prefix":"10.1007","volume":"57","author":[{"given":"Damien","family":"Imbs","sequence":"first","affiliation":[]},{"given":"Michel","family":"Raynal","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2010,2,9]]},"reference":[{"issue":"2","key":"388_CR1","doi-asserted-by":"crossref","first-page":"172","DOI":"10.1016\/j.scico.2006.05.009","volume":"63","author":"J Cachopo","year":"2006","unstructured":"Cachopo J, Rito-Silva A (2006) Versioned boxes as the basis for transactional memory. Sci Comput Progr 63(2):172\u2013175","journal-title":"Sci Comput Progr"},{"key":"388_CR2","series-title":"LNCS","first-page":"194","volume-title":"Proc. 20th int\u2019l symposium on distributed computing (DISC\u201906)","author":"D Dice","year":"2006","unstructured":"Dice D, Shalev O, Shavit N (2006) Transactional locking\u00a0II. In: Proc. 20th int\u2019l symposium on distributed computing (DISC\u201906). LNCS, vol\u00a04167. Springer, Berlin, pp\u00a0194\u2013208"},{"issue":"1","key":"388_CR3","doi-asserted-by":"crossref","first-page":"48","DOI":"10.1145\/1360443.1360456","volume":"39","author":"P Felber","year":"2008","unstructured":"Felber P, Fetzer Ch, Guerraoui R, Harris T (2008) Transactions are coming back, but are they the same? ACM SIGACT News, Distributed Comput Column 39(1):48\u201358","journal-title":"ACM SIGACT News, Distributed Comput Column"},{"key":"388_CR4","doi-asserted-by":"crossref","unstructured":"Guerraoui R, Kapa\u0142ka M (2008) On the correctness of transactional memory. In: Proc. 13th ACM SIGPLAN symposium on principles and practice of parallel programming (PPoPP\u201908), pp\u00a0175\u2013184","DOI":"10.1145\/1345206.1345233"},{"issue":"3","key":"388_CR5","doi-asserted-by":"crossref","first-page":"8","DOI":"10.1109\/MM.2007.63","volume":"27","author":"T Harris","year":"2007","unstructured":"Harris T, Cristal A, Unsal OS, Ayguade E, Gagliardi F, Smith B, Valero M (2007) Transactional memory: an overview. IEEE Micro 27(3):8\u201329","journal-title":"IEEE Micro"},{"issue":"1","key":"388_CR6","doi-asserted-by":"crossref","first-page":"62","DOI":"10.1145\/1360443.1360458","volume":"39","author":"MP Herlihy","year":"2008","unstructured":"Herlihy MP, Luchangco V (2008) Distributed Computing and the Multicore Revolution. ACM SIGACT News, Distributed Comput Column 39(1):62\u201372","journal-title":"ACM SIGACT News, Distributed Comput Column"},{"key":"388_CR7","unstructured":"Herlihy MP, Moss JEB (1993) Transactional memory: architectural support for lock-free data structures. In: Proc 20th ACM int\u2019l symposium on computer architecture (ISCA\u201993), pp 289\u2013300, 1993"},{"key":"388_CR8","series-title":"LNCS","first-page":"67","volume-title":"Proc 10th int\u2019l conference on distributed computing and networking (ICDCN\u201909)","author":"D Imbs","year":"2009","unstructured":"Imbs D, Raynal M (2009) Provable STM Properties: Leveraging clock and locks to favor commit and early abort. In: Proc 10th int\u2019l conference on distributed computing and networking (ICDCN\u201909). LNCS, vol\u00a05408. Springer, Berlin, pp\u00a067\u201378"},{"key":"388_CR9","series-title":"LNCS","first-page":"276","volume-title":"16th Colloquium on structural information and communication complexity (SIROCCO\u201909)","author":"D Imbs","year":"2009","unstructured":"Imbs D, Raynal M (2009) A versatile STM protocol with invisible read operations that satisfies the virtual world consistency condition. In: 16th Colloquium on structural information and communication complexity (SIROCCO\u201909). LNCS, vol 5869. Springer, Berlin, pp\u00a0276\u2013290"},{"key":"388_CR10","series-title":"LNCS","doi-asserted-by":"crossref","first-page":"26","DOI":"10.1007\/978-3-642-03275-2_4","volume-title":"10th int\u2019l conference on parallel computing technologies (PaCT\u201909)","author":"D Imbs","year":"2009","unstructured":"Imbs D, Raynal M (2009) Software transactional memories: an approach for multicore programming. In: 10th int\u2019l conference on parallel computing technologies (PaCT\u201909). LNCS, vol\u00a05698. Springer, Berlin, pp\u00a026\u201340"},{"issue":"7","key":"388_CR11","doi-asserted-by":"crossref","first-page":"80","DOI":"10.1145\/1364782.1364800","volume":"51","author":"J Larus","year":"2008","unstructured":"Larus J, Kozyrakis Ch (2008) Transactional memory: is TM the answer for improving parallel programming? Commun ACM 51(7):80\u201389","journal-title":"Commun ACM"},{"issue":"4","key":"388_CR12","doi-asserted-by":"crossref","first-page":"631","DOI":"10.1145\/322154.322158","volume":"26","author":"ChH Papadimitriou","year":"1979","unstructured":"Papadimitriou ChH (1979) The serializability of concurrent updates. J\u00a0ACM 26(4):631\u2013653","journal-title":"J\u00a0ACM"},{"key":"388_CR13","unstructured":"Raynal M (2008) Synchronization is coming back, but is it the same? Keynote speech. In: IEEE 22nd int\u2019l conf on advanced inf. networking and applications (AINA\u201908), pp\u00a01\u201310, 2008"},{"issue":"2","key":"388_CR14","doi-asserted-by":"crossref","first-page":"99","DOI":"10.1007\/s004460050028","volume":"10","author":"N Shavit","year":"1997","unstructured":"Shavit N, Touitou D (1997) Software transactional memory. Distrib Comput 10(2):99\u2013116","journal-title":"Distrib Comput"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-010-0388-0.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11227-010-0388-0\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-010-0388-0","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,5,27]],"date-time":"2020-05-27T18:57:44Z","timestamp":1590605864000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11227-010-0388-0"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,2,9]]},"references-count":14,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2011,8]]}},"alternative-id":["388"],"URL":"https:\/\/doi.org\/10.1007\/s11227-010-0388-0","relation":{},"ISSN":["0920-8542","1573-0484"],"issn-type":[{"value":"0920-8542","type":"print"},{"value":"1573-0484","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,2,9]]}}}