{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,9,30]],"date-time":"2023-09-30T23:27:04Z","timestamp":1696116424694},"reference-count":17,"publisher":"Springer Science and Business Media LLC","issue":"3","license":[{"start":{"date-parts":[[2010,3,11]],"date-time":"2010-03-11T00:00:00Z","timestamp":1268265600000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"published-print":{"date-parts":[[2011,9]]},"DOI":"10.1007\/s11227-010-0404-4","type":"journal-article","created":{"date-parts":[[2010,3,10]],"date-time":"2010-03-10T13:48:38Z","timestamp":1268228918000},"page":"276-313","source":"Crossref","is-referenced-by-count":16,"title":["Analysis of Multi-Sort Algorithm on Multi-Mesh of\u00a0Trees (MMT) architecture"],"prefix":"10.1007","volume":"57","author":[{"given":"Nitin","family":"Rakesh","sequence":"first","affiliation":[]},{"family":"Nitin","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2010,3,11]]},"reference":[{"key":"404_CR1","unstructured":"Jana PK (2003) Multi-Mesh of Trees with its parallel algorithms. J Syst Archit, 193\u2013206"},{"issue":"10","key":"404_CR2","doi-asserted-by":"crossref","first-page":"1132","DOI":"10.1109\/12.628397","volume":"46","author":"M De","year":"1997","unstructured":"De M, Das D, Ghosh M, Sinha BP (1997) An efficient sorting algorithm on multi-mesh. IEEE Trans Comput 46(10):1132\u20131137","journal-title":"IEEE Trans Comput"},{"key":"404_CR3","doi-asserted-by":"crossref","unstructured":"Das D, Sinha BP (1995) Multi-mesh an efficient topology for parallel processing. In: Proceeding of the ninth international parallel processing symposium, 1995, pp 17\u201321","DOI":"10.1109\/IPPS.1995.395908"},{"issue":"5","key":"404_CR4","doi-asserted-by":"crossref","first-page":"536","DOI":"10.1109\/12.769436","volume":"48","author":"D Das","year":"1999","unstructured":"Das D, De M, Sinha BP (1999) A new network topology with multiple mesh. IEEE Trans Comput 48(5):536\u2013551","journal-title":"IEEE Trans Comput"},{"issue":"2","key":"404_CR5","doi-asserted-by":"crossref","first-page":"238","DOI":"10.1109\/12.16500","volume":"38","author":"ID Scherson","year":"1989","unstructured":"Scherson ID, Sen S (1989) Parallel sorting algorithm in two-dimensional VLSI models of computation. IEEE Trans Comput 38(2):238\u2013249","journal-title":"IEEE Trans Comput"},{"issue":"7","key":"404_CR6","doi-asserted-by":"crossref","first-page":"669","DOI":"10.1109\/TC.1978.1675167","volume":"27","author":"F Preparata","year":"1978","unstructured":"Preparata F (1978) New parallel sorting schemes. IEEE Trans Comput 27(7):669\u2013673","journal-title":"IEEE Trans Comput"},{"key":"404_CR7","volume-title":"The art of computer programming, sorting and searching","author":"DE Knuth","year":"1973","unstructured":"Knuth DE (1973) The art of computer programming, sorting and searching, vol 3. Addison-Wesley, Reading"},{"issue":"11","key":"404_CR8","doi-asserted-by":"crossref","first-page":"1367","DOI":"10.1109\/TC.1987.5009478","volume":"36","author":"SG Akl","year":"1987","unstructured":"Akl SG, Santoro N (1987) Optimal parallel merging and sorting without memory conflicts. IEEE Trans Comput 36(11):1367\u20131369","journal-title":"IEEE Trans Comput"},{"key":"404_CR9","volume-title":"Computer architecture and parallel processing","author":"K Hwang","year":"1989","unstructured":"Hwang K, Briggs FA (1989) Computer architecture and parallel processing. McGraw-Hill, New York"},{"issue":"1","key":"404_CR10","doi-asserted-by":"crossref","first-page":"3","DOI":"10.1111\/j.1467-8659.1987.tb00340.x","volume":"6","author":"HR Arabnia","year":"1987","unstructured":"Arabnia HR, Oliver MA (1987) Arbitrary rotation of raster images with SIMD machine architectures. Int J Eurograph Assoc (Comput Graph Forum) 6(1):3\u201312","journal-title":"Int J Eurograph Assoc (Comput Graph Forum)"},{"issue":"2","key":"404_CR11","doi-asserted-by":"crossref","first-page":"201","DOI":"10.1142\/S0218001495000110","volume":"9","author":"SM Bhandarkar","year":"1995","unstructured":"Bhandarkar SM, Arabnia HR, Smith JW (1995) A reconfigurable architecture for image processing and computer vision. Int J Pattern Recognit Artif Intell (IJPRAI) 9(2):201\u2013229 (special issue on VLSI Algorithms and architectures for computer vision, image processing, pattern recognition and AI)","journal-title":"Int J Pattern Recognit Artif Intell (IJPRAI)"},{"issue":"1","key":"404_CR12","doi-asserted-by":"crossref","first-page":"107","DOI":"10.1006\/jpdc.1995.1011","volume":"24","author":"SM Bhandarkar","year":"1995","unstructured":"Bhandarkar SM, Arabnia HR (1995) The hough transform on a reconfigurable multi-ring network. J\u00a0Parallel Distrib Comput 24(1):107\u2013114","journal-title":"J\u00a0Parallel Distrib Comput"},{"issue":"1","key":"404_CR13","doi-asserted-by":"crossref","first-page":"43","DOI":"10.1023\/A:1022804606389","volume":"25","author":"M Arif\u00a0Wani","year":"2003","unstructured":"Arif\u00a0Wani M, Arabnia HR (2003) Parallel edge-region-based segmentation algorithm targeted at reconfigurable multi-ring network. J Supercomput 25(1):43\u201363","journal-title":"J Supercomput"},{"key":"404_CR14","doi-asserted-by":"crossref","unstructured":"Satish N, Harris M, Garland M (2009) Designing efficient sorting algorithms for manycore GPUs. In: IEEE international symposium on parallel & distributed processing, 2009, pp 1\u201310","DOI":"10.1109\/IPDPS.2009.5161005"},{"key":"404_CR15","unstructured":"Xie H, Xue Y (2008) An improved parallel sorting algorithm for odd sequence. In: International conference on advanced computer theory and engineering, 2008, pp 356\u2013360"},{"key":"404_CR16","author":"Nitin","year":"2009","unstructured":"Nitin, Garhwal S, Srivastava N (2009) Designing a fault-tolerant fully-chained combining switches multi-stage interconnection network with disjoint paths. J Supercomput. doi: 10.1007\/s11227-009-0336-z","journal-title":"J Supercomput"},{"issue":"2","key":"404_CR17","doi-asserted-by":"crossref","first-page":"103","DOI":"10.1007\/s11227-007-0151-3","volume":"44","author":"MdM Akanda","year":"2008","unstructured":"Akanda MdM, Abderazek BA, Sowa M (2008) Dual-execution mode processor architecture. J Supercomput 44(2):103\u2013125","journal-title":"J Supercomput"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-010-0404-4.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11227-010-0404-4\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-010-0404-4","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T10:24:00Z","timestamp":1559384640000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11227-010-0404-4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3,11]]},"references-count":17,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2011,9]]}},"alternative-id":["404"],"URL":"https:\/\/doi.org\/10.1007\/s11227-010-0404-4","relation":{},"ISSN":["0920-8542","1573-0484"],"issn-type":[{"value":"0920-8542","type":"print"},{"value":"1573-0484","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,3,11]]}}}