{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T08:16:59Z","timestamp":1759133819411},"reference-count":31,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2010,6,17]],"date-time":"2010-06-17T00:00:00Z","timestamp":1276732800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"published-print":{"date-parts":[[2012,2]]},"DOI":"10.1007\/s11227-010-0458-3","type":"journal-article","created":{"date-parts":[[2010,6,16]],"date-time":"2010-06-16T11:43:51Z","timestamp":1276688631000},"page":"636-657","source":"Crossref","is-referenced-by-count":14,"title":["Efficient datapath merging for the overhead reduction of run-time reconfigurable systems"],"prefix":"10.1007","volume":"59","author":[{"given":"Mahmood","family":"Fazlali","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ali","family":"Zakerolhosseini","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Georgi","family":"Gaydadjiev","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2010,6,17]]},"reference":[{"key":"458_CR1","doi-asserted-by":"crossref","unstructured":"Woods N (2007) Integrating FPGAs in high-performance computing: the architecture and implementation perspective. In: Fifteenth ACM\/SIGDA international symposium on field-programmable gate arrays (FPGA), pp\u00a0132\u2013137","DOI":"10.1145\/1216919.1216941"},{"issue":"2","key":"458_CR2","doi-asserted-by":"crossref","first-page":"69","DOI":"10.1109\/MC.2008.65","volume":"41","author":"T El-Ghazawi","year":"2008","unstructured":"El-Ghazawi T, El-Araby E, Huang M, Gaj K, Kindratenko V, Buell D (2008) The promise of high-performance reconfigurable computing. Computer 41(2):69\u201376","journal-title":"Computer"},{"issue":"2","key":"458_CR3","doi-asserted-by":"crossref","first-page":"171","DOI":"10.1145\/508352.508353","volume":"34","author":"K Compton","year":"2002","unstructured":"Compton K, Hauck S (2002) Reconfigurable computing: a survey of systems and software. ACM Comput Surv 34(2):171\u2013210","journal-title":"ACM Comput Surv"},{"key":"458_CR4","unstructured":"Li Z (2002) Configuration management techniques for reconfigurable computing. PhD thesis Northwestern University"},{"key":"458_CR5","doi-asserted-by":"crossref","unstructured":"Rollmann M, Merker R (2008) A cost model for partial dynamic reconfiguration. In: International conference on embedded computer systems: architectures, modeling, and simulation (SAMOS). July 2008, Samos, Greece, pp 182\u2013186","DOI":"10.1109\/ICSAMOS.2008.4664862"},{"key":"458_CR6","doi-asserted-by":"crossref","unstructured":"Huang Z, Malik S (2001) Managing dynamic reconfiguration overhead in systems-on-a-chip design using reconfigurable datapaths and optimized interconnection networks. In: Proceeding of design automation and test in Europe (DATE), March 2001, Munich, Germany, pp 735\u2013740","DOI":"10.1109\/DATE.2001.915110"},{"key":"458_CR7","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4020-8588-8","volume-title":"High-level synthesis from algorithm to digital circuit","author":"Ph Coussy","year":"2008","unstructured":"Coussy Ph, Morawiec A (2008) High-level synthesis from algorithm to digital circuit. Springer, Berlin"},{"key":"458_CR8","unstructured":"Fazlali M, Zakerolhosseini A, Sabeghi M, Bertels K, Gaydadjiev G (2009) Datapath configuration time reduction for run-time reconfigurable systems. In: International conference on engineering of reconfigurable systems and algorithms (ERSA), July 2009, Nevada, USA, pp 323\u2013327"},{"issue":"11","key":"458_CR9","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1155\/2008\/856756","volume":"2","author":"Y Qu","year":"2008","unstructured":"Qu Y, Tiensyrj K, Soininen J-P, Nurmi J (2008) Design flow instantiation for run-time reconfigurable systems. EURASIP J Embed Syst 2(11):1\u20139","journal-title":"EURASIP J Embed Syst"},{"key":"458_CR10","doi-asserted-by":"crossref","unstructured":"Fazlali M, Zakerolhosseini A, Sahhbahrami A, Gaydadjiev G (2009) High speed merged datapath design for run-time reconfigurable systems. In: International conference on field-programmable technology (FPT), December 2009, Sydney, Australia, pp 339\u2013342","DOI":"10.1109\/FPT.2009.5377678"},{"key":"458_CR11","unstructured":"Kumlander D (2001) A new exact algorithm for the maximum-weight clique problem based on a heuristic vertex-coloring and a backtrack search. In: European congress of mathematics (4ECM), June\u2013July 2001, Stockholm, Sweden, pp 202\u2013208"},{"issue":"4","key":"458_CR12","doi-asserted-by":"crossref","first-page":"322","DOI":"10.1016\/j.compeleceng.2005.09.007","volume":"32","author":"F Farshadjam","year":"2006","unstructured":"Farshadjam F, Dehghan M, Fathy M, Ahmadi M (2006) A new compression based approach for reconfiguration overhead reduction in virtex based RTR systems. Comput Electr Eng 32(4):322\u2013347","journal-title":"Comput Electr Eng"},{"key":"458_CR13","unstructured":"Chavet C, Andriamisaina C, Coussy Ph, Casseau E, Juin E, Urard P, Martin E (2007) A design flow dedicated to multimode architectures for DSP applications. In: International conference on computer-aided design (ICCAD), November 2007, San Jose, CA, USA, pp 604\u2013611"},{"key":"458_CR14","doi-asserted-by":"crossref","unstructured":"Boden M, Fiebig T, Mei\u00dfner T, R\u00fclke S, Becker JA (2007) High-level synthesis of HW tasks targeting run-time reconfigurable FPGAs. In: IEEE international symposium on parallel and distributed processing (IPDPS 2007), March 2007, CA, USA, pp 1\u20138","DOI":"10.1109\/IPDPS.2007.370390"},{"issue":"1","key":"458_CR15","doi-asserted-by":"crossref","first-page":"168","DOI":"10.1145\/1053271.1053278","volume":"4","author":"L Chiou","year":"2005","unstructured":"Chiou L, Bhunia S, Roy K (2005) Synthesis of application-specific highly efficient multi-mode cores for embedded systems. ACM Trans Embed Syst Comput 4(1):168\u2013188","journal-title":"ACM Trans Embed Syst Comput"},{"key":"458_CR16","doi-asserted-by":"crossref","unstructured":"Zuluaga M, Topham N (2008) Resource sharing in custom instruction set extensions. In: Symposium on application specific processors (SASP), June 2008, Wellington, DC, USA, pp 7\u201313","DOI":"10.1109\/SASP.2008.4570779"},{"issue":"7","key":"458_CR17","doi-asserted-by":"crossref","first-page":"969","DOI":"10.1109\/TCAD.2005.850844","volume":"24","author":"N Moreano","year":"2005","unstructured":"Moreano N, Borin E, de Souza C, Araujo G (2005) Efficient datapath merging for partially reconfigurable architectures. IEEE Trans Comput-Aided Des 24(7):969\u2013980","journal-title":"IEEE Trans Comput-Aided Des"},{"key":"458_CR18","doi-asserted-by":"crossref","unstructured":"Fazlali M Fallah KF, Zolghadr M, Zakerolhosseini A (2009) A new datapath merging method for reconfigurable systems. In: 5th international workshop on applied reconfigurable computing (ARC), March 2009, Karlsruhe, Germany, pp 157\u2013168","DOI":"10.1007\/978-3-642-00641-8_17"},{"key":"458_CR19","doi-asserted-by":"crossref","unstructured":"Economakos G (2006) High-level synthesis with reconfigurable datapath components. In: IEEE international conference on parallel and distributed processing symposium (IPDPS), April 2006, Rhodes Island, Greece","DOI":"10.1109\/IPDPS.2006.1639477"},{"issue":"2","key":"458_CR20","doi-asserted-by":"crossref","first-page":"237","DOI":"10.1145\/993396.993398","volume":"3","author":"S Ghiasi","year":"2004","unstructured":"Ghiasi S, Nahapetian A, Sarrafzadeh M (2004) An optimal algorithm for minimizing run-time reconfiguration delay. ACM Trans Embed Comput Syst 3(2):237\u2013256","journal-title":"ACM Trans Embed Comput Syst"},{"key":"458_CR21","doi-asserted-by":"crossref","unstructured":"Mehdipour F, Saheb-Zamani M, Ahmadifar HR, Sedighi M, Murakami K (2006) Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framework. In: IEEE international parallel and distributed processing symposium (IPDPS), April 2006, Rhodes Island, Greece, pp 219\u2013230","DOI":"10.1109\/IPDPS.2006.1639611"},{"issue":"5","key":"458_CR22","doi-asserted-by":"crossref","first-page":"662","DOI":"10.1109\/TCAD.2009.2015739","volume":"28","author":"R Cordone","year":"2009","unstructured":"Cordone R, Redaelli F, Redaelli MA, Santambrogio MD, Sciuto D (2009) Partitioning and scheduling of task graphs on partially dynamically reconfigurable FPGA. IEEE Trans Comput-Aided Des Integr Circuits Syst 28(5):662\u2013675","journal-title":"IEEE Trans Comput-Aided Des Integr Circuits Syst"},{"key":"458_CR23","doi-asserted-by":"crossref","unstructured":"Brisk P, Kaplan A, Sarrafzadeh M (2004) Area-efficient instruction set synthesis for reconfigurable system-on-chip designs. In: Annual conference on design automation (DAC), June 2004, San Diego, CA, USA, pp 395\u2013400","DOI":"10.1145\/996566.996679"},{"key":"458_CR24","doi-asserted-by":"crossref","unstructured":"Boden M, Fiebig T, Reiband M, Reichel P, Rulke S (2008) GePaRD a high-level generation flow for partially reconfigurable designs. In: IEEE computer society annual symposium on VLSI (ISVLSI), April 2008, France, pp 298\u2013303","DOI":"10.1109\/ISVLSI.2008.21"},{"key":"458_CR25","unstructured":"Shannon K, Diessel O (2007) Module graph merging and placement to reduce reconfiguration overheads in paged FPGA devices. In: international conference on field programmable logic and applications (FPL), August 2007, Amsterdam, Netherlands, pp 293\u2013298"},{"key":"458_CR26","unstructured":"Fu W, Compton K (2005) An execution environment for reconfigurable computing. In: Annual IEEE symposium on field-programmable custom computing machines (FCCM), April 2005, CA, USA, pp\u00a0149\u2013158"},{"issue":"2","key":"458_CR27","first-page":"1","volume":"10","author":"C Souza de","year":"2005","unstructured":"de Souza C, Lima AM, Moreano N, Araujo G (2005) The datapath merging problem in reconfigurable systems: Lower bounds and heuristic evaluation. ACM J Exp Algorithmic 10(2):1","journal-title":"ACM J Exp Algorithmic"},{"key":"458_CR28","volume-title":"Computers and intractability-a guide to the theory of NP-completeness","author":"M Garey","year":"1979","unstructured":"Garey M, Johnson DS (1979) Computers and intractability-a guide to the theory of NP-completeness. Freeman, San Francisco"},{"issue":"1\u20133","key":"458_CR29","doi-asserted-by":"crossref","first-page":"197","DOI":"10.1016\/S0166-218X(01)00290-6","volume":"120","author":"PRJ Ostergard","year":"2002","unstructured":"Ostergard PRJ (2002) A fast algorithm for the maximum-weighted clique problem. Discrete Appl Math 120(1\u20133):197\u2013207","journal-title":"Discrete Appl Math"},{"key":"458_CR30","unstructured":"Lee C, Potkonjak M, Mangione WS (1997) Media-bench: a tool for evaluating and synthesizing multimedia and communication systems. In: Annual IEEE\/ACM international symposium on micro-architecture (MICRO), December 1997, California, USA, pp 330\u2013335"},{"key":"458_CR31","unstructured":"GNU compiler collection internals. http:\/\/gcc.gnu.org\/onlinedocs"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-010-0458-3.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11227-010-0458-3\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-010-0458-3","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,6,5]],"date-time":"2020-06-05T20:15:25Z","timestamp":1591388125000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11227-010-0458-3"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,6,17]]},"references-count":31,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2012,2]]}},"alternative-id":["458"],"URL":"https:\/\/doi.org\/10.1007\/s11227-010-0458-3","relation":{},"ISSN":["0920-8542","1573-0484"],"issn-type":[{"value":"0920-8542","type":"print"},{"value":"1573-0484","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,6,17]]}}}