{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,2,13]],"date-time":"2024-02-13T14:31:47Z","timestamp":1707834707599},"reference-count":35,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2012,12,11]],"date-time":"2012-12-11T00:00:00Z","timestamp":1355184000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"published-print":{"date-parts":[[2013,2]]},"DOI":"10.1007\/s11227-012-0828-0","type":"journal-article","created":{"date-parts":[[2012,12,10]],"date-time":"2012-12-10T12:53:43Z","timestamp":1355144023000},"page":"508-537","source":"Crossref","is-referenced-by-count":3,"title":["Accelerating thread-intensive and explicit memory management programs with dynamic partial reconfiguration"],"prefix":"10.1007","volume":"63","author":[{"given":"Qianming","family":"Yang","sequence":"first","affiliation":[]},{"given":"Mei","family":"Wen","sequence":"additional","affiliation":[]},{"given":"Nan","family":"Wu","sequence":"additional","affiliation":[]},{"given":"Chunyuan","family":"Zhang","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2012,12,11]]},"reference":[{"key":"828_CR1","volume-title":"Proceedings of the 2006 ACM\/IEEE conference on supercomputing","author":"J Fatahalian","year":"2006","unstructured":"Fatahalian J, Knight TJ et al (2006) Sequoia: programming the memory hierarchy. In: Proceedings of the 2006 ACM\/IEEE conference on supercomputing"},{"key":"828_CR2","unstructured":"Mattson P (2002) A programming system for the imagine media processor. Dissertation, Stanford University"},{"key":"828_CR3","unstructured":"NVIDIA Corporation (2010) CUDA programming guide, version 2.1"},{"issue":"3","key":"828_CR4","doi-asserted-by":"crossref","first-page":"777","DOI":"10.1145\/1015706.1015800","volume":"23","author":"I Buck","year":"2004","unstructured":"Buck I, Foley T et al (2004) Brook for GPUs: stream computing on graphics hardware. ACM Trans Graph 23(3):777\u2013786","journal-title":"ACM Trans Graph"},{"key":"828_CR5","volume-title":"High performance embedded computing workshop","author":"B Sukhwani","year":"2009","unstructured":"Sukhwani B et al (2009) Effective floating point applications on FPGAs: examples from molecular modeling. In: High performance embedded computing workshop"},{"key":"828_CR6","unstructured":"Xilinx Inc (2008) Early access partial reconfiguration user guide (UG208 v1.2). http:\/\/www.xilinx.com"},{"key":"828_CR7","volume-title":"Proceedings of the programming models for massively parallel computers","author":"B Alpern","year":"1993","unstructured":"Alpern B, Carter L, Ferrante J (1993) Modeling parallel computers as memory hierarchies. In: Proceedings of the programming models for massively parallel computers"},{"key":"828_CR8","volume-title":"Proceedings of 31st annual ACM\/IEEE international symposium on microarchitecture","author":"S Rixner","year":"1998","unstructured":"Rixner S, Dally WJ et al (1998) A\u00a0bandwidth-efficient architecture for media processing. In: Proceedings of 31st annual ACM\/IEEE international symposium on microarchitecture"},{"key":"828_CR9","volume-title":"Proceedings of the eleventh ACM SIGPLAN symposium on principles and practice of parallel programming","author":"G Bikshandi","year":"2006","unstructured":"Bikshandi G, Guo et al (2006) Programming for parallelism and locality with hierarchically tiled arrays. In: Proceedings of the eleventh ACM SIGPLAN symposium on principles and practice of parallel programming"},{"key":"828_CR10","volume-title":"OOPSLA\u201905: proceedings of the 20th annual ACM SIGPLAN conference on object oriented programming systems languages and applications","author":"P Charles","year":"2005","unstructured":"Charles P, Grothoff C et al (2005) X10: an object-oriented approach to nonuniform cluster computing. In: OOPSLA\u201905: proceedings of the 20th annual ACM SIGPLAN conference on object oriented programming systems languages and applications"},{"key":"828_CR11","volume-title":"Ninth international workshop on high-level parallel programming models and supportive environments","author":"D Callahan","year":"2004","unstructured":"Callahan D, Chamberlain BL, Zima HP (2004) The Cascade high productivity language. In: Ninth international workshop on high-level parallel programming models and supportive environments"},{"key":"828_CR12","volume-title":"Proceedings of the 16th IEEE international workshop on rapid system prototyping","author":"Y Krasteva","year":"2005","unstructured":"Krasteva Y, Jimeno A, Torre E, Riesgo T (2005) Straight method for reallocation of complex cores by dynamic reconfiguration in Virtex II FPGAs. In: Proceedings of the 16th IEEE international workshop on rapid system prototyping, Montreal, Canada"},{"key":"828_CR13","unstructured":"Xilinx Inc (2007) XPS HWICAP (v1.00.a) product specification (DS586). http:\/\/www.xilinx.com"},{"key":"828_CR14","volume-title":"Proceedings of IEEE international conference on field programmable logic and applications","author":"M Liu","year":"2009","unstructured":"Liu M, Kuehn W, Lu Z, Jantsch A (2009) Run-time partial reconfiguration speed investigation and architectural design space exploration. In: Proceedings of IEEE international conference on field programmable logic and applications"},{"key":"828_CR15","volume-title":"Proceedings of 2008 IEEE aerospace conference","author":"EJ Mcdonald","year":"2008","unstructured":"Mcdonald EJ (2008) Runtime FPGA partial reconfiguration. In: Proceedings of 2008 IEEE aerospace conference. March 2008"},{"key":"828_CR16","volume-title":"Proceedings of the international conference on field programmable logic and applications","author":"C Claus","year":"2008","unstructured":"Claus C, Zhang B, Stechele W et al (2008) A multiplatform controller allowing for maximum dynamic partial reconfiguration throughput. In: Proceedings of the international conference on field programmable logic and applications. September 2008"},{"key":"828_CR17","volume-title":"FIEOS conference","author":"Y Pi","year":"2002","unstructured":"Pi Y, Long H, Huang S (2002) A SAR parallel processing algorithm and its implementation. In: FIEOS conference"},{"key":"828_CR18","doi-asserted-by":"crossref","first-page":"159","DOI":"10.2528\/PIERC08021801","volume":"1","author":"YK Chan","year":"2008","unstructured":"Chan YK, Koo VC (2008) Modified algorithm for real time SAR signal processing. Prog Electromagn Res C 1:159\u2013168","journal-title":"Prog Electromagn Res C"},{"key":"828_CR19","doi-asserted-by":"crossref","unstructured":"Kuusilinna K et al (2003) Designing BEE: a hardware emulation engine for signal processing in low-power wireless applications. EURASIP J Appl Signal Process","DOI":"10.1155\/S1110865703212154"},{"key":"828_CR20","doi-asserted-by":"crossref","unstructured":"Heithecker S et al (2007) A high-end real-time digital film processing reconfigurable platform. EURASIP J Embed Syst","DOI":"10.1186\/1687-3963-2007-085318"},{"key":"828_CR21","unstructured":"Chang C (2005) Design and applications of a reconfigurable computing system for high performance digital signal processing. Dissertation, University of California, Berkeley"},{"key":"828_CR22","volume-title":"Configuration and programming of heterogeneous multiprocessors on a multi-FPGA system using TMD-MPI","author":"S Manuel","year":"2006","unstructured":"Manuel S, Daniel N, Emanuel R, Paul C (2006) Configuration and programming of heterogeneous multiprocessors on a multi-FPGA system using TMD-MPI. IEEE, New York"},{"key":"828_CR23","volume-title":"International conference on field programmable logic and applications","author":"P Lysaght","year":"2006","unstructured":"Lysaght P, Blodget B, Mason J, Young J, Bridgford B (2006) Enhanced architectures, design methodologies and CAD tools for dynamic reconfiguration of Xilinx FPGAs. In: International conference on field programmable logic and applications"},{"key":"828_CR24","volume-title":"IEE proceedings on computers and digital techniques","author":"P Sedcole","year":"2006","unstructured":"Sedcole P, Blodget B, Becker T, Anderson J, Lysaght P (2006) Modular dynamic reconfiguration in Virtex FPGAs. In: IEE proceedings on computers and digital techniques"},{"key":"828_CR25","unstructured":"Jian H, Matthew P, Jooheung L, Ronald FD (2008) Scalable FPGA-based architecture for DCT computation using dynamic partial reconfiguration. ACM Trans Embed Comput Syst 1\u201318"},{"key":"828_CR26","volume-title":"Proceedings of the conference on design, automation and test in Europe","author":"C Claus","year":"2007","unstructured":"Claus C, Zeppenfeld J, M\u00c4uller F, Stechele W (2007) Using partial-run-time reconfigurable hardware to accelerate video processing in driver assistance system. In: Proceedings of the conference on design, automation and test in Europe, San Jose, CA, USA"},{"key":"828_CR27","doi-asserted-by":"crossref","unstructured":"Mateusz M, J\u00fcrgen T, Ali A, Christophe B (2007) The Erlangen slot machine: a dynamically reconfigurable FPGA-based computer. J VLSI Signal Process 47(1)","DOI":"10.1007\/s11265-006-0017-6"},{"key":"828_CR28","volume-title":"Proceedings of the 42nd annual IEEE\/ACM international symposium on microarchitecture","author":"L Chi-Keung","year":"2009","unstructured":"Chi-Keung L, Sunpyo H, Hyesoon K (2009) Qilin: exploiting parallelism on heterogeneous multiprocessors with adaptive mapping. In: Proceedings of the 42nd annual IEEE\/ACM international symposium on microarchitecture"},{"key":"828_CR29","unstructured":"Xiao L et al (2008) Implementation for high resolution SAR parallel imaging. Inf Electron Eng 6(1)"},{"key":"828_CR30","volume-title":"High performance embedded computing workshop","author":"P Carlston","year":"2009","unstructured":"Carlston P et al (2009) Optimizing an innovative SAR post-processing algorithm for multi-core processors: a case study. In: High performance embedded computing workshop"},{"key":"828_CR31","volume-title":"High performance embedded computing workshop","author":"W Lundgren","year":"2007","unstructured":"Lundgren W et al (2007) Programming examples that expose efficiency issues for the cell broadband engine architecture. In: High performance embedded computing workshop"},{"key":"828_CR32","volume-title":"Computer architecture: a quantitative approach","author":"LH John","year":"2002","unstructured":"John LH, David AP (2002) Computer architecture: a quantitative approach, 3rd edn. Morgan Kaufmann, San Mateo","edition":"3"},{"key":"828_CR33","unstructured":"http:\/\/sequoia.stanford.edu\/ , 2010"},{"key":"828_CR34","unstructured":"http:\/\/scottmcpeak.com\/elkhound\/sources\/elsa\/ , 2010"},{"key":"828_CR35","unstructured":"FFT Xilinx Logicore (2010) http:\/\/www.xilinx.com\/products\/ipcenter\/FFT.htm"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-012-0828-0.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11227-012-0828-0\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-012-0828-0","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,7,6]],"date-time":"2019-07-06T21:58:15Z","timestamp":1562450295000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11227-012-0828-0"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,12,11]]},"references-count":35,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2013,2]]}},"alternative-id":["828"],"URL":"https:\/\/doi.org\/10.1007\/s11227-012-0828-0","relation":{},"ISSN":["0920-8542","1573-0484"],"issn-type":[{"value":"0920-8542","type":"print"},{"value":"1573-0484","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,12,11]]}}}