{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,28]],"date-time":"2025-10-28T10:40:31Z","timestamp":1761648031919},"reference-count":38,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2013,1,23]],"date-time":"2013-01-23T00:00:00Z","timestamp":1358899200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"published-print":{"date-parts":[[2013,5]]},"DOI":"10.1007\/s11227-012-0860-0","type":"journal-article","created":{"date-parts":[[2013,1,22]],"date-time":"2013-01-22T04:41:09Z","timestamp":1358829669000},"page":"580-605","source":"Crossref","is-referenced-by-count":6,"title":["FPGA implementation of an exact dot product and its application in variable-precision floating-point arithmetic"],"prefix":"10.1007","volume":"64","author":[{"given":"Yuanwu","family":"Lei","sequence":"first","affiliation":[]},{"given":"Yong","family":"Dou","sequence":"additional","affiliation":[]},{"given":"Yazhuo","family":"Dong","sequence":"additional","affiliation":[]},{"given":"Jie","family":"Zhou","sequence":"additional","affiliation":[]},{"given":"Fei","family":"Xia","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2013,1,23]]},"reference":[{"issue":"3","key":"860_CR1","doi-asserted-by":"crossref","first-page":"259","DOI":"10.1023\/A:1008153532043","volume":"18","author":"H Yun","year":"2001","unstructured":"Yun H, Chris D (2001) Using accurate arithmetics to improve numerical reproducibility and stability in parallel applications. J Supercomput 18(3):259\u2013277","journal-title":"J Supercomput"},{"issue":"3","key":"860_CR2","doi-asserted-by":"crossref","first-page":"54","DOI":"10.1109\/MCSE.2005.52","volume":"7","author":"DH Bailey","year":"2005","unstructured":"Bailey DH (2005) High-precision floating-point arithmetic in scientific computation. Comput Sci Eng 7(3):54\u201361","journal-title":"Comput Sci Eng"},{"key":"860_CR3","unstructured":"GNU Multiple-Precision Arithmetic Library (2011) Available from: http:\/\/www.swox.com\/gmp"},{"issue":"2","key":"860_CR4","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/1236463.1236468","volume":"33","author":"L Fousse","year":"2007","unstructured":"Fousse L, Hanrot G, Lefevre V, Pelissier P, Zimmermann P (2007) MPFR: a multiple-precision binary floating-point library with correct rounding. Trans Math Softw 33(2):1\u201315","journal-title":"Trans Math Softw"},{"key":"860_CR5","unstructured":"NTL: A Library for Doing Number Theory (2011) Available from: http:\/\/www.shoup.net\/ntl\/"},{"key":"860_CR6","unstructured":"Fujimoto J, Ishikawa T, Perret-Gallix D (2005) High precision numerical computations\u2014a case for an happy design. ACPP IRG note, ACPP-N-1: KEK-CP-164"},{"key":"860_CR7","doi-asserted-by":"crossref","first-page":"370","DOI":"10.1109\/TC.1983.1676238","volume":"C-32","author":"MS Cohen","year":"1983","unstructured":"Cohen MS, Hull TE, Hamarcher VC (1983) A controlled-precision decimal arithmetic unit. IEEE Trans Comput C-32:370\u2013377","journal-title":"IEEE Trans Comput"},{"key":"860_CR8","first-page":"309","volume-title":"Proceedings of the 7th symposium on computer arithmetic","author":"DM Chiarulli","year":"1985","unstructured":"Chiarulli DM, Ruaa WG, Buell DA (1985) DRAFT: a dynamically reconfigurable processor for integer arithmetic. In: Proceedings of the 7th symposium on computer arithmetic, pp 309\u2013318"},{"key":"860_CR9","doi-asserted-by":"crossref","first-page":"184","DOI":"10.1109\/ARITH.1989.72825","volume-title":"Proceedings of the 9th symposium on computer arithmetic","author":"TM Carter","year":"1989","unstructured":"Carter TM (1989) Cascade: hardware for high\/variable precision arithmetic. In: Proceedings of the 9th symposium on computer arithmetic, pp 184\u2013191"},{"issue":"5","key":"860_CR10","doi-asserted-by":"crossref","first-page":"387","DOI":"10.1109\/12.859535","volume":"49","author":"MJ Schulte","year":"2000","unstructured":"Schulte MJ, Swartzlander EE Jr (2000) A family of variable-precision, interval arithmetic processors. IEEE Trans Comput 49(5):387\u2013397","journal-title":"IEEE Trans Comput"},{"key":"860_CR11","first-page":"79","volume-title":"Proceedings of FPL 2007","author":"E El-Araby","year":"2007","unstructured":"El-Araby E, Gonzalez I, El-Ghazawi T (2007) Bringing high-performance reconfigurable computing to exact computations. In: Proceedings of FPL 2007, pp 79\u201385"},{"key":"860_CR12","volume-title":"Proceedings of FCCM 1998","author":"FT Alexandre","year":"1998","unstructured":"Alexandre FT, Milos DE (1998) A variable long-precision arithmetic unit design for reconfigurable coprocessor architectures. In: Proceedings of FCCM 1998"},{"key":"860_CR13","first-page":"1","volume-title":"Proceedings of the 4th conference on real numbers and computers","author":"J Hormigo","year":"2000","unstructured":"Hormigo J, Villalba J (2000) A hardware algorithm for variable-precision division. In: Proceedings of the 4th conference on real numbers and computers, pp 1\u20137"},{"key":"860_CR14","first-page":"215","volume-title":"Proceedings of ASAP2000","author":"J Hormigo","year":"2000","unstructured":"Hormigo J, Villalba J, Schulte M (2000) A hardware algorithm for variable-precision logarithm. In: Proceedings of ASAP2000, pp 215\u2013224"},{"key":"860_CR15","first-page":"186","volume-title":"Proceedings of Arith 1999","author":"J Hormigo","year":"1999","unstructured":"Hormigo J, Villalba J, Zapata EL (1999) Interval sine and cosine functions computation based on variable-precision cordic algorithm. In: Proceedings of Arith 1999, pp 186\u2013193"},{"key":"860_CR16","doi-asserted-by":"crossref","first-page":"21","DOI":"10.1023\/B:VLSI.0000017001.88149.f4","volume":"37","author":"J Hormigo","year":"2004","unstructured":"Hormigo J, Villalba J, Zapata EL (2004) CORDIC processor for variable-precision interval arithmetic. J VLSI Signal Process 37:21\u201339","journal-title":"J VLSI Signal Process"},{"key":"860_CR17","first-page":"604","volume-title":"Proceedings of 13th conf on design of circuits and integrated systems (DCIS\u201998)","author":"E Saez","year":"1998","unstructured":"Saez E, Villalba J, Hormigo J, Quiles FJ, Benavides JI, Zapata EL (1998) FPGA implementation of a variable precision CORDIC processor. In: Proceedings of 13th conf on design of circuits and integrated systems (DCIS\u201998), pp 604\u2013609"},{"issue":"11","key":"860_CR18","doi-asserted-by":"crossref","first-page":"2173","DOI":"10.1587\/transinf.E94.D.2173","volume":"E94-D","author":"Y Lei","year":"2011","unstructured":"Lei Y, Dou Y, Zhou J (2011) FPGA-specific custom VLIW architecture for arbitrary precision floating-point arithmetic. IEICE Trans Inf Syst E94-D(11):2173\u20132183","journal-title":"IEICE Trans Inf Syst"},{"issue":"2","key":"860_CR19","first-page":"152","volume":"18","author":"XS Li","year":"2002","unstructured":"Li XS, Demmel JW, Bailey DH, Henry G (2002) Design, implementation and testing of extended and mixed precision blas. ACM Trans Math Softw 18(2):152\u2013205","journal-title":"ACM Trans Math Softw"},{"key":"860_CR20","doi-asserted-by":"crossref","first-page":"C109","DOI":"10.1016\/B978-0-12-505630-4.50012-2","volume-title":"Reliability in computing","author":"SM Rump","year":"1988","unstructured":"Rump SM (1988) Algorithms for verified inclusions-theory and practice. In: Moore RE (ed) Reliability in computing. Academic Press, San Diego, pp C109\u2013C126"},{"key":"860_CR21","volume-title":"The fifth floating-point operation for top-performance computers","author":"U Kulisch","year":"1997","unstructured":"Kulisch U (1997) The fifth floating-point operation for top-performance computers. Universitat Karlsruhe"},{"key":"860_CR22","unstructured":"IEEE (2008) Standard for binary floating point arithmetic ansi\/ieee standard 754-2008. The Institute of Electrical and Electronic Engineers, Inc. Revised version of original 754-1985 Standard"},{"key":"860_CR23","first-page":"183","volume-title":"Proceedings of Arith 2009","author":"W Edmonson","year":"2009","unstructured":"Edmonson W, Melquiond G (2009) IEEE interval standard working group\u2014p1788: current status. In: Proceedings of Arith 2009, pp 183\u2013190"},{"issue":"3","key":"860_CR24","doi-asserted-by":"crossref","first-page":"307","DOI":"10.1007\/s00607-010-0127-7","volume":"91","author":"U Kulisch","year":"2011","unstructured":"Kulisch U, Snyder V (2011) The exact dot product as basic tool for long interval arithmetic. Computing 91(3):307\u2013313","journal-title":"Computing"},{"issue":"4","key":"860_CR25","doi-asserted-by":"crossref","first-page":"397","DOI":"10.1007\/s00607-010-0131-y","volume":"91","author":"U Kulisch","year":"2011","unstructured":"Kulisch U (2011) Very fast and exact accumulation of products. Computing 91(4):397\u2013405","journal-title":"Computing"},{"key":"860_CR26","first-page":"157","volume-title":"Proceedings of ARC 2010","author":"AR Lopes","year":"2010","unstructured":"Lopes AR, Constantinides GA (2010) A fused hybrid floating-point and fixed-point dot-product for FPGAs. In: Proceedings of ARC 2010, vol 5992, pp 157\u2013168"},{"key":"860_CR27","first-page":"94","volume-title":"Proceedings of ARC 2011","author":"MV Manoukian","year":"2011","unstructured":"Manoukian MV, Constantinides GA (2011) Accurate floating point arithmetic through hardware error-free transformations. In: Proceedings of ARC 2011, vol 6578, pp 94\u2013101"},{"key":"860_CR28","first-page":"33","volume-title":"Proceedings of FPT 2008","author":"FD Dinechin","year":"2008","unstructured":"Dinechin FD, Pasca B, Cret O, Tudoran R (2008) An fpga-specific approach to floating-point accumulation and sum-of-products. In: Proceedings of FPT 2008, pp 33\u201340"},{"key":"860_CR29","doi-asserted-by":"crossref","DOI":"10.1515\/9783110203196","volume-title":"Computer arithmetic and validity: theory, implementation, and applications","author":"U Kulisch","year":"2008","unstructured":"Kulisch U (2008) Computer arithmetic and validity: theory, implementation, and applications. de Gruyter, Berlin"},{"key":"860_CR30","first-page":"64","volume-title":"Proceedings of Arith 1991","author":"M Muller","year":"1991","unstructured":"Muller M, Rub C, Rulling W (1991) Exact accumulation of floating-point numbers. In: Proceedings of Arith 1991, pp 64\u201369"},{"key":"860_CR31","first-page":"70","volume-title":"Proceedings of Arith 1991","author":"A Knofel","year":"1991","unstructured":"Knofel A (1991) A fast hardware units for the computation of accurate dot products. In: Proceedings of Arith 1991, pp 70\u201374"},{"key":"860_CR32","first-page":"325","volume-title":"Proceedings of ICS 2010","author":"Y Dou","year":"2010","unstructured":"Dou Y, Lei Y, Wu G (2010) FPGA accelerating double\/quad-double high precision floating-point application for exascale computing. In: Proceedings of ICS 2010, pp 325\u2013336"},{"key":"860_CR33","first-page":"171","volume-title":"Proceedings of FPGA 2004","author":"K Underwood","year":"2004","unstructured":"Underwood K (2004) FPGAs vs. CPUs: trends in peak floating-point performance. In: Proceedings of FPGA 2004, pp 171\u2013180"},{"key":"860_CR34","doi-asserted-by":"crossref","first-page":"222","DOI":"10.1109\/ARITH.1995.465354","volume-title":"Proceedings of the 12th symposium on computer arithmetic","author":"MJ Schulte","year":"1995","unstructured":"Schulte MJ, Swartzlander EE Jr (1995) Hardware design and arithmetic algorithms for a variable-precision, interval arithmetic coprocessor. In: Proceedings of the 12th symposium on computer arithmetic, pp 222\u2013228"},{"key":"860_CR35","doi-asserted-by":"crossref","DOI":"10.1137\/1.9780898718027","volume-title":"Accuracy and stability of numerical algorithms","author":"NJ Higham","year":"2002","unstructured":"Higham NJ (2002) Accuracy and stability of numerical algorithms, 2nd edn. Society for Industrial and Applied Mathematics, Philadelphia","edition":"2"},{"issue":"4","key":"860_CR36","doi-asserted-by":"crossref","first-page":"874","DOI":"10.1007\/s11390-010-9372-7","volume":"25","author":"Y Dou","year":"2010","unstructured":"Dou Y, Zhou J, Wu G, Jiang J, Lei Y (2010) A unified co-processor architecture for matrix decomposition. J Comput Sci Technol 25(4):874\u2013885","journal-title":"J Comput Sci Technol"},{"key":"860_CR37","first-page":"86","volume-title":"Proceedings of FPGA 2005","author":"Y Dou","year":"2005","unstructured":"Dou Y, Vassiliadis S, Kuzmanov GK, Gaydadjiev GN (2005) 64-bit floating-point FPGA matrix multiplication. In: Proceedings of FPGA 2005, pp 86\u201395"},{"issue":"2","key":"860_CR38","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/1236463.1236468","volume":"33","author":"L Fousse","year":"2007","unstructured":"Fousse L, Hanrot G, Lefevre V, Pelissier P, Zimmermann P (2007) MPFR: a multiple-precision binary floating-point library with correct rounding. Trans Math Softw 33(2):1\u201315","journal-title":"Trans Math Softw"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-012-0860-0.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11227-012-0860-0\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-012-0860-0","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,7,8]],"date-time":"2019-07-08T13:13:28Z","timestamp":1562591608000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11227-012-0860-0"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,1,23]]},"references-count":38,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2013,5]]}},"alternative-id":["860"],"URL":"https:\/\/doi.org\/10.1007\/s11227-012-0860-0","relation":{},"ISSN":["0920-8542","1573-0484"],"issn-type":[{"value":"0920-8542","type":"print"},{"value":"1573-0484","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,1,23]]}}}