{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,5]],"date-time":"2026-04-05T05:32:50Z","timestamp":1775367170488,"version":"3.50.1"},"reference-count":48,"publisher":"Springer Science and Business Media LLC","issue":"7","license":[{"start":{"date-parts":[[2015,4,5]],"date-time":"2015-04-05T00:00:00Z","timestamp":1428192000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"published-print":{"date-parts":[[2015,7]]},"DOI":"10.1007\/s11227-015-1415-y","type":"journal-article","created":{"date-parts":[[2015,4,4]],"date-time":"2015-04-04T05:55:06Z","timestamp":1428126906000},"page":"2720-2747","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":14,"title":["Latency-aware DVFS for efficient power state transitions on many-core architectures"],"prefix":"10.1007","volume":"71","author":[{"given":"Zhiquan","family":"Lai","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"King Tin","family":"Lam","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Cho-Li","family":"Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jinshu","family":"Su","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2015,4,5]]},"reference":[{"key":"1415_CR1","unstructured":"Arabnia HR, Thapliyal H, Vinod AP (2006) Combined integer and floating point multiplication architecture (CIFM) for FPGAs and its reversible logic implementation. In: The 49th IEEE international midwest symposium on circuits and systems (MWSCAS\u201906), August 6\u20139, San Juan, Puerto Rico, pp 148\u2013154"},{"key":"1415_CR2","doi-asserted-by":"crossref","unstructured":"Baumann A, Barhamy P, Dagandz PE, Harrisy T, Isaacsy R, Peter S, Roscoe T, Sch\u00fcpbach A, Singhania A (2009) The multikernel: a new OS architecture for scalable multicore systems. In: The ACM symposium on operating system principles (SOSP\u201909), pp 29\u201344","DOI":"10.1145\/1629575.1629579"},{"key":"1415_CR3","doi-asserted-by":"crossref","unstructured":"Bennett C, Grossman RL, Locke D, Seidman J, Vejcik S (2010) Malstone: towards a benchmark for analytics on large data clouds. In: The 16th ACM SIGKDD international conference on knowledge discovery and data mining (KDD\u201910), ACM, pp 145\u2013152","DOI":"10.1145\/1835804.1835826"},{"key":"1415_CR4","doi-asserted-by":"crossref","first-page":"89","DOI":"10.1016\/S0065-2458(06)69002-5","volume":"69","author":"KW Cameron","year":"2007","unstructured":"Cameron KW, Ge R, Feng X (2007) Designing computational clusters for performance and power. Adv Comput 69:89\u2013153","journal-title":"Adv Comput"},{"key":"1415_CR5","doi-asserted-by":"crossref","unstructured":"David R, Bogdan P, Marculescu R, Ogras U (2011) Dynamic power management of voltage-frequency island partitioned networks-on-chip using Intel\u2019s Single-Chip Cloud Computer. In: The international symposium on networks-on-chip (NOCS\u201911), pp 257\u2013258","DOI":"10.1145\/1999946.1999989"},{"key":"1415_CR6","doi-asserted-by":"crossref","unstructured":"Donald J, Martonosi M (2006) Techniques for multicore thermal management: classification and new exploration. In: The ACM\/IEEE international symposium on computer architecture (ISCA\u201906), pp 78\u201388","DOI":"10.1145\/1150019.1136493"},{"key":"1415_CR7","unstructured":"Fahey J (2013) Home electricity use in US falling to 2001 levels. http:\/\/bigstory.ap.org\/article\/home-electricity-use-us-falling-2001-levels . Accessed Oct 2014"},{"issue":"12","key":"1415_CR8","doi-asserted-by":"crossref","first-page":"50","DOI":"10.1109\/MC.2007.445","volume":"40","author":"WC Feng","year":"2007","unstructured":"Feng WC, Cameron K (2007) The Green500 list: encouraging sustainable supercomputing. Computer 40(12):50\u201355","journal-title":"Computer"},{"key":"1415_CR9","doi-asserted-by":"crossref","unstructured":"Freeh VW, Lowenthal DK (2005) Using multiple energy gears in MPI programs on a power-scalable cluster. In: The 10th ACM SIGPLAN symposium on principles and practice of parallel programming (PPoPP\u201905). ACM, pp 164\u2013173","DOI":"10.1145\/1065944.1065967"},{"key":"1415_CR10","doi-asserted-by":"crossref","unstructured":"Govil K, Chan E, Wasserman H (1995) Comparing algorithm for dynamic speed-setting of a low-power CPU. In: The 1st annual international conference on mobile computing and networking (MobiCom\u201995). ACM, Berkeley, California, USA, pp 13\u201325","DOI":"10.1145\/215530.215546"},{"key":"1415_CR11","unstructured":"Graph500: The Graph 500 benchmark. http:\/\/www.graph500.org . Accessed Oct 2014"},{"issue":"1","key":"1415_CR12","doi-asserted-by":"crossref","first-page":"173","DOI":"10.1109\/JSSC.2010.2079450","volume":"46","author":"J Howard","year":"2011","unstructured":"Howard J, Dighe S, Vangal S, Ruhl G, Borkar N, Jain S, Erraguntla V, Konow M, Riepen M, Gries M, Droege G, Lund-Larsen T, Steibl S, Borkar S, De V, Wijngaart RVD (2011) A 48-core IA-32 message-passing processor in 45 nm CMOS using on-die message passing and DVFS for performance and power scaling. IEEE J Solid-State Circuits 46(1):173\u2013183","journal-title":"IEEE J Solid-State Circuits"},{"key":"1415_CR13","doi-asserted-by":"crossref","unstructured":"Ioannou N, Kauschke M, Gries M, Cintra M (2011) Phase-based application-driven hierarchical power management on the Single-Chip cloud Computer. In: The 20th international conference on parallel architectures and compilation techniques (PACT\u201911), pp 131\u2013142","DOI":"10.1109\/PACT.2011.19"},{"key":"1415_CR14","unstructured":"Intel Labs (2010) SCC external architecture specification (EAS) (revision 0.94). Technical report. https:\/\/communities.intel.com\/servlet\/JiveServlet\/downloadBody\/5852-102-1-9012\/SCC_EAS.pdf . Accessed May 2010"},{"key":"1415_CR15","unstructured":"Intel Labs (2010) The SCC programmer\u2019s guide (revision 1.0). Technical report. https:\/\/communities.intel.com\/servlet\/JiveServlet\/previewBody\/5684-102-8-22523\/SCCProgrammersGuide.pdf . Accessed Nov 2010"},{"key":"1415_CR16","unstructured":"Iyer A, Marculescu D (2002) Power efficiency of voltage scaling in multiple clock, multiple voltage cores. In: The IEEE\/ACM international conference on computer-aided design (ICCAD\u201902). ACM, New York, pp 379\u2013386"},{"key":"1415_CR17","unstructured":"Lai Z, Lam KT, Wang CL, Su J (2014) A power modeling approach for many-core architectures. In: The 10th international conference on semantics, knowledge and grids (SKG\u201914), pp 128\u2013132"},{"key":"1415_CR18","doi-asserted-by":"crossref","unstructured":"Lai Z, Lam KT, Wang CL, Su J, Yan Y, Zhu W (2013) Latency-aware dynamic voltage and frequency scaling on many-core architectures for data-intensive applications. In: The international conference on cloud computing and big data (CloudCom-Asia\u201913), pp 78\u201383","DOI":"10.1109\/CLOUDCOM-ASIA.2013.68"},{"key":"1415_CR19","doi-asserted-by":"crossref","unstructured":"Lam KT, Shi J, Hung D, Wang CL, Lai Z, Yan Y, Zhu W (2014) Rhymes: a shared virtual memory system for non-coherent tiled many-core architectures. In: The 20th IEEE international conference on parallel and distributed systems (ICPADS\u201914), December 16\u201319, Hsinchu, Taiwan","DOI":"10.1109\/PADSW.2014.7097807"},{"key":"1415_CR20","doi-asserted-by":"crossref","unstructured":"Li B, Chang HC, Song SL, Su CY, Meyer T, Mooring J, Cameron K (2014) The power-performance tradeoffs of the Intel Xeon Phi on HPC applications. In: Workshop on large-scale parallel processing (LSPP\u201914), pp 1448\u20131456","DOI":"10.1109\/IPDPSW.2014.162"},{"issue":"1","key":"1415_CR21","doi-asserted-by":"crossref","first-page":"144","DOI":"10.1109\/TPDS.2012.95","volume":"24","author":"D Li","year":"2013","unstructured":"Li D, Supinski BRd, Schulz M, Nikolopoulos DS, Cameron KW (2013) Strategies for energy-efficient resource management of hybrid programming models. IEEE Trans Parallel Distrib Syst 24(1):144\u2013157","journal-title":"IEEE Trans Parallel Distrib Syst"},{"key":"1415_CR22","doi-asserted-by":"crossref","unstructured":"Lo D, Kozyrakis C (2014) Dynamic management of TurboMode in modern multi-core chips. In: The 20th international symposium on high performance computer architecture (HPCA\u201914), pp 603\u2013613","DOI":"10.1109\/HPCA.2014.6835969"},{"key":"1415_CR23","doi-asserted-by":"crossref","unstructured":"Ma K, Li X, Chen M, Wang X (2011) Scalable power control for many-core architectures running multi-threaded applications. In: The ACM\/IEEE international symposium on computer architecture (ISCA\u201911), pp 449\u2013460","DOI":"10.1145\/2000064.2000117"},{"key":"1415_CR24","doi-asserted-by":"crossref","unstructured":"Matthews O, Zhang M, Sorin D (2014) Scalably verifiable dynamic power management. In: The 20th IEEE international symposium on high performance computer architecture, pp 579\u2013590","DOI":"10.1109\/HPCA.2014.6835967"},{"key":"1415_CR25","unstructured":"National Energy Administration (NEA) of China: China\u2019s total electricity consumption in 2013. http:\/\/www.nea.gov.cn\/2014-01\/14\/c_133043689.htm . AccessedOct 2014"},{"key":"1415_CR26","unstructured":"Qingyuan D, Meisner D, Bhattacharjee A, Wenisch TF, Bianchini R (2012) Coscale: Coordinating CPU and memory system DVFS in server systems. In: The 45th annual IEEE\/ACM international symposium on microarchitecture (MICRO\u201912). IEEE Computer Society, Vancouver, BC, Canada, pp 143\u2013154"},{"key":"1415_CR27","doi-asserted-by":"crossref","unstructured":"Rangan KK, Wei GY, Brooks D (2009) Thread motion: fine-grained power management for multi-core systems. In: The ACM\/IEEE international symposium on computer architecture (ISCA\u201909), pp 302\u2013313","DOI":"10.1145\/1555754.1555793"},{"key":"1415_CR28","doi-asserted-by":"crossref","unstructured":"Ravishankar C, Ananthanarayanan S, Garg S, Kennings A (2012) Analysis and evaluation of greedy thread swapping based dynamic power management for MPSoC platforms. In: The 13th international symposium on quality electronic design (ISQED\u201912), pp 617\u2013624","DOI":"10.1109\/ISQED.2012.6187557"},{"key":"1415_CR29","doi-asserted-by":"crossref","unstructured":"Rotem E, Mendelson A, Ginosar R, Weiser U (2009) Multiple clock and voltage domains for chip multi processors. In: The 42th annual IEEE\/ACM international symposium on microarchitecture (MICRO\u201909), New York, pp 459\u2013468","DOI":"10.1145\/1669112.1669170"},{"key":"1415_CR30","unstructured":"Sartori J, Kumar R (2007) Proactive peak power management for many-core architectures. Technical report CRHC-07-04, University of Illinois at Urbana-Champaign"},{"key":"1415_CR31","unstructured":"Simone D (2009) Power management in a manycore operating system. Masters thesis"},{"issue":"4","key":"1415_CR32","doi-asserted-by":"crossref","first-page":"747","DOI":"10.1109\/TVLSI.2013.2257900","volume":"22","author":"A Sinkar","year":"2014","unstructured":"Sinkar A, Ghasemi H, Schulte M, Karpuzcu U, Kim NS (2014) Low-cost per-core voltage domain support for power-constrained high-performance processors. IEEE Trans Very Large Scale Integr (VLSI) Syst 22(4):747\u2013758","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"key":"1415_CR33","unstructured":"Sueur EL, Heiser G (2010) Dynamic voltage and frequency scaling: the laws of diminishing returns. In: The 2nd workshop on power aware computing and systems (HotPower\u201910), pp 1\u20138"},{"issue":"5","key":"1415_CR34","doi-asserted-by":"crossref","first-page":"591","DOI":"10.1109\/TVLSI.2005.844305","volume":"13","author":"E Talpes","year":"2005","unstructured":"Talpes E, Marculescu D (2005) Toward a multiple clock\/voltage island design style for power-aware processors. IEEE Trans Very Large Scale Integr (VLSI) Syst 13(5):591\u2013603","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"key":"1415_CR35","doi-asserted-by":"crossref","unstructured":"Thapliyal H, Arabnia H, Srinivas MB (2009) Efficient reversible logic design of BCD subtractors. In: Gavrilova M, Tan CJK (eds) Transactions on computational science III, lecture notes in computer science, vol 5300, chap. 6. Springer, Berlin, Heidelberg, pp 99\u2013121","DOI":"10.1007\/978-3-642-00212-0_6"},{"key":"1415_CR36","unstructured":"Thapliyal H, Arabnia HR, Bajpai R, Sharma KK (2007) Combined integer and variable precision (CIVP) floating point multiplication architecture for FPGAs. In: The international conference on parallel and distributed processing techniques and applications (PDPTA\u201907), pp 449\u2013450"},{"key":"1415_CR37","unstructured":"Thapliyal H, Arabnia HR, Bajpai R, Sharma KK. (2007) Partial reversible gates (PRG) for reversible BCD arithmetic. In: The international conference on computer design (CDES\u201907), pp 97\u201398"},{"key":"1415_CR38","doi-asserted-by":"crossref","unstructured":"Thapliyal H, Jayashree HV, Nagamani AN, Arabnia H (2013) Progress in reversible processor design: a novel methodology for reversible carry look-ahead adder. In: Gavrilova M, Tan CJK (eds) Transactions on computational science XVII, lecture notes in computer science, vol 7420, chap. 4. Springer, Berlin, Heidelberg, pp 73\u201397","DOI":"10.1007\/978-3-642-35840-1_4"},{"key":"1415_CR39","unstructured":"Top500 List, June 2014. http:\/\/www.top500.org\/lists\/2014\/06\/ . Accessed Oct 2014"},{"key":"1415_CR40","unstructured":"Trader T (2014) China\u2019s supercomputing strategy called out. http:\/\/www.hpcwire.com\/2014\/07\/17\/dd\/ . Accessed Oct 2014"},{"key":"1415_CR41","doi-asserted-by":"crossref","first-page":"793","DOI":"10.1007\/978-3-642-55224-3_74","volume-title":"Parallel processing and applied mathematics, lecture notes in computer science","author":"KD Vogeleer","year":"2014","unstructured":"Vogeleer KD, Memmi G, Jouvelot P, Coelho F (2014) The energy\/frequency convexity rule: modeling and experimental validation on mobile devices. In: Wyrzykowski R, Dongarra J, Karczewski K, Wa\u015bniewski J (eds) Parallel processing and applied mathematics, lecture notes in computer science. Springer, Berlin, Heidelberg, pp 793\u2013803"},{"key":"1415_CR42","unstructured":"Weiser M, Welch B, Demers A, Shenker S (1994) Scheduling for reduced CPU energy. In: The 1st USENIX conference on operating systems design and implementation (OSDI\u201994). USENIX Association, Monterey, California"},{"key":"1415_CR43","doi-asserted-by":"crossref","unstructured":"Weissel A, Bellosa F (2002) Process cruise control: event-driven clock scaling for dynamic power management. In: The international conference on compilers, architecture and synthesis for embedded systems (CASES\u201902), pp 238\u2013246","DOI":"10.1145\/581630.581668"},{"key":"1415_CR44","unstructured":"Wilson L. Average household electricity use around the world. http:\/\/shrinkthatfootprint.com\/average-household-electricity-consumption . Accessed Oct 2014"},{"key":"1415_CR45","unstructured":"World Population Review: China population 2014. http:\/\/worldpopulationreview.com\/countries\/china-population . Accessed Oct 2014"},{"issue":"2","key":"1415_CR46","doi-asserted-by":"crossref","first-page":"168","DOI":"10.1109\/TST.2014.6787370","volume":"19","author":"B Yang","year":"2014","unstructured":"Yang B, Yu Z, Wei J (2014) Design of low-power modern radar SoC based on ASIX. Tsinghua Sci Technol 19(2):168\u2013173","journal-title":"Tsinghua Sci Technol"},{"key":"1415_CR47","unstructured":"Ye R, Xu Q (2012) Learning-based power management for multi-core processors via idle period manipulation. In: The 17th Asia and South Pacific design automation conference (ASP-DAC\u201912), pp 115\u2013120"},{"key":"1415_CR48","unstructured":"Yuki T, Rajopadhye S (2013) Folklore confirmed: compiling for speed = compiling for energy. In: The 26th international workshop on languages and compilers for parallel computing (LCPC\u201913), pp 169\u2013184"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-015-1415-y.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11227-015-1415-y\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-015-1415-y","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,8,9]],"date-time":"2023-08-09T05:49:08Z","timestamp":1691560148000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11227-015-1415-y"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,4,5]]},"references-count":48,"journal-issue":{"issue":"7","published-print":{"date-parts":[[2015,7]]}},"alternative-id":["1415"],"URL":"https:\/\/doi.org\/10.1007\/s11227-015-1415-y","relation":{},"ISSN":["0920-8542","1573-0484"],"issn-type":[{"value":"0920-8542","type":"print"},{"value":"1573-0484","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,4,5]]}}}