{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T15:17:33Z","timestamp":1649085453049},"reference-count":34,"publisher":"Springer Science and Business Media LLC","issue":"5","license":[{"start":{"date-parts":[[2015,7,25]],"date-time":"2015-07-25T00:00:00Z","timestamp":1437782400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"published-print":{"date-parts":[[2016,5]]},"DOI":"10.1007\/s11227-015-1485-x","type":"journal-article","created":{"date-parts":[[2015,7,24]],"date-time":"2015-07-24T08:57:56Z","timestamp":1437728276000},"page":"1785-1798","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":4,"title":["Implications of shallower memory controller transaction queues in scalable memory systems"],"prefix":"10.1007","volume":"72","author":[{"given":"Mario D.","family":"Marino","sequence":"first","affiliation":[]},{"given":"Kuan-Ching","family":"Li","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2015,7,25]]},"reference":[{"key":"1485_CR1","unstructured":"\u201cLPDDR4 Moves Mobile\u201d, mobile Forum (2013) Presented by Daniel Skinner. http:\/\/www.jedec.org\/sites\/...\/D_Skinner_Mobile_Forum_May_2013_0.pdf . Accessed 06\/03\/2013"},{"key":"1485_CR2","unstructured":"JEDEC Publishes Breakthrough Standard for Wide I\/O Mobile DRAM. http:\/\/www.jedec.org\/ . Accessed 02\/03\/2014"},{"key":"1485_CR3","doi-asserted-by":"crossref","unstructured":"Vantrease D et al (2008) Corona: system implications of emerging nanophotonic technology. In: ISCA. IEEE, DC, USA, pp 153\u2013164","DOI":"10.1145\/1394608.1382135"},{"key":"1485_CR4","unstructured":"Therdsteerasukdi Kea (2011) The dimm tree architecture: a high bandwidth and scalable memory system. In: ICCD. IEEE, pp 388\u2013395. [Online]. http:\/\/dblp.uni-trier.de\/db\/conf\/iccd\/iccd2011.html#TherdsteerasukdiBIRCC11"},{"key":"1485_CR5","doi-asserted-by":"crossref","unstructured":"Marino MD (2013) RFiof: an RF approach to the I\/O-pin and memory controller scalability for off-chip memories. In: CF, May 14\u201316. ACM, Ischia, Italy","DOI":"10.1145\/2482767.2482803"},{"key":"1485_CR6","doi-asserted-by":"crossref","unstructured":"Li S et al (2009) McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. In: MICRO\u201909. ACM, New York, USA, pp 469\u2013480","DOI":"10.1145\/1669112.1669172"},{"key":"1485_CR7","doi-asserted-by":"crossref","unstructured":"Lee JK et al (2015) Guest editorial: embedded multicore systems andapplications. J Signal Process Syst 80(3):241\u2013243","DOI":"10.1007\/s11265-015-0970-z"},{"key":"1485_CR8","unstructured":"Hybrid Memory Cube Specification 1.0. http:\/\/www.hybridmemorycube.org\/ . Accessed date 03\/03\/2014"},{"key":"1485_CR9","doi-asserted-by":"crossref","unstructured":"Marino MD (2012) RFiop: RF-memory path to address on-package I, O pad and memory controller scalability. In: ICCD, 2012. IEEE, Montreal, Quebec, Canada","DOI":"10.1109\/ICCD.2012.6378638"},{"key":"1485_CR10","unstructured":"Liu Q (2007) Quilt packaging: a novel high speed chip-to-chip communication paradigm for system-in-package. Ph.D. Dissertation, Notre Dame, Indiana, USA, December 2007, Chair-Jacob, Bruce L"},{"key":"1485_CR11","unstructured":"McCalpin JD (1995) Memory bandwidth and machine balance in current high performance computers. In: IEEE TCCA Newsletter, pp 19\u201325"},{"key":"1485_CR12","unstructured":"The pChase memory benchmark page. http:\/\/pchase.org\/ . Accessed date 09\/12\/2012"},{"key":"1485_CR13","unstructured":"CACTI 5.1. http:\/\/www.hpl.hp.com\/techreports\/2008\/HPL200820.html . Accessed date 04\/16\/2013"},{"issue":"4","key":"1485_CR14","doi-asserted-by":"crossref","first-page":"100","DOI":"10.1145\/1105734.1105748","volume":"33","author":"D Wang","year":"2005","unstructured":"Wang D et al (2005) DRAMsim: a memory system simulator. SIGARCH Comput Archit News 33(4):100\u2013107","journal-title":"SIGARCH Comput Archit News"},{"key":"1485_CR15","unstructured":"Micron manufactures DRAM components and modules and NAND Flash. http:\/\/www.micron.com\/ . Accessed date 12\/28\/2012"},{"issue":"4","key":"1485_CR16","doi-asserted-by":"crossref","first-page":"52","DOI":"10.1109\/MM.2006.82","volume":"26","author":"NL Binkert","year":"2006","unstructured":"Binkert NL et al (2006) The M5 simulator: modeling networked systems. IEEE Micro 26(4):52\u201360","journal-title":"IEEE Micro"},{"key":"1485_CR17","unstructured":"Loh Gabriel H (2008) 3D-stacked memory architectures for multi-core processors. In: ISCA. IEEE, DC, USA, pp 453\u2013464"},{"key":"1485_CR18","unstructured":"Frank Chang M et al (2008) CMP network-on-chip overlaid with multi-band RF-interconnect. In: HPCA. pp 191\u2013202"},{"key":"1485_CR19","doi-asserted-by":"crossref","unstructured":"Chang MCF et al (2008) Power reduction of CMP communication networks via RF-interconnects. In: MICRO. IEEE, Washington, USA, pp 376\u2013387","DOI":"10.1109\/MICRO.2008.4771806"},{"key":"1485_CR20","doi-asserted-by":"crossref","first-page":"1271","DOI":"10.1109\/TED.2005.850699","volume":"52","author":"MCF Chang","year":"2005","unstructured":"Chang MCF et al (2005) Advanced RF\/baseband interconnect schemes for inter- and intra-ULSI communications. IEEE Trans Electron Dev 52:1271\u20131285","journal-title":"IEEE Trans Electron Dev"},{"key":"1485_CR21","doi-asserted-by":"crossref","unstructured":"Marino MD (2012) On-package scalability of RF and inductive memory controllers. In: Euromicro DSD IEEE","DOI":"10.1109\/DSD.2012.95"},{"key":"1485_CR22","unstructured":"AMD Reveals Details About Bulldozer Microprocessors (2011). http:\/\/www.xbitlabs.com\/news\/cpu\/display\/20100824154814_AMD_Unveils_Details_About_Bulldozer_Microprocessors.html . Accessed date 08\/02\/2014"},{"key":"1485_CR23","doi-asserted-by":"crossref","unstructured":"David et al (2011) Memory power management via dynamic voltage\/frequency scaling. In: Proceedings of the 8th ACM International Conference on Autonomic Computing, ser. ICAC \u201911. ACM, New York, NY, USA, pp 31\u201340","DOI":"10.1145\/1998582.1998590"},{"key":"1485_CR24","doi-asserted-by":"crossref","unstructured":"Tam SW et al (2011) RF-interconnect for future network-on-chip. Low Power Network-on-Chip, pp 255\u2013280","DOI":"10.1007\/978-1-4419-6911-8_10"},{"key":"1485_CR25","unstructured":"Byun G et al (2011) An 8.4 Gb\/s 2.5 pJ\/b mobile memory I\/O interface using bi-directional and simultaneous dual (base+RF)-band signaling. In: ISSCC. IEEE, pp 488, 490"},{"key":"1485_CR26","unstructured":"ITRS HOME. http:\/\/www.itrs.net\/ . Accessed date 09\/12\/2012"},{"key":"1485_CR27","unstructured":"NAS parallel benchmarks. http:\/\/www.nas.nasa.gov\/Resources\/Software\/npb.html\/ . Accessed date 03\/11\/2013"},{"key":"1485_CR28","doi-asserted-by":"crossref","unstructured":"Marino MD, Li KC (2014) Insights on memory controller scaling in multi-core embedded systems. Int J Embed Syst 6(4):351\u2013361","DOI":"10.1504\/IJES.2014.065000"},{"key":"1485_CR29","doi-asserted-by":"crossref","unstructured":"Deng Q et al (2011) Memscale: active low-power modes for main memory. In: Proceedings of the Sixteenth ASPLOS. ACM, New York, NY, USA, pp 225\u2013238","DOI":"10.1145\/1950365.1950392"},{"key":"1485_CR30","doi-asserted-by":"crossref","unstructured":"Malladi et al. (2012) Towards energy-proportional datacenter memory with mobile DRAM. In: Proceedings of the 39th Annual International Symposium on Computer Architecture, ser. ISCA \u201912. IEEE Computer Society, Washington, DC, USA, pp 37\u201348","DOI":"10.1109\/ISCA.2012.6237004"},{"issue":"2","key":"1485_CR31","doi-asserted-by":"crossref","first-page":"331","DOI":"10.3745\/JIPS.2012.8.2.331","volume":"8","author":"A Marowka","year":"2012","unstructured":"Marowka A (2012) TBBench: a micro-benchmark suite for intel Threading building blocks. J Inf Proces Syst 8(2):331\u2013346","journal-title":"J Inf Proces Syst"},{"key":"1485_CR32","doi-asserted-by":"crossref","unstructured":"Ding JH et al (2014) An efficient and comprehensive scheduler on asymmetric multicore architecture systems. J Syst Architect Embed Syst Des 60(3):305\u2013314","DOI":"10.1016\/j.sysarc.2013.05.006"},{"key":"1485_CR33","doi-asserted-by":"crossref","unstructured":"Liu C, Granados O, Duarte R, Andrian J (2012) Energy efficient architecture using hardware acceleration for software defined radio components. J Inf Process Syst 8(1):133\u2013144","DOI":"10.3745\/JIPS.2012.8.1.133"},{"issue":"4","key":"1485_CR34","doi-asserted-by":"crossref","first-page":"539","DOI":"10.3745\/JIPS.2012.8.4.539","volume":"8","author":"C Bunse","year":"2012","unstructured":"Bunse C, Choi Y, Gross HG (2012) Evaluation of an abstract component model for embedded systems development. J Inf Process Syst 8(4):539\u2013554","journal-title":"J Inf Process Syst"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-015-1485-x.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11227-015-1485-x\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-015-1485-x","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,28]],"date-time":"2019-08-28T13:45:25Z","timestamp":1566999925000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11227-015-1485-x"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,7,25]]},"references-count":34,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2016,5]]}},"alternative-id":["1485"],"URL":"https:\/\/doi.org\/10.1007\/s11227-015-1485-x","relation":{},"ISSN":["0920-8542","1573-0484"],"issn-type":[{"value":"0920-8542","type":"print"},{"value":"1573-0484","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,7,25]]}}}