{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,7]],"date-time":"2025-11-07T09:28:35Z","timestamp":1762507715294,"version":"3.37.3"},"reference-count":62,"publisher":"Springer Science and Business Media LLC","issue":"10","license":[{"start":{"date-parts":[[2019,4,29]],"date-time":"2019-04-29T00:00:00Z","timestamp":1556496000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"published-print":{"date-parts":[[2019,10]]},"DOI":"10.1007\/s11227-019-02861-2","type":"journal-article","created":{"date-parts":[[2019,4,29]],"date-time":"2019-04-29T23:10:58Z","timestamp":1556579458000},"page":"6574-6611","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":17,"title":["A calibrated asymptotic framework for analyzing packet classification algorithms on GPUs"],"prefix":"10.1007","volume":"75","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-5373-5778","authenticated-orcid":false,"given":"M.","family":"Abbasi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Rafiee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2019,4,29]]},"reference":[{"key":"2861_CR1","doi-asserted-by":"publisher","first-page":"84","DOI":"10.1016\/j.comcom.2014.08.004","volume":"54","author":"D Pao","year":"2014","unstructured":"Pao D, Lu Z (2014) A multi-pipeline architecture for high-speed packet classification. Comput Commun 54:84\u201396","journal-title":"Comput Commun"},{"key":"2861_CR2","first-page":"17","volume":"2","author":"BS Tumari","year":"2014","unstructured":"Tumari BS, Lakshmipriya W (2014) FPGA implementation of binary-tree-based high speed packet classification system. Int J Comb Res Dev 2:17\u201322","journal-title":"Int J Comb Res Dev"},{"key":"2861_CR3","doi-asserted-by":"crossref","unstructured":"Zheng K, Che H, Wang Z, Liu B (2005) TCAM-based distributed parallel packet classification algorithm with range-matching solution. In: INFOCOM 2005, 24th Annual Joint Conference of the IEEE Computer and Communications Societies, 2005, pp 293\u2013303","DOI":"10.1109\/INFCOM.2005.1497900"},{"key":"2861_CR4","doi-asserted-by":"publisher","first-page":"947","DOI":"10.1109\/TC.2006.123","volume":"55","author":"K Zheng","year":"2006","unstructured":"Zheng K, Che H, Wang Z, Liu B, Zhang X (2006) DPPC-RE: TCAM-based distributed parallel packet classification with range encoding. IEEE Trans Comput 55:947\u2013961","journal-title":"IEEE Trans Comput"},{"key":"2861_CR5","doi-asserted-by":"crossref","unstructured":"Cao Z, Kodialam M, Lakshman T (2014) Traffic steering in software defined networks: planning and online routing. In: ACM SIGCOMM Computer Communication Review: SIGCOMM\u201914, vol 44, pp 65\u201370","DOI":"10.1145\/2627566.2627574"},{"key":"2861_CR6","doi-asserted-by":"crossref","unstructured":"Guerra Perez K, Yang X, Scott-Hayward S, Sezer S (2014) A configurable packet classification architecture for software-defined networking. In: 27th IEEE International System-on-Chip Conference (SOCC), 2014, pp 353\u2013358","DOI":"10.1109\/SOCC.2014.6948953"},{"key":"2861_CR7","first-page":"195","volume":"41","author":"S Han","year":"2011","unstructured":"Han S, Jang K, Park K, Moon S (2011) PacketShader: a GPU-accelerated software router. ACM SIGCOMM Comput Commun Rev 41:195\u2013206","journal-title":"ACM SIGCOMM Comput Commun Rev"},{"key":"2861_CR8","doi-asserted-by":"crossref","unstructured":"Perez KG, Yang X, Scott-Hayward S, Sezer S (2014) Optimized packet classification for Software-Defined Networking. In: IEEE International Conference on Communications (ICC), 2014, pp 859\u2013864","DOI":"10.1109\/ICC.2014.6883427"},{"key":"2861_CR9","doi-asserted-by":"publisher","first-page":"293","DOI":"10.1007\/s10878-016-0007-y","volume":"35","author":"Y Zhao","year":"2018","unstructured":"Zhao Y, Chen L, Xie G, Zhao J, Ding J (2018) GPU implementation of a cellular genetic algorithm for scheduling dependent tasks of physical system simulation programs. J Comb Optim 35:293\u2013317","journal-title":"J Comb Optim"},{"key":"2861_CR10","doi-asserted-by":"publisher","first-page":"384","DOI":"10.1016\/j.engappai.2016.08.019","volume":"62","author":"T Gong","year":"2017","unstructured":"Gong T, Fan T, Guo J, Cai Z (2017) GPU-based parallel optimization of immune convolutional neural network and embedded system. Eng Appl Artif Intell 62:384\u2013395","journal-title":"Eng Appl Artif Intell"},{"key":"2861_CR11","doi-asserted-by":"crossref","unstructured":"Przymus P, Kaczmarski K (2014) Dynamic compression strategy for time series database using GPU. In: New Trends in Databases and Information Systems. Springer, pp 235\u2013244","DOI":"10.1007\/978-3-319-01863-8_26"},{"key":"2861_CR12","doi-asserted-by":"publisher","first-page":"46","DOI":"10.1016\/j.jocs.2016.12.004","volume":"18","author":"K Ghidouche","year":"2017","unstructured":"Ghidouche K, Sider A, Couturier R, Guyeux C (2017) Efficient high degree polynomial root finding using GPU. J Comput Sci 18:46\u201356","journal-title":"J Comput Sci"},{"key":"2861_CR13","doi-asserted-by":"publisher","first-page":"238","DOI":"10.1145\/1108956.1108958","volume":"37","author":"DE Taylor","year":"2005","unstructured":"Taylor DE (2005) Survey and taxonomy of packet classification techniques. ACM Comput Surv 37:238\u2013275","journal-title":"ACM Comput Surv"},{"key":"2861_CR14","unstructured":"Nakano K (2013) The hierarchical memory machine model for GPUs. In: IEEE 27th International Parallel and Distributed Processing Symposium Workshops & Ph.D. Forum (IPDPSW), 2013, pp 591\u2013600"},{"key":"2861_CR15","doi-asserted-by":"crossref","unstructured":"Sim J, Dasgupta A, Kim H, Vuduc R (2012) A performance analysis framework for identifying potential benefits in GPGPU applications. In: ACM SIGPLAN Notices, 2012, pp 11\u201322","DOI":"10.1145\/2145816.2145819"},{"key":"2861_CR16","doi-asserted-by":"crossref","unstructured":"Satish N, Harris M, Garland M (2009) Designing efficient sorting algorithms for manycore GPUs. In: IEEE International Symposium on Parallel & Distributed Processing, IPDPS 2009 2009, pp 1\u201310","DOI":"10.1109\/IPDPS.2009.5161005"},{"key":"2861_CR17","doi-asserted-by":"crossref","unstructured":"Ma L, Chamberlain RD, Buhler JD, Franklin MA (2011) Bloom filter performance on graphics engines. In: International Conference on Parallel Processing (ICPP), 2011, pp 522\u2013531","DOI":"10.1109\/ICPP.2011.27"},{"key":"2861_CR18","doi-asserted-by":"publisher","first-page":"1270","DOI":"10.1109\/TPDS.2007.1069","volume":"18","author":"W Liu","year":"2007","unstructured":"Liu W, Schmidt B, Voss G, Muller-Wittig W (2007) Streaming algorithms for biological sequence alignment on GPUs. IEEE Trans Parallel Distrib Syst 18:1270\u20131281","journal-title":"IEEE Trans Parallel Distrib Syst"},{"key":"2861_CR19","doi-asserted-by":"publisher","first-page":"2123","DOI":"10.1002\/cpe.2909","volume":"25","author":"SH Bokhari","year":"2013","unstructured":"Bokhari SH, Bokhari SS (2013) A comparison of the Cray XMT and XMT-2. Concurr Comput Pract Exp 25:2123\u20132139","journal-title":"Concurr Comput Pract Exp"},{"key":"2861_CR20","doi-asserted-by":"publisher","first-page":"3010","DOI":"10.1016\/j.comnet.2012.04.014","volume":"56","author":"H Lim","year":"2012","unstructured":"Lim H, Lee S, Swartzlander EE Jr (2012) A new hierarchical packet classification algorithm. Comput Netw 56:3010\u20133022","journal-title":"Comput Netw"},{"key":"2861_CR21","doi-asserted-by":"publisher","first-page":"2728","DOI":"10.1109\/TNET.2015.2491265","volume":"24","author":"M Varvello","year":"2016","unstructured":"Varvello M, Laufer R, Zhang F, Lakshman T (2016) Multilayer packet classification with graphics processing units. IEEE\/ACM Trans Netw 24:2728\u20132741","journal-title":"IEEE\/ACM Trans Netw"},{"key":"2861_CR22","unstructured":"NVIDIA (2018) NVIDIA CUDA (compute unified device architecture) programming guide. \n                    http:\/\/docs.nvidia.com\/cuda\/pdf\/CUDA_C_Programming_Guide.pdf\n                    \n                  . Accessed July 2018"},{"key":"2861_CR23","unstructured":"AMD: Global Provider of Innovative Graphics, Processors. \n                    http:\/\/www.amd.com\n                    \n                  . Accessed July 2018"},{"key":"2861_CR24","doi-asserted-by":"crossref","unstructured":"Li Y, Zhang D, Liu AX, Zheng J (2013) GAMT: a fast and scalable IP lookup engine for GPU-based software routers. In: Proceedings of the Ninth ACM\/IEEE Symposium on Architectures for Networking and Communications Systems, 2013, pp 1\u201312","DOI":"10.1109\/ANCS.2013.6665171"},{"key":"2861_CR25","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1016\/j.jnca.2016.08.004","volume":"74","author":"F Lin","year":"2016","unstructured":"Lin F, Wang G, Zhou J, Zhang S, Yao X (2016) High-performance IPv6 address lookup in GPU-accelerated software routers. J Netw Comput Appl 74:1\u201310","journal-title":"J Netw Comput Appl"},{"key":"2861_CR26","doi-asserted-by":"publisher","first-page":"232","DOI":"10.1016\/j.jocs.2017.05.010","volume":"24","author":"JL Fern\u00e1ndez","year":"2018","unstructured":"Fern\u00e1ndez JL, Ferreiro-Ferreiro AM, Garc\u00eda-Rodr\u00edguez JA, V\u00e1zquez C (2018) GPU parallel implementation for asset-liability management in insurance companies. J Comput Sci 24:232\u2013254","journal-title":"J Comput Sci"},{"key":"2861_CR27","doi-asserted-by":"crossref","unstructured":"Vasiliadis G, Athanasopoulos E, Polychronakis M, Ioannidis S (2014) PixelVault: using GPUs for securing cryptographic operations. In: Proceedings of the 2014 ACM SIGSAC Conference on Computer and Communications Security, 2014, pp 1131\u20131142","DOI":"10.1145\/2660267.2660316"},{"key":"2861_CR28","unstructured":"Specifications of the NVIDIA Geforce GT 425M graphics card. \n                    https:\/\/www.geforce.com\/hardware\/notebook-gpus\/geforce-gt-425m\/specifications\n                    \n                  . Accessed July 2018"},{"key":"2861_CR29","doi-asserted-by":"crossref","unstructured":"Fortune S, Wyllie J (1978) Parallelism in random access machines. In: Proceedings of the Tenth Annual ACM Symposium on Theory of Computing, 1978, pp 114\u2013118","DOI":"10.1145\/800133.804339"},{"key":"2861_CR30","doi-asserted-by":"publisher","first-page":"103","DOI":"10.1145\/79173.79181","volume":"33","author":"LG Valiant","year":"1990","unstructured":"Valiant LG (1990) A bridging model for parallel computation. Commun ACM 33:103\u2013111","journal-title":"Commun ACM"},{"key":"2861_CR31","doi-asserted-by":"crossref","unstructured":"Culler D, Karp R, Patterson D, Sahay A, Schauser KE, Santos KE, et al (1993) LogP: towards a realistic model of parallel computation. In: ACM Sigplan Notices, 1993, pp 1\u201312","DOI":"10.1145\/155332.155333"},{"key":"2861_CR32","unstructured":"Kirtzic JS, Daescu O, Richardson T (2012) A parallel algorithm development model for the GPU architecture. In: Proceedings of Int\u2019l Conference on Parallel and Distributed Processing Techniques and Applications, 2012"},{"key":"2861_CR33","unstructured":"Haque SA, Maza MM, Xie N (2014) A many-core machine model for designing algorithms with minimum parallelism overheads. arXiv preprint \n                    arXiv:1402.0264"},{"key":"2861_CR34","doi-asserted-by":"crossref","unstructured":"Nottingham A, Irwin B (2009) GPU packet classification using OpenCL: a consideration of viable classification methods. In: Proceedings of the 2009 Annual Research Conference of the South African Institute of Computer Scientists and Information Technologists, 2009, pp 160\u2013169","DOI":"10.1145\/1632149.1632170"},{"key":"2861_CR35","unstructured":"Hung C-L, Lin Y-L, Li K-C, Wang H-H, Guo S-W (2011) Efficient GPGPU-based parallel packet classification. In: Trust, Security and Privacy in Computing and Communications (TrustCom), 2011, pp 1367\u20131374"},{"key":"2861_CR36","unstructured":"Deng Y, Jiao X, Mu S, Kang K, Zhu Y (2011) NPGPU: network processing on graphics processing units. In: Theoretical and Mathematical Foundations of Computer Science. Springer, 2011, pp 313\u2013321"},{"key":"2861_CR37","unstructured":"Kang K, Deng YS Scalable packet classification via GPU metaprogramming. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011, pp 1\u20134"},{"key":"2861_CR38","doi-asserted-by":"crossref","unstructured":"Zhou S, Singapura SG, Prasanna VK (2014) High-performance packet classification on GPU. In: High Performance Extreme Computing Conference (HPEC) 2014, pp 1\u20136","DOI":"10.1109\/HPEC.2014.7041005"},{"key":"2861_CR39","unstructured":"Zheng J, Zhang D, Li Y, Li G (2015) Accelerate packet classification using GPU: a case study on HiCuts. In: Computer Science and Its Applications. Springer, 2015, pp 231\u2013238"},{"key":"2861_CR40","unstructured":"Qu YR, Zhang HH, Zhou S, Prasanna VK (2015) Optimizing many-field packet classification on FPGA, multi-core general purpose processor, and GPU. In: Proceedings of the Eleventh ACM\/IEEE Symposium on Architectures for Networking and Communications Systems, 2015, pp 87\u201398"},{"key":"2861_CR41","doi-asserted-by":"crossref","unstructured":"Lee JH, Sim J, Kim H (2015) BSSync: processing near memory for machine learning workloads with bounded staleness consistency models. In: International Conference on Parallel Architecture and Compilation (PACT), 2015, pp 241\u2013252","DOI":"10.1109\/PACT.2015.42"},{"key":"2861_CR42","doi-asserted-by":"publisher","first-page":"1189","DOI":"10.1007\/s11771-013-1602-z","volume":"20","author":"C-Q Yang","year":"2013","unstructured":"Yang C-Q, Wu Q, Tang T, Wang F, Xue J-L (2013) Programming for scientific computing on peta-scale heterogeneous parallel systems. J Cent South Univ 20:1189\u20131203","journal-title":"J Cent South Univ"},{"key":"2861_CR43","volume-title":"Professional Cuda C programming","author":"J Cheng","year":"2014","unstructured":"Cheng J, Grossman M, McKercher T (2014) Professional Cuda C programming. Wiley, London"},{"key":"2861_CR44","unstructured":"Feng W-C, Xiao S To GPU synchronize or not GPU synchronize? In: Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), 2010, pp 3801\u20133804"},{"key":"2861_CR45","doi-asserted-by":"crossref","unstructured":"Milic U, Gelado I, Puzovic N, Ramirez A, Tomasevic M (2013) Parallelizing general histogram application for cuda architectures. In: International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013, pp 11\u201318","DOI":"10.1109\/SAMOS.2013.6621100"},{"key":"2861_CR46","doi-asserted-by":"publisher","first-page":"10","DOI":"10.1016\/j.cpc.2017.05.003","volume":"218","author":"Z Fan","year":"2017","unstructured":"Fan Z, Chen W, Vierimaa V, Harju A (2017) Efficient molecular dynamics simulations with many-body potentials on graphics processing units. Comput Phys Commun 218:10\u201316","journal-title":"Comput Phys Commun"},{"key":"2861_CR47","doi-asserted-by":"crossref","unstructured":"Liu L, Zhang Y, Liu M, Wang C, Wang J (2017) A-MapCG: an adaptive MapReduce framework for GPUs. In: International Conference on Networking, Architecture, and Storage (NAS) 2017, pp 1\u20138","DOI":"10.1109\/NAS.2017.8026842"},{"key":"2861_CR48","doi-asserted-by":"crossref","unstructured":"Maghazeh A, Bordoloi UD, Dastgeer U, Andrei A, Eles P, Peng Z (2017) Latency-aware packet processing on CPU\u2013GPU heterogeneous systems. In: Design Automation Conference (DAC), 2017 54th ACM\/EDAC\/IEEE, 2017, pp 1\u20136","DOI":"10.1145\/3061639.3062269"},{"key":"2861_CR49","doi-asserted-by":"crossref","unstructured":"Amar\u0131s M, Cordeiro D, Goldman A, de Camargo RY (2015) A simple BSP-based model to predict execution time in GPU applications. In: 22nd annual IEEE International Conference on High Performance Computing (HiPC 2015), 2015, pp 285\u2013294","DOI":"10.1109\/HiPC.2015.34"},{"key":"2861_CR50","doi-asserted-by":"publisher","first-page":"17","DOI":"10.1080\/17445760.2012.731507","volume":"29","author":"K Nakano","year":"2014","unstructured":"Nakano K (2014) Simple memory machine models for GPUs. Int J Parallel Emerg Distrib Syst 29:17\u201337","journal-title":"Int J Parallel Emerg Distrib Syst"},{"key":"2861_CR51","doi-asserted-by":"crossref","unstructured":"Hong S, Kim H (2009) An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness. In: ACM SIGARCH Computer Architecture News, 2009, pp 152\u2013163","DOI":"10.1145\/1555754.1555775"},{"key":"2861_CR52","doi-asserted-by":"crossref","unstructured":"Liu W, M\u00fcller-Wittig W, Schmidt B (2007) Performance predictions for general-purpose computation on GPUs. In: International Conference on Parallel Processing, ICPP 2007, p 50","DOI":"10.1109\/ICPP.2007.67"},{"key":"2861_CR53","doi-asserted-by":"publisher","first-page":"325","DOI":"10.1145\/2954679.2872411","volume":"51","author":"S Muralidharan","year":"2016","unstructured":"Muralidharan S, Roy A, Hall M, Garland M, Rai P (2016) Architecture-adaptive code variant tuning. ACM SIGPLAN Not 51:325\u2013338","journal-title":"ACM SIGPLAN Not"},{"key":"2861_CR54","unstructured":"Taylor DE, Turner JS (2005) Classbench: a packet classification benchmark. In: INFOCOM 2005. 24th Annual Joint Conference of the IEEE Computer and Communications Societies, 2005, pp 2068\u20132079"},{"key":"2861_CR55","unstructured":"Specifications of the NVIDIA Geforce GTX 750 graphics card. \n                    https:\/\/www.geforce.com\/hardware\/desktop-gpus\/geforce-gtx-750\/specifications\n                    \n                  . Accessed July 2018"},{"key":"2861_CR56","doi-asserted-by":"publisher","first-page":"145","DOI":"10.1109\/TPAMI.1979.4766900","volume":"1","author":"GM Hunter","year":"1979","unstructured":"Hunter GM, Steiglitz K (1979) Operations on images using quad trees. IEEE Trans Pattern Anal Mach Intell 1:145\u2013153","journal-title":"IEEE Trans Pattern Anal Mach Intell"},{"key":"2861_CR57","first-page":"191","volume-title":"Hierarchical spatial data structures","author":"H Samet","year":"1990","unstructured":"Samet H (1990) Hierarchical spatial data structures. Springer, Berlin, pp 191\u2013212"},{"key":"2861_CR58","doi-asserted-by":"publisher","first-page":"425","DOI":"10.1016\/0167-8655(92)90049-6","volume":"13","author":"L Berger","year":"1992","unstructured":"Berger L, Mariot JP, Launay C (1992) A new formulation for fast image coding using quadtree representation. Pattern Recognit Lett 13:425\u2013432","journal-title":"Pattern Recognit Lett"},{"key":"2861_CR59","doi-asserted-by":"publisher","first-page":"1379","DOI":"10.1016\/j.ins.2005.04.001","volume":"176","author":"W-T Wong","year":"2006","unstructured":"Wong W-T, Shih FY, Su T-F (2006) Thinning algorithms based on quadtree and octree representations. Inf Sci 176:1379\u20131394","journal-title":"Inf Sci"},{"key":"2861_CR60","doi-asserted-by":"publisher","first-page":"561","DOI":"10.1016\/j.neucom.2014.07.007","volume":"148","author":"X Hou","year":"2015","unstructured":"Hou X, Han M, Gong C, Qian X (2015) SAR complex image data compression based on quadtree and zerotree coding in discrete wavelet transform domain: a comparative study. Neurocomputing 148:561\u2013568","journal-title":"Neurocomputing"},{"key":"2861_CR61","doi-asserted-by":"publisher","first-page":"1328","DOI":"10.1016\/j.jvcir.2013.09.002","volume":"24","author":"CH Yuen","year":"2013","unstructured":"Yuen CH, Lui OY, Wong KW (2013) Hybrid fractal image coding with quadtree-based progressive structure. J Vis Commun Image Represent 24:1328\u20131341","journal-title":"J Vis Commun Image Represent"},{"key":"2861_CR62","doi-asserted-by":"publisher","first-page":"315","DOI":"10.1016\/j.procs.2017.05.074","volume":"108","author":"V Campos","year":"2017","unstructured":"Campos V, Sastre F, Yag\u00fces M, Bellver M, Gir\u00f3-i-Nieto X, Torres J (2017) Distributed training strategies for a computer vision deep learning algorithm on a distributed GPU cluster. Procedia Comput Sci 108:315\u2013324","journal-title":"Procedia Comput Sci"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-019-02861-2.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11227-019-02861-2\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-019-02861-2.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,4,27]],"date-time":"2020-04-27T23:06:23Z","timestamp":1588028783000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11227-019-02861-2"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,4,29]]},"references-count":62,"journal-issue":{"issue":"10","published-print":{"date-parts":[[2019,10]]}},"alternative-id":["2861"],"URL":"https:\/\/doi.org\/10.1007\/s11227-019-02861-2","relation":{},"ISSN":["0920-8542","1573-0484"],"issn-type":[{"type":"print","value":"0920-8542"},{"type":"electronic","value":"1573-0484"}],"subject":[],"published":{"date-parts":[[2019,4,29]]},"assertion":[{"value":"29 April 2019","order":1,"name":"first_online","label":"First Online","group":{"name":"ArticleHistory","label":"Article History"}}]}}